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* Clean up scavengeRegister() a bit to prefer available regs, which allowsJim Grosbach2010-07-081-15/+1
| | | | | | | | the simplification of frame index register scavenging to not have to check for available registers directly and instead just let scavengeRegister() handle it. llvm-svn: 107880
* When processing frame index virtual registers, consider all available registersJim Grosbach2010-07-081-2/+12
| | | | | | | | (if there are any) and use the one which remains available for the longest rather than just using the first one. This should help enable better re-use of the loaded frame index values. rdar://7318760 llvm-svn: 107847
* Remove isSS argument from CreateFixedObject. Fixed objects cannot be spill ↵Evan Cheng2010-07-031-2/+1
| | | | | | slots so it's always false. llvm-svn: 107550
* Custom inserters (e.g., conditional moves in Thumb1 can introduceJim Grosbach2010-07-021-1/+14
| | | | | | | | | | | | new basic blocks, and if used as a function argument, that can cause call frame setup / destroy pairs to be split across a basic block boundary. That prevents us from doing a simple assertion to check that the pairs match and alloc/ dealloc the same amount of space. Modify the assertion to only check the amount allocated when there are matching pairs in the same basic block. rdar://8022442 llvm-svn: 107517
* Propagate the AlignStack bit in InlineAsm's to the Dale Johannesen2010-07-021-3/+3
| | | | | | | | | | | | | | | | | | | PrologEpilog code, and use it to determine whether the asm forces stack alignment or not. gcc consistently does not do this for GCC-style asms; Apple gcc inconsistently sometimes does it for asm blocks. There is no convenient place to put a bit in either the SDNode or the MachineInstr form, so I've added an extra operand to each; unlovely, but it does allow for expansion for more bits, should we need it. PR 5125. Some existing testcases are affected. The operand lists of the SDNode and MachineInstr forms are indexed with awesome mnemonics, like "2"; I may fix this someday, but not now. I'm not making it any worse. If anyone is inspired I think you can find all the right places from this patch. llvm-svn: 107506
* Remove the TargetRegisterClass member from CalleeSavedInfoRafael Espindola2010-06-021-12/+19
| | | | llvm-svn: 105344
* Remove uses of getCalleeSavedRegClasses from outside theRafael Espindola2010-06-021-7/+3
| | | | | | | backends and removes the virtual declaration. With that out of the way I should be able to cleanup one backend at a time. llvm-svn: 105321
* Implement @llvm.returnaddress. rdar://8015977.Evan Cheng2010-05-221-2/+2
| | | | llvm-svn: 104421
* Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe whatBill Wendling2010-05-141-15/+15
| | | | | | | | | the variable actually tracks. N.B., several back-ends are using "HasCalls" as being synonymous for something that adjusts the stack. This isn't 100% correct and should be looked into. llvm-svn: 103802
* Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.Evan Cheng2010-05-061-4/+5
| | | | llvm-svn: 103193
* Reword a comment slightly.Eric Christopher2010-05-031-1/+1
| | | | llvm-svn: 102966
* Make naked functions work on PPC.Dale Johannesen2010-04-291-0/+4
| | | | llvm-svn: 102657
* Rename MachineFrameInfo variables to MFI, for consistency withDan Gohman2010-04-131-41/+41
| | | | | | the rest of CodeGen. llvm-svn: 101146
* remove the MMI pointer from MachineFrameInfo.Chris Lattner2010-04-051-6/+0
| | | | llvm-svn: 100415
* Clear up the last (famous last words) frame index value reuse issues for Thumb1.Jim Grosbach2010-03-101-6/+9
| | | | llvm-svn: 98109
* Change the Value argument to eliminateFrameIndex to a type-tagged value. ThisJim Grosbach2010-03-091-2/+3
| | | | | | | | | | is preparatory to having PEI's scavenged frame index value reuse logic properly distinguish types of frame values (e.g., whether the value is stack-pointer relative or frame-pointer relative). No functionality change. llvm-svn: 98086
* Updated version of r96634 (which was reverted due to failing 176.gcc andJim Grosbach2010-02-221-3/+4
| | | | | | | | 126.gcc nightly tests. These failures uncovered latent bugs that machine DCE could remove one half of a stack adjust down/up pair, causing PEI to assert. This update fixes that, and the tests now pass. llvm-svn: 96822
* Revert 96634. It causes assertion failures for 126.gcc and 176.gcc inBob Wilson2010-02-191-4/+3
| | | | | | the armv6 nightly tests. llvm-svn: 96691
* Radar 7636153. In the presence of large call frames, it's not sufficientJim Grosbach2010-02-191-3/+4
| | | | | | | | | for ARM to just check if a function has a FP to determine if it's safe to simplify the stack adjustment pseudo ops prior to eliminating frame indices. Allow targets to override the default behavior and does so for ARM and Thumb2. llvm-svn: 96634
* Teach MachineFrameInfo to track maximum alignment while stack objects are beingEvan Cheng2010-02-131-13/+2
| | | | | | | | | | created. This ensures it's updated at all time. It means targets which perform dynamic stack alignment would know whether it is required and whether frame pointer register cannot be made available register allocation. This is a fix for rdar://7625239. Sorry, I can't create a reasonably sized test case. llvm-svn: 96069
* move target-independent opcodes out of TargetInstrInfoChris Lattner2010-02-091-1/+1
| | | | | | | | | into TargetOpcodes.h. #include the new TargetOpcodes.h into MachineInstr. Add new inline accessors (like isPHI()) to MachineInstr, and start using them throughout the codebase. llvm-svn: 95687
* Remove dead store.Bill Wendling2009-12-281-1/+1
| | | | llvm-svn: 92187
* Honour setHasCalls() set from isel.Anton Korobeynikov2009-12-111-2/+2
| | | | | | | This is used in some weird cases like general dynamic TLS model. This fixes PR5723 llvm-svn: 91144
* improve portability to avoid conflicting with std::next in c++'0x.Chris Lattner2009-12-031-1/+1
| | | | | | Patch by Howard Hinnant! llvm-svn: 90365
* Add a bool flag to StackObjects telling whether they reference spillDavid Greene2009-11-121-1/+2
| | | | | | | | | | | | | slots. The AsmPrinter will use this information to determine whether to print a spill/reload comment. Remove default argument values. It's too easy to pass a wrong argument value when multiple arguments have default values. Make everything explicit to trap bugs early. Update all targets to adhere to the new interfaces.. llvm-svn: 87022
* When the function is doing dynamic stack realignment, the spill slot will beJim Grosbach2009-10-291-2/+2
| | | | | | | | indexed via the stack pointer, even if a frame pointer is present. Update the heuristic to place it nearest the stack pointer in that case, rather than nearest the frame pointer. llvm-svn: 85474
* Cleanup of frame index scavenging. Better code flow and more accuratelyJim Grosbach2009-10-211-35/+60
| | | | | | handles T2 and ARM use cases. llvm-svn: 84761
* Better handle instructions that re-def a scratch registerJim Grosbach2009-10-201-9/+18
| | | | llvm-svn: 84657
* Register re-use for scavenged frame indices must check for re-deginitionJim Grosbach2009-10-201-0/+4
| | | | | | of the register in the instruction which kills the scavenged value. llvm-svn: 84641
* Enable post-pass frame index register scavenging for ARM and Thumb2Jim Grosbach2009-10-201-5/+0
| | | | llvm-svn: 84585
* Distinquish stack slots from other stack objects. They (and fixed objects) ↵Evan Cheng2009-10-171-1/+1
| | | | | | get FixedStack PseudoSourceValues. llvm-svn: 84326
* Make loop not recalc getNumOperands() each time aroundJim Grosbach2009-10-141-3/+2
| | | | llvm-svn: 84138
* quiet compiler warningJim Grosbach2009-10-141-1/+1
| | | | llvm-svn: 84133
* when previous scratch register is killed, flag the value as no longer trackingJim Grosbach2009-10-091-1/+4
| | | | llvm-svn: 83653
* Re-enable register scavenging in Thumb1 by default.Jim Grosbach2009-10-081-10/+1
| | | | llvm-svn: 83521
* bugfix. The target may use virtual registers that aren't tracked for re-use ↵Jim Grosbach2009-10-081-18/+26
| | | | | | but are allocated by the scavenger. The re-use algorithm needs to watch for that. llvm-svn: 83519
* reverting thumb1 scavenging default due to test failure while I figure out ↵Jim Grosbach2009-10-071-1/+10
| | | | | | what's up. llvm-svn: 83501
* Enable thumb1 register scavenging by default.Jim Grosbach2009-10-071-10/+1
| | | | llvm-svn: 83496
* grammarJim Grosbach2009-10-071-1/+1
| | | | llvm-svn: 83483
* add initializers for clarity. Add missing assignment of PrevLastUseOp.Jim Grosbach2009-10-071-2/+3
| | | | llvm-svn: 83481
* Add register-reuse to frame-index register scavenging. When a target usesJim Grosbach2009-10-071-21/+120
| | | | | | | | | | | | | | | | | | | | a virtual register to eliminate a frame index, it can return that register and the constant stored there to PEI to track. When scavenging to allocate for those registers, PEI then tracks the last-used register and value, and if it is still available and matches the value for the next index, reuses the existing value rather and removes the re-materialization instructions. Fancier tracking and adjustment of scavenger allocations to keep more values live for longer is possible, but not yet implemented and would likely be better done via a different, less special-purpose, approach to the problem. eliminateFrameIndex() is modified so the target implementations can return the registers they wish to be tracked for reuse. ARM Thumb1 implements and utilizes the new mechanism. All other targets are simply modified to adjust for the changed eliminateFrameIndex() prototype. llvm-svn: 83467
* Add additional assert() to verify no extraneous use of a scavenged register.Jim Grosbach2009-09-301-2/+9
| | | | llvm-svn: 83163
* replace TRI->isVirtualRegister() with TargetRegisterInfo::isVirtualRegister()Jim Grosbach2009-09-301-3/+1
| | | | | | per customary usage llvm-svn: 83137
* fix compiler warningJim Grosbach2009-09-301-1/+1
| | | | llvm-svn: 83132
* Simplify the tracking of virtual frame index registers. Ranges cannot overlap,Jim Grosbach2009-09-291-20/+31
| | | | | | | so a simple "current register" will suffice. Also add some additional sanity-checking assertions to make sure things are as we expect. llvm-svn: 83081
* Use explicit structs instead of std::pair to map callee saved regs to spill ↵Tilmann Scheller2009-09-271-4/+4
| | | | | | slots. llvm-svn: 82909
* pr4926: ARM requires the stack pointer to be aligned, even for leaf functions.Bob Wilson2009-09-251-14/+20
| | | | | | | | | | | | | | | | | | | | For the AAPCS ABI, SP must always be 4-byte aligned, and at any "public interface" it must be 8-byte aligned. For the older ARM APCS ABI, the stack alignment is just always 4 bytes. For X86, we currently align SP at entry to a function (e.g., to 16 bytes for Darwin), but no stack alignment is needed at other times, such as for a leaf function. After discussing this with Dan, I decided to go with the approach of adding a new "TransientStackAlignment" field to TargetFrameInfo. This value specifies the stack alignment that must be maintained even in between calls. It defaults to 1 except for ARM, where it is 4. (Some other targets may also want to set this if they have similar stack requirements. It's not currently required for PPC because it sets targetHandlesStackFrameRounding and handles the alignment in target-specific code.) The existing StackAlignment value specifies the alignment upon entry to a function, which is how we've been using it anyway. llvm-svn: 82767
* Start of revamping the register scavenging in PEI. ARM Thumb1 is the drivingJim Grosbach2009-09-241-3/+62
| | | | | | | | | | | | | | | | | | | interest for this, as it currently reserves a register rather than using the scavenger for matierializing constants as needed. Instead of scavenging registers on the fly while eliminating frame indices, new virtual registers are created, and then a scavenged collectively in a post-pass over the function. This isolates the bits that need to interact with the scavenger, and sets the stage for more intelligent use, and reuse, of scavenged registers. For the time being, this is disabled by default. Once the bugs are worked out, the current scavenging calls in replaceFrameIndices() will be removed and the post-pass scavenging will be the default. Until then, -enable-frame-index-scavenging enables the new code. Currently, only the Thumb1 back end is set up to use it. llvm-svn: 82734
* Fix a hypothetical problem for targets with StackGrowsUp and a non-zeroBob Wilson2009-09-241-4/+5
| | | | | | | | | | | | | LocalAreaOffset. (We don't have any of those right now.) PEI::calculateFrameObjectOffsets includes the absolute value of the LocalAreaOffset in the cumulative offset value used to calculate the stack frame size. It then adds the raw value of the LocalAreaOffset to the stack size. For a StackGrowsDown target, that raw value is negative and has the effect of cancelling out the absolute value that was added earlier, but that obviously won't work for a StackGrowsUp target. Change to subtract the absolute value of the LocalAreaOffset. llvm-svn: 82693
* Edit a comment.Bob Wilson2009-09-231-2/+1
| | | | llvm-svn: 82641
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