summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen/PrologEpilogInserter.cpp
Commit message (Collapse)AuthorAgeFilesLines
...
* Radar 7636153. In the presence of large call frames, it's not sufficientJim Grosbach2010-02-191-3/+4
| | | | | | | | | for ARM to just check if a function has a FP to determine if it's safe to simplify the stack adjustment pseudo ops prior to eliminating frame indices. Allow targets to override the default behavior and does so for ARM and Thumb2. llvm-svn: 96634
* Teach MachineFrameInfo to track maximum alignment while stack objects are beingEvan Cheng2010-02-131-13/+2
| | | | | | | | | | created. This ensures it's updated at all time. It means targets which perform dynamic stack alignment would know whether it is required and whether frame pointer register cannot be made available register allocation. This is a fix for rdar://7625239. Sorry, I can't create a reasonably sized test case. llvm-svn: 96069
* move target-independent opcodes out of TargetInstrInfoChris Lattner2010-02-091-1/+1
| | | | | | | | | into TargetOpcodes.h. #include the new TargetOpcodes.h into MachineInstr. Add new inline accessors (like isPHI()) to MachineInstr, and start using them throughout the codebase. llvm-svn: 95687
* Remove dead store.Bill Wendling2009-12-281-1/+1
| | | | llvm-svn: 92187
* Honour setHasCalls() set from isel.Anton Korobeynikov2009-12-111-2/+2
| | | | | | | This is used in some weird cases like general dynamic TLS model. This fixes PR5723 llvm-svn: 91144
* improve portability to avoid conflicting with std::next in c++'0x.Chris Lattner2009-12-031-1/+1
| | | | | | Patch by Howard Hinnant! llvm-svn: 90365
* Add a bool flag to StackObjects telling whether they reference spillDavid Greene2009-11-121-1/+2
| | | | | | | | | | | | | slots. The AsmPrinter will use this information to determine whether to print a spill/reload comment. Remove default argument values. It's too easy to pass a wrong argument value when multiple arguments have default values. Make everything explicit to trap bugs early. Update all targets to adhere to the new interfaces.. llvm-svn: 87022
* When the function is doing dynamic stack realignment, the spill slot will beJim Grosbach2009-10-291-2/+2
| | | | | | | | indexed via the stack pointer, even if a frame pointer is present. Update the heuristic to place it nearest the stack pointer in that case, rather than nearest the frame pointer. llvm-svn: 85474
* Cleanup of frame index scavenging. Better code flow and more accuratelyJim Grosbach2009-10-211-35/+60
| | | | | | handles T2 and ARM use cases. llvm-svn: 84761
* Better handle instructions that re-def a scratch registerJim Grosbach2009-10-201-9/+18
| | | | llvm-svn: 84657
* Register re-use for scavenged frame indices must check for re-deginitionJim Grosbach2009-10-201-0/+4
| | | | | | of the register in the instruction which kills the scavenged value. llvm-svn: 84641
* Enable post-pass frame index register scavenging for ARM and Thumb2Jim Grosbach2009-10-201-5/+0
| | | | llvm-svn: 84585
* Distinquish stack slots from other stack objects. They (and fixed objects) ↵Evan Cheng2009-10-171-1/+1
| | | | | | get FixedStack PseudoSourceValues. llvm-svn: 84326
* Make loop not recalc getNumOperands() each time aroundJim Grosbach2009-10-141-3/+2
| | | | llvm-svn: 84138
* quiet compiler warningJim Grosbach2009-10-141-1/+1
| | | | llvm-svn: 84133
* when previous scratch register is killed, flag the value as no longer trackingJim Grosbach2009-10-091-1/+4
| | | | llvm-svn: 83653
* Re-enable register scavenging in Thumb1 by default.Jim Grosbach2009-10-081-10/+1
| | | | llvm-svn: 83521
* bugfix. The target may use virtual registers that aren't tracked for re-use ↵Jim Grosbach2009-10-081-18/+26
| | | | | | but are allocated by the scavenger. The re-use algorithm needs to watch for that. llvm-svn: 83519
* reverting thumb1 scavenging default due to test failure while I figure out ↵Jim Grosbach2009-10-071-1/+10
| | | | | | what's up. llvm-svn: 83501
* Enable thumb1 register scavenging by default.Jim Grosbach2009-10-071-10/+1
| | | | llvm-svn: 83496
* grammarJim Grosbach2009-10-071-1/+1
| | | | llvm-svn: 83483
* add initializers for clarity. Add missing assignment of PrevLastUseOp.Jim Grosbach2009-10-071-2/+3
| | | | llvm-svn: 83481
* Add register-reuse to frame-index register scavenging. When a target usesJim Grosbach2009-10-071-21/+120
| | | | | | | | | | | | | | | | | | | | a virtual register to eliminate a frame index, it can return that register and the constant stored there to PEI to track. When scavenging to allocate for those registers, PEI then tracks the last-used register and value, and if it is still available and matches the value for the next index, reuses the existing value rather and removes the re-materialization instructions. Fancier tracking and adjustment of scavenger allocations to keep more values live for longer is possible, but not yet implemented and would likely be better done via a different, less special-purpose, approach to the problem. eliminateFrameIndex() is modified so the target implementations can return the registers they wish to be tracked for reuse. ARM Thumb1 implements and utilizes the new mechanism. All other targets are simply modified to adjust for the changed eliminateFrameIndex() prototype. llvm-svn: 83467
* Add additional assert() to verify no extraneous use of a scavenged register.Jim Grosbach2009-09-301-2/+9
| | | | llvm-svn: 83163
* replace TRI->isVirtualRegister() with TargetRegisterInfo::isVirtualRegister()Jim Grosbach2009-09-301-3/+1
| | | | | | per customary usage llvm-svn: 83137
* fix compiler warningJim Grosbach2009-09-301-1/+1
| | | | llvm-svn: 83132
* Simplify the tracking of virtual frame index registers. Ranges cannot overlap,Jim Grosbach2009-09-291-20/+31
| | | | | | | so a simple "current register" will suffice. Also add some additional sanity-checking assertions to make sure things are as we expect. llvm-svn: 83081
* Use explicit structs instead of std::pair to map callee saved regs to spill ↵Tilmann Scheller2009-09-271-4/+4
| | | | | | slots. llvm-svn: 82909
* pr4926: ARM requires the stack pointer to be aligned, even for leaf functions.Bob Wilson2009-09-251-14/+20
| | | | | | | | | | | | | | | | | | | | For the AAPCS ABI, SP must always be 4-byte aligned, and at any "public interface" it must be 8-byte aligned. For the older ARM APCS ABI, the stack alignment is just always 4 bytes. For X86, we currently align SP at entry to a function (e.g., to 16 bytes for Darwin), but no stack alignment is needed at other times, such as for a leaf function. After discussing this with Dan, I decided to go with the approach of adding a new "TransientStackAlignment" field to TargetFrameInfo. This value specifies the stack alignment that must be maintained even in between calls. It defaults to 1 except for ARM, where it is 4. (Some other targets may also want to set this if they have similar stack requirements. It's not currently required for PPC because it sets targetHandlesStackFrameRounding and handles the alignment in target-specific code.) The existing StackAlignment value specifies the alignment upon entry to a function, which is how we've been using it anyway. llvm-svn: 82767
* Start of revamping the register scavenging in PEI. ARM Thumb1 is the drivingJim Grosbach2009-09-241-3/+62
| | | | | | | | | | | | | | | | | | | interest for this, as it currently reserves a register rather than using the scavenger for matierializing constants as needed. Instead of scavenging registers on the fly while eliminating frame indices, new virtual registers are created, and then a scavenged collectively in a post-pass over the function. This isolates the bits that need to interact with the scavenger, and sets the stage for more intelligent use, and reuse, of scavenged registers. For the time being, this is disabled by default. Once the bugs are worked out, the current scavenging calls in replaceFrameIndices() will be removed and the post-pass scavenging will be the default. Until then, -enable-frame-index-scavenging enables the new code. Currently, only the Thumb1 back end is set up to use it. llvm-svn: 82734
* Fix a hypothetical problem for targets with StackGrowsUp and a non-zeroBob Wilson2009-09-241-4/+5
| | | | | | | | | | | | | LocalAreaOffset. (We don't have any of those right now.) PEI::calculateFrameObjectOffsets includes the absolute value of the LocalAreaOffset in the cumulative offset value used to calculate the stack frame size. It then adds the raw value of the LocalAreaOffset to the stack size. For a StackGrowsDown target, that raw value is negative and has the effect of cancelling out the absolute value that was added earlier, but that obviously won't work for a StackGrowsUp target. Change to subtract the absolute value of the LocalAreaOffset. llvm-svn: 82693
* Edit a comment.Bob Wilson2009-09-231-2/+1
| | | | llvm-svn: 82641
* Fix a comment typo and some whitespace.Bob Wilson2009-09-181-2/+2
| | | | llvm-svn: 82285
* Record variable debug info at ISel time directly.Devang Patel2009-08-221-5/+0
| | | | llvm-svn: 79742
* Don't setCalleeSavedInfoValid() until spills are interted.Jakob Stoklund Olesen2009-08-151-2/+2
| | | | | | | | | | In a naked function, the flag is never set and getPristineRegs() returns an empty list. That means naked functions are able to clobber callee saved registers, but that is the whole point of naked functions. This fixes PR4716. llvm-svn: 79096
* Add MachineFrameInfo::getPristineRegisters(MBB) method.Jakob Stoklund Olesen2009-08-131-0/+2
| | | | llvm-svn: 78911
* Use setPreservesAll and setPreservesCFG in CodeGen passes.Dan Gohman2009-07-311-0/+1
| | | | llvm-svn: 77754
* Reapply r77654 with a fix: MachineFunctionPass's getAnalysisUsageDan Gohman2009-07-311-1/+0
| | | | | | | | shouldn't do AU.setPreservesCFG(), because even though CodeGen passes don't modify the LLVM IR CFG, they may modify the MachineFunction CFG, and passes like MachineLoop are registered with isCFGOnly set to true. llvm-svn: 77691
* Revert r77654, it appears to be causing llvm-gcc bootstrap failures, and manyDaniel Dunbar2009-07-311-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | failures when building assorted projects with clang. --- Reverse-merging r77654 into '.': U include/llvm/CodeGen/Passes.h U include/llvm/CodeGen/MachineFunctionPass.h U include/llvm/CodeGen/MachineFunction.h U include/llvm/CodeGen/LazyLiveness.h U include/llvm/CodeGen/SelectionDAGISel.h D include/llvm/CodeGen/MachineFunctionAnalysis.h U include/llvm/Function.h U lib/Target/CellSPU/SPUISelDAGToDAG.cpp U lib/Target/PowerPC/PPCISelDAGToDAG.cpp U lib/CodeGen/LLVMTargetMachine.cpp U lib/CodeGen/MachineVerifier.cpp U lib/CodeGen/MachineFunction.cpp U lib/CodeGen/PrologEpilogInserter.cpp U lib/CodeGen/MachineLoopInfo.cpp U lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp D lib/CodeGen/MachineFunctionAnalysis.cpp D lib/CodeGen/MachineFunctionPass.cpp U lib/CodeGen/LiveVariables.cpp llvm-svn: 77661
* Manage MachineFunctions with an analysis Pass instead of the AnnotableDan Gohman2009-07-311-1/+0
| | | | | | | mechanism. To support this, make MachineFunctionPass a little more complete. llvm-svn: 77654
* Add support for naked functionsAnton Korobeynikov2009-07-171-2/+5
| | | | llvm-svn: 76198
* Assume an inline asm might be a call, so we getDale Johannesen2009-07-161-0/+4
| | | | | | | | | stack alignment right when it is. This is not ideal but conservatively correct. Adjust a test to compensate for changed stack offset value. gcc.apple/asm-block-57.c llvm-svn: 76120
* Scan for presence of calls and determine max callframe size early. To allow ↵Anton Korobeynikov2009-07-161-25/+36
| | | | | | ProcessFunctionBeforeCalleeSaveScan() use this information llvm-svn: 75942
* Targets sometimes assign fixed stack object to spill certain callee-savedEvan Cheng2009-07-091-1/+6
| | | | | | | | | | registers based on dynamic conditions. For example, X86 EBP/RBP, when used as frame register has to be spilled in the first fixed object. It should inform PEI this so it doesn't get allocated another stack object. Also, it should not be spilled as other callee-saved registers but rather its spilling and restoring are being handled by emitPrologue and emitEpilogue. Avoid spilling it twice. llvm-svn: 75116
* Use interators instead of counters for loops.Bill Wendling2009-07-081-16/+21
| | | | llvm-svn: 75046
* Removing the HasBuiltinSetjmp flag and associated bits. Flagging the presenceJim Grosbach2009-05-131-1/+1
| | | | | | | | | of exception handling builtin sjlj targets in functions turns out not to be necessary. Marking the intrinsic implementation in the .td file as defining all registers is sufficient to get the context saved properly by the containing function. llvm-svn: 71743
* PEI: rename PEI.h to PrologEpilogInserter.h to adhere to file naming standardJohn Mosby2009-05-131-1/+1
| | | | llvm-svn: 71678
* Add support for GCC compatible builtin setjmp and longjmp intrinsics. This isJim Grosbach2009-05-121-1/+1
| | | | | | | a supporting preliminary patch for GCC-compatible SjLJ exception handling. Note that these intrinsics are not designed to be invoked directly by the user, but rather used by the front-end as target hooks for exception handling. llvm-svn: 71610
* Restructure PEI code:John Mosby2009-05-121-1307/+67
| | | | | | | | | - moved shrink wrapping code from PrologEpilogInserter.cpp to new file ShrinkWrapping.cpp. - moved PEI pass definition into new shared header PEI.h. llvm-svn: 71588
* Apply patch review feedback.Evan Cheng2009-05-111-0/+2
| | | | llvm-svn: 71472
OpenPOWER on IntegriCloud