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* Miscellaneous clean-ups based on Evan's feedback:Bill Wendling2008-03-031-42/+52
| | | | | | | | | - Cleaned up how the prologue-epilogue inserter loops over the instructions. - Instead of restarting the processing of an instruction if we remove an implicit kill, just update the end iterator and make sure that the iterator isn't incremented. llvm-svn: 47870
* Multiple instructions can be inserted when eliminating frame indexes. We needBill Wendling2008-03-031-7/+24
| | | | | | | the register scavenger to process all of those new instructions instead of just the last one inserted. llvm-svn: 47860
* Don't track max alignment during stack object allocations since they can be ↵Evan Cheng2008-02-271-2/+1
| | | | | | deleted later. Let PEI compute it. llvm-svn: 47668
* Spiller now remove unused spill slots.Evan Cheng2008-02-271-0/+2
| | | | llvm-svn: 47657
* Adjust the MaxAlignment for the special register scavenging spill slot.Bill Wendling2008-02-211-0/+3
| | | | llvm-svn: 47452
* Rename MRegisterInfo to TargetRegisterInfo.Dan Gohman2008-02-101-11/+11
| | | | llvm-svn: 46930
* SDIsel processes llvm.dbg.declare by recording the variable debug ↵Evan Cheng2008-02-021-2/+5
| | | | | | | | | information descriptor and its corresponding stack frame index in MachineModuleInfo. This only works if the local variable is "homed" in the stack frame. It does not work for byval parameter, etc. Added ISD::DECLARE node type to represent llvm.dbg.declare intrinsic. Now the intrinsic calls are lowered into a SDNode and lives on through out the codegen passes. For now, since all the debugging information recording is done at isel time, when a ISD::DECLARE node is selected, it has the side effect of also recording the variable. This is a short term solution that should be fixed in time. llvm-svn: 46659
* Remove the nasty LABEL hack with a much less evil one. Now ↵Evan Cheng2008-02-011-7/+0
| | | | | | llvm.dbg.func.start implies a stoppoint is set. SelectionDAGISel records a new source line but does not create a ISD::LABEL node for this special stoppoint. Asm printer will magically print this label. This ensures nothing is emitted before. llvm-svn: 46635
* Add an extra operand to LABEL nodes which distinguishes between debug, EH, ↵Evan Cheng2008-01-311-1/+1
| | | | | | or misc labels. This fixes the EH breakage. However I am not convinced this is *the* solution. llvm-svn: 46609
* Also avoid adding callee save code before debug labels.Evan Cheng2008-01-311-1/+9
| | | | llvm-svn: 46586
* rename TargetInstrDescriptor -> TargetInstrDesc.Chris Lattner2008-01-071-3/+3
| | | | | | | Make MachineInstr::getDesc return a reference instead of a pointer, since it can never be null. llvm-svn: 45695
* Move a bunch more accessors from TargetInstrInfo to TargetInstrDescriptorChris Lattner2008-01-071-3/+2
| | | | llvm-svn: 45680
* Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflectsChris Lattner2008-01-071-1/+1
| | | | | | | | | | | | | | | that it is cheap and efficient to get. Move a variety of predicates from TargetInstrInfo into TargetInstrDescriptor, which makes it much easier to query a predicate when you don't have TII around. Now you can use MI->getDesc()->isBranch() instead of going through TII, and this is much more efficient anyway. Not all of the predicates have been moved over yet. Update old code that used MI->getInstrDescriptor()->Flags to use the new predicates in many places. llvm-svn: 45674
* Remove an unused variable.Duncan Sands2008-01-061-1/+0
| | | | llvm-svn: 45655
* I should not be allowed to commit when sleepy.Owen Anderson2008-01-051-2/+2
| | | | llvm-svn: 45608
* Move some more instruction creation methods from RegisterInfo into InstrInfo.Owen Anderson2008-01-011-4/+4
| | | | llvm-svn: 45484
* Rename SSARegMap -> MachineRegisterInfo in keeping with the idea Chris Lattner2007-12-311-4/+5
| | | | | | | | | | | | | | that "machine" classes are used to represent the current state of the code being compiled. Given this expanded name, we can start moving other stuff into it. For now, move the UsedPhysRegs and LiveIn/LoveOuts vectors from MachineFunction into it. Update all the clients to match. This also reduces some needless #includes, such as MachineModuleInfo from MachineFunction. llvm-svn: 45467
* MachineOperand::getImmedValue -> MachineOperand::getImmChris Lattner2007-12-301-2/+2
| | | | llvm-svn: 45454
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
| | | | llvm-svn: 45418
* Add a argument to storeRegToStackSlot and storeRegToAddr to specify whetherEvan Cheng2007-12-051-1/+1
| | | | | | the stored register is killed. llvm-svn: 44600
* Long live the exception handling!Anton Korobeynikov2007-07-141-2/+2
| | | | | | | | | | | | | | | This patch fills the last necessary bits to enable exceptions handling in LLVM. Currently only on x86-32/linux. In fact, this patch adds necessary intrinsics (and their lowering) which represent really weird target-specific gcc builtins used inside unwinder. After corresponding llvm-gcc patch will land (easy) exceptions should be more or less workable. However, exceptions handling support should not be thought as 'finished': I expect many small and not so small glitches everywhere. llvm-svn: 39855
* Fix PR1424.Lauro Ramos Venancio2007-05-311-1/+1
| | | | | | | When a function has FP, the register scavenging spill slot offset already was calculated. llvm-svn: 37371
* Drop 'const'Devang Patel2007-05-031-2/+2
| | | | llvm-svn: 36662
* Use 'static const char' instead of 'static const int'.Devang Patel2007-05-021-2/+2
| | | | | | | Due to darwin gcc bug, one version of darwin linker coalesces static const int, which defauts PassID based pass identification. llvm-svn: 36652
* Do not use typeinfo to identify pass in pass manager.Devang Patel2007-05-011-0/+4
| | | | llvm-svn: 36632
* If call frame is not part of stack frame and no dynamic alloc, ↵Evan Cheng2007-05-011-14/+44
| | | | | | eliminateFrameIndex() must adjust SP offset with size of call frames. llvm-svn: 36625
* Under normal circumstances, when a frame pointer is not required, we reserveEvan Cheng2007-05-011-17/+14
| | | | | | | | | | | | argument space for call sites in the function immediately on entry to the current function. This eliminates the need for add/sub sp brackets around call sites. However, this is not always a good idea. If the "call frame" is large and the target load / store instructions have small immediate field to encode sp offset, this can cause poor codegen. In the worst case, this can make it impossible to scavenge a register if the reserved spill slot is pushed too far apart from sp / fp. llvm-svn: 36607
* Match MachineFunction::UsedPhysRegs changes.Evan Cheng2007-04-251-3/+2
| | | | llvm-svn: 36452
* support for >4G stack framesChris Lattner2007-04-251-1/+1
| | | | llvm-svn: 36425
* support > 4G stack objectsChris Lattner2007-04-251-2/+2
| | | | llvm-svn: 36422
* Fix a bug introduced with my previous patch, where it didn't correctly handleChris Lattner2007-04-091-7/+9
| | | | | | | instructions which replace themselves when FI's are rewritten (common on ppc). This fixes CodeGen/PowerPC/2006-10-17-ppc64-alloca.ll llvm-svn: 35789
* Fix CodeGen/Generic/2007-04-08-MultipleFrameIndices.ll and PR1308:Chris Lattner2007-04-091-1/+5
| | | | | | | some instructions can have multiple frame indices in them. If this happens, rewrite all of them. llvm-svn: 35785
* If target decides to create an emergency spill slot, make sure it's closest ↵Evan Cheng2007-03-061-7/+56
| | | | | | to SP or frame pointer. llvm-svn: 34965
* Delete register scavenger when done with it.Evan Cheng2007-03-011-0/+2
| | | | llvm-svn: 34786
* Interface clean up.Evan Cheng2007-03-011-1/+1
| | | | llvm-svn: 34772
* add a newline at end of fileChris Lattner2007-02-281-0/+1
| | | | llvm-svn: 34735
* Make requiresRegisterScavenging determination on a per MachineFunction basis.Evan Cheng2007-02-281-1/+1
| | | | llvm-svn: 34711
* MRegisterInfo disowns RegScavenger. It's immutable.Evan Cheng2007-02-281-2/+2
| | | | llvm-svn: 34706
* Let MRegisterInfo now owns RegScavenger.Evan Cheng2007-02-271-3/+3
| | | | llvm-svn: 34691
* forward() should not increment internal iterator. Its client may insert ↵Evan Cheng2007-02-271-1/+1
| | | | | | instruction between now and next forward() call. llvm-svn: 34649
* First potential client of register scavenger.Evan Cheng2007-02-231-4/+13
| | | | llvm-svn: 34516
* Change the MachineDebugInfo to MachineModuleInfo to better reflect usageJim Laskey2007-01-261-3/+3
| | | | | | for debugging and exception handling. llvm-svn: 33550
* Added a MRegisterInfo hook that tells PEI the target is responsible forEvan Cheng2007-01-251-2/+3
| | | | | | rounding the stack frame to a multiple of stack alignment. llvm-svn: 33504
* PEI is now responsible for adding MaxCallFrameSize to frame size and align ↵Evan Cheng2007-01-231-1/+16
| | | | | | the stack. Each target can further adjust the frame size if necessary. llvm-svn: 33460
* Remove an unused variable.Evan Cheng2007-01-201-1/+0
| | | | llvm-svn: 33396
* We not align the final stack slot but instead let the target do so in ↵Evan Cheng2007-01-201-7/+0
| | | | | | emitPrologue(). Each target can make adjustments to the stack frame and re-align the stack as it deem appropriate. Do not align it twice which can end up wasting stack space. llvm-svn: 33387
* - Fixing naming inconsistency: calleesave -> calleesaved.Evan Cheng2007-01-021-24/+30
| | | | | | - Make use of spillCalleeSavedRegisters() and restoreCalleeSavedRegisters(). llvm-svn: 32822
* Initialize {Min|Max}CSFrameIndex properly.Evan Cheng2006-12-071-2/+4
| | | | llvm-svn: 32299
* TargetRegisterClass specifies the desired spill alignment. However, it ↵Evan Cheng2006-09-281-1/+6
| | | | | | cannot be honored if stack alignment is smaller. llvm-svn: 30648
* PEI now place callee save spills closest to the address pointed to by theEvan Cheng2006-09-281-11/+67
| | | | | | | incoming stack. This allows X86 backend to use push / pop in epilogue / prologue. llvm-svn: 30636
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