| Commit message (Collapse) | Author | Age | Files | Lines |
... | |
|
|
|
|
|
|
| |
base registers were required. This will allow for slightly better packing
of the locals when alignment padding is necessary after callee saved registers.
llvm-svn: 111508
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
the local block. Resolve references to those indices to a new base register.
For simplification and testing purposes, a new virtual base register is
allocated for each frame index being resolved. The result is truly horrible,
but correct, code that's good for exercising the new code paths.
Next up is adding thumb1 support, which should be very simple. Following that
will be adding base register re-use and implementing a reasonable ARM
heuristic for when a virtual base register should be generated at all.
llvm-svn: 111315
|
|
|
|
| |
llvm-svn: 111206
|
|
|
|
|
|
|
|
|
|
| |
mapping. Have the local block track its alignment requirement, and then
apply that when the block itself is allocated. Previously, offsets could
get adjusted in PEI to be different, relative to one another, than the
block allocation thought they would be, which defeats the point of doing
the allocation this way. Continuing rdar://8277890
llvm-svn: 111197
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
experimental pass that allocates locals relative to one another before
register allocation and then assigns them to actual stack slots as a block
later in PEI. This will eventually allow targets with limited index offset
range to allocate additional base registers (not just FP and SP) to
more efficiently reference locals, as well as handle situations where
locals cannot be referenced via SP or FP at all (dynamic stack realignment
together with variable sized objects, for example). It's currently
incomplete and almost certainly buggy. Work in progress.
Disabled by default and gated via the -enable-local-stack-alloc command
line option.
rdar://8277890
llvm-svn: 111059
|
|
|
|
| |
llvm-svn: 110466
|
|
|
|
|
|
|
|
|
| |
protectors, to be near the stack protectors on the stack. Accomplish this by
tagging the stack object with a predicate that indicates that it would trigger
this. In the prolog-epilog inserter, assign these objects to the stack after the
stack protector but before the other objects.
llvm-svn: 109481
|
|
|
|
| |
llvm-svn: 109045
|
|
|
|
|
|
|
|
| |
the simplification of frame index register scavenging to not have to check
for available registers directly and instead just let scavengeRegister()
handle it.
llvm-svn: 107880
|
|
|
|
|
|
|
|
| |
(if there are any) and use the one which remains available for the longest
rather than just using the first one. This should help enable better re-use
of the loaded frame index values. rdar://7318760
llvm-svn: 107847
|
|
|
|
|
|
| |
slots so it's always false.
llvm-svn: 107550
|
|
|
|
|
|
|
|
|
|
|
|
| |
new basic blocks, and if used as a function argument, that can cause call frame
setup / destroy pairs to be split across a basic block boundary. That prevents
us from doing a simple assertion to check that the pairs match and alloc/
dealloc the same amount of space. Modify the assertion to only check the
amount allocated when there are matching pairs in the same basic block.
rdar://8022442
llvm-svn: 107517
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
PrologEpilog code, and use it to determine whether
the asm forces stack alignment or not. gcc consistently
does not do this for GCC-style asms; Apple gcc inconsistently
sometimes does it for asm blocks. There is no
convenient place to put a bit in either the SDNode or
the MachineInstr form, so I've added an extra operand
to each; unlovely, but it does allow for expansion for
more bits, should we need it. PR 5125. Some
existing testcases are affected.
The operand lists of the SDNode and MachineInstr forms
are indexed with awesome mnemonics, like "2"; I may
fix this someday, but not now. I'm not making it any
worse. If anyone is inspired I think you can find all
the right places from this patch.
llvm-svn: 107506
|
|
|
|
| |
llvm-svn: 105344
|
|
|
|
|
|
|
| |
backends and removes the virtual declaration. With that out of the way
I should be able to cleanup one backend at a time.
llvm-svn: 105321
|
|
|
|
| |
llvm-svn: 104421
|
|
|
|
|
|
|
|
|
| |
the variable actually tracks.
N.B., several back-ends are using "HasCalls" as being synonymous for something
that adjusts the stack. This isn't 100% correct and should be looked into.
llvm-svn: 103802
|
|
|
|
| |
llvm-svn: 103193
|
|
|
|
| |
llvm-svn: 102966
|
|
|
|
| |
llvm-svn: 102657
|
|
|
|
|
|
| |
the rest of CodeGen.
llvm-svn: 101146
|
|
|
|
| |
llvm-svn: 100415
|
|
|
|
| |
llvm-svn: 98109
|
|
|
|
|
|
|
|
|
|
| |
is preparatory to having PEI's scavenged frame index value reuse logic
properly distinguish types of frame values (e.g., whether the value is
stack-pointer relative or frame-pointer relative).
No functionality change.
llvm-svn: 98086
|
|
|
|
|
|
|
|
| |
126.gcc nightly tests. These failures uncovered latent bugs that machine DCE
could remove one half of a stack adjust down/up pair, causing PEI to assert.
This update fixes that, and the tests now pass.
llvm-svn: 96822
|
|
|
|
|
|
| |
the armv6 nightly tests.
llvm-svn: 96691
|
|
|
|
|
|
|
|
|
| |
for ARM to just check if a function has a FP to determine if it's safe
to simplify the stack adjustment pseudo ops prior to eliminating frame
indices. Allow targets to override the default behavior and does so for ARM
and Thumb2.
llvm-svn: 96634
|
|
|
|
|
|
|
|
|
|
| |
created. This ensures it's updated at all time. It means targets which perform
dynamic stack alignment would know whether it is required and whether frame
pointer register cannot be made available register allocation.
This is a fix for rdar://7625239. Sorry, I can't create a reasonably sized test
case.
llvm-svn: 96069
|
|
|
|
|
|
|
|
|
| |
into TargetOpcodes.h. #include the new TargetOpcodes.h
into MachineInstr. Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the
codebase.
llvm-svn: 95687
|
|
|
|
| |
llvm-svn: 92187
|
|
|
|
|
|
|
| |
This is used in some weird cases like general dynamic TLS model.
This fixes PR5723
llvm-svn: 91144
|
|
|
|
|
|
| |
Patch by Howard Hinnant!
llvm-svn: 90365
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
slots. The AsmPrinter will use this information to determine whether to
print a spill/reload comment.
Remove default argument values. It's too easy to pass a wrong argument
value when multiple arguments have default values. Make everything
explicit to trap bugs early.
Update all targets to adhere to the new interfaces..
llvm-svn: 87022
|
|
|
|
|
|
|
|
| |
indexed via the stack pointer, even if a frame pointer is present. Update the
heuristic to place it nearest the stack pointer in that case, rather than
nearest the frame pointer.
llvm-svn: 85474
|
|
|
|
|
|
| |
handles T2 and ARM use cases.
llvm-svn: 84761
|
|
|
|
| |
llvm-svn: 84657
|
|
|
|
|
|
| |
of the register in the instruction which kills the scavenged value.
llvm-svn: 84641
|
|
|
|
| |
llvm-svn: 84585
|
|
|
|
|
|
| |
get FixedStack PseudoSourceValues.
llvm-svn: 84326
|
|
|
|
| |
llvm-svn: 84138
|
|
|
|
| |
llvm-svn: 84133
|
|
|
|
| |
llvm-svn: 83653
|
|
|
|
| |
llvm-svn: 83521
|
|
|
|
|
|
| |
but are allocated by the scavenger. The re-use algorithm needs to watch for that.
llvm-svn: 83519
|
|
|
|
|
|
| |
what's up.
llvm-svn: 83501
|
|
|
|
| |
llvm-svn: 83496
|
|
|
|
| |
llvm-svn: 83483
|
|
|
|
| |
llvm-svn: 83481
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
a virtual register to eliminate a frame index, it can return that register
and the constant stored there to PEI to track. When scavenging to allocate
for those registers, PEI then tracks the last-used register and value, and
if it is still available and matches the value for the next index, reuses
the existing value rather and removes the re-materialization instructions.
Fancier tracking and adjustment of scavenger allocations to keep more
values live for longer is possible, but not yet implemented and would likely
be better done via a different, less special-purpose, approach to the
problem.
eliminateFrameIndex() is modified so the target implementations can return
the registers they wish to be tracked for reuse.
ARM Thumb1 implements and utilizes the new mechanism. All other targets are
simply modified to adjust for the changed eliminateFrameIndex() prototype.
llvm-svn: 83467
|
|
|
|
| |
llvm-svn: 83163
|