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path: root/llvm/lib/CodeGen/MachineVerifier.cpp
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* Don't assume that an instruction ending a register's live range always readsCameron Zwarich2010-12-201-4/+18
| | | | | | the register; it may be a dead def instead. Fixes PR8820. llvm-svn: 122218
* Ignore debug values when performing MachineVerifier liveness checks. FixesCameron Zwarich2010-12-201-1/+3
| | | | | | PR8822. llvm-svn: 122207
* Early clobber operands are allowed to be defined at use indices. This fixes oneCameron Zwarich2010-12-191-1/+1
| | | | | | half of PR8813. llvm-svn: 122205
* Fix PR8811 by teaching MachineVerifier about optional defs.Cameron Zwarich2010-12-191-3/+3
| | | | llvm-svn: 122199
* Pass a Banner argument to the machine code verifier both fromJakob Stoklund Olesen2010-12-181-9/+16
| | | | | | | | createMachineVerifierPass and MachineFunction::verify. The banner is printed before the machine code dump, just like the printer pass. llvm-svn: 122113
* Allow missing kill flags on an untied operand of a two-address instruction whenJakob Stoklund Olesen2010-12-171-1/+6
| | | | | | | | | | | | | | the operand uses the same register as a tied operand: %r1 = add %r1, %r1 If add were a three-address instruction, kill flags would be required on at least one of the uses. Since it is a two-address instruction, the tied use operand must not have a kill flag. This change makes the kill flag on the untied use operand optional. llvm-svn: 122082
* Only avoid the check if we're the last operand before the variableEric Christopher2010-11-171-3/+3
| | | | | | operands in a variadic instruction. llvm-svn: 119446
* Make the verifier a little quieter on instructions that it's probablyEric Christopher2010-11-161-1/+3
| | | | | | (and likely) wrong about anyhow. llvm-svn: 119320
* Be more precise about verifying missing kill flags.Jakob Stoklund Olesen2010-11-011-2/+4
| | | | | | | It is legal for an instruction to have two operands using the same register, only one a kill. This is interpreted as a kill. llvm-svn: 117981
* Add kill flag verification.Jakob Stoklund Olesen2010-11-011-2/+13
| | | | | | | | At least X86FloatingPoint requires correct kill flags after register allocation, and targets using register scavenging benefit. Conservative kill flags are not enough. llvm-svn: 117960
* Add basic LiveStacks verification.Jakob Stoklund Olesen2010-11-011-0/+20
| | | | | | | When an instruction refers to a spill slot with a LiveStacks entry, check that the spill slot is live at the instruction. llvm-svn: 117944
* Disable more of physical register live intervals verification.Jakob Stoklund Olesen2010-10-301-2/+3
| | | | llvm-svn: 117762
* Print out the connected components in the verifier after complaining about theirJakob Stoklund Olesen2010-10-291-0/+8
| | | | | | multiplicity. llvm-svn: 117630
* One day, physical register live ranges will be sensible.Jakob Stoklund Olesen2010-10-281-0/+5
| | | | llvm-svn: 117602
* Physical registers trivially have multiple connected components all the time.Jakob Stoklund Olesen2010-10-271-5/+7
| | | | | | Only virtuals should be requires to be connected. llvm-svn: 117422
* Verify that live intervals are connected. If there are multiple connectedJakob Stoklund Olesen2010-10-261-1/+9
| | | | | | components, each should get its own virtual register. llvm-svn: 117407
* Teach MachineBasicBlock::print() to annotate instructions and blocks withJakob Stoklund Olesen2010-10-261-2/+11
| | | | | | SlotIndexes when available. llvm-svn: 117392
* Remmeber to print full live interval on verification error.Jakob Stoklund Olesen2010-10-261-4/+7
| | | | llvm-svn: 117391
* Don't verify physical registers going into landing pads.Jakob Stoklund Olesen2010-10-261-0/+8
| | | | | | Magic is happening that we don't understand. llvm-svn: 117370
* Verify LiveIntervals against the CFG, ensuring that live-in values are live-outJakob Stoklund Olesen2010-10-231-1/+77
| | | | | | of all predecessors. llvm-svn: 117191
* Add more verification of LiveIntervals.Jakob Stoklund Olesen2010-10-221-0/+29
| | | | llvm-svn: 117170
* Permit landing pad successor blocks when verifying basic blocks that end in anJakob Stoklund Olesen2010-10-211-5/+13
| | | | | | unconditional branch. llvm-svn: 117041
* Get rid of static constructors for pass registration. Instead, every pass ↵Owen Anderson2010-10-191-1/+3
| | | | | | | | | | | | | | | | | exposes an initializeMyPassFunction(), which must be called in the pass's constructor. This function uses static dependency declarations to recursively initialize the pass's dependencies. Clients that only create passes through the createFooPass() APIs will require no changes. Clients that want to use the CommandLine options for passes will need to manually call the appropriate initialization functions in PassInitialization.h before parsing commandline arguments. I have tested this with all standard configurations of clang and llvm-gcc on Darwin. It is possible that there are problems with the static dependencies that will only be visible with non-standard options. If you encounter any crash in pass registration/creation, please send the testcase to me directly. llvm-svn: 116820
* Now with fewer extraneous semicolons!Owen Anderson2010-10-071-1/+1
| | | | llvm-svn: 115996
* Skip unused registers when verifying LiveIntervals.Jakob Stoklund Olesen2010-10-061-0/+5
| | | | llvm-svn: 115874
* Stop using LiveRange in MachineVerifier.Jakob Stoklund Olesen2010-10-021-16/+15
| | | | llvm-svn: 115408
* Now that PassInfo and Pass::ID have been separated, move the rest of the ↵Owen Anderson2010-08-231-3/+2
| | | | | | passes over to the new registration API. llvm-svn: 111815
* Correct header.Bill Wendling2010-08-191-1/+1
| | | | llvm-svn: 111540
* Reapply r110396, with fixes to appease the Linux buildbot gods.Owen Anderson2010-08-061-1/+1
| | | | llvm-svn: 110460
* Add more verification of LiveIntervals.Jakob Stoklund Olesen2010-08-061-4/+58
| | | | llvm-svn: 110454
* Don't try to verify LiveIntervals for physical registers.Jakob Stoklund Olesen2010-08-061-8/+4
| | | | | | | | | When a physical register is in use, some alias of that register has a live interval with a relevant live range. That is the sad state of intervals after physreg coalescing of subregs, and it is good enough for correct register allocation. llvm-svn: 110452
* Revert r110396 to fix buildbots.Owen Anderson2010-08-061-1/+1
| | | | llvm-svn: 110410
* Don't verify LiveVariables if LiveIntervals is available.Jakob Stoklund Olesen2010-08-051-12/+13
| | | | | | | | LiveVariables becomes horribly wrong while the coalescer is running, but the analysis is not zapped until after the coalescer pass has run. This causes tons of false reports when calling verify form the coalescer. llvm-svn: 110402
* Don't use PassInfo* as a type identifier for passes. Instead, use the ↵Owen Anderson2010-08-051-1/+1
| | | | | | | | address of the static ID member as the sole unique type identifier. Clean up APIs related to this change. llvm-svn: 110396
* Add basic verification of LiveIntervals.Jakob Stoklund Olesen2010-08-051-0/+59
| | | | | | | | | | | | | | We verify that the LiveInterval is live at uses and defs, and that all instructions have a SlotIndex. Stuff we don't check yet: - Is the LiveInterval minimal? - Do all defs correspond to instructions or phis? - Do all defs dominate all their live ranges? - Are all live ranges continually reachable from their def? llvm-svn: 110386
* Remove double-def checking from MachineVerifier, so a register does not have toJakob Stoklund Olesen2010-08-051-76/+11
| | | | | | | | | | be killed before being redefined. These checks are usually disabled, and usually fail when enabled. We de facto allow live registers to be redefined without a kill, the corresponding assertions in RegScavenger were removed long ago. llvm-svn: 110362
* Allow ARM if-converter to be run after post allocation scheduling.Evan Cheng2010-06-181-1/+2
| | | | | | | | | | | | | | | | - This fixed a number of bugs in if-converter, tail merging, and post-allocation scheduler. If-converter now runs branch folding / tail merging first to maximize if-conversion opportunities. - Also changed the t2IT instruction slightly. It now defines the ITSTATE register which is read by instructions in the IT block. - Added Thumb2 specific hazard recognizer to ensure the scheduler doesn't change the instruction ordering in the IT block (since IT mask has been finalized). It also ensures no other instructions can be scheduled between instructions in the IT block. This is not yet enabled. llvm-svn: 106344
* Teach the machine code verifier to use getSubRegisterRegClass().Jakob Stoklund Olesen2010-05-181-2/+5
| | | | | | The old approach was wrong. It had an off-by-one error. llvm-svn: 104034
* When verifying two-address instructions, check the following:Jakob Stoklund Olesen2010-05-141-12/+16
| | | | | | | | | - Kill is implicit when use and def registers are identical. - Only virtual registers can differ. Add a -verify-fast-regalloc to run the verifier before the fast allocator. llvm-svn: 103797
* Fix a bunch of namespace polution.Dan Gohman2010-04-151-2/+2
| | | | llvm-svn: 101376
* Eliminate MachineBasicBlock::const_livein_iterator and makeDan Gohman2010-04-131-1/+1
| | | | | | | | MachineBasicBlock::livein_iterator a const_iterator, because clients shouldn't ever be using the iterator interface to mutate the livein set. llvm-svn: 101147
* rename llvm::llvm_report_error -> llvm::report_fatal_errorChris Lattner2010-04-071-1/+1
| | | | llvm-svn: 100709
* move target-independent opcodes out of TargetInstrInfoChris Lattner2010-02-091-6/+4
| | | | | | | | | into TargetOpcodes.h. #include the new TargetOpcodes.h into MachineInstr. Add new inline accessors (like isPHI()) to MachineInstr, and start using them throughout the codebase. llvm-svn: 95687
* Remove livein checks from machine code verifier.Jakob Stoklund Olesen2010-01-051-99/+13
| | | | | | | | | | | A phi operand that is implicitly defined in a predecessor becomes an undefined register after phi elimination. This causes a lot of false positives when the verifier is checking if live-in registers are live-out from all predecessors. Removing the verifier checks seems like a better solution than insisting on IMPLICIT_DEF instructions in predecessor blocks. llvm-svn: 92769
* Remove minimal CFG sanity checks from verifier.Jakob Stoklund Olesen2009-12-221-18/+0
| | | | | | | | | These checks would often trigger on unreachable statements inserted by bugpoint, leading it astray. It would be nice if we could distinguish unreachable blocks from errors. llvm-svn: 91923
* Allow explicit %reg0 operands beyond what the .td file describes.Jakob Stoklund Olesen2009-12-221-1/+2
| | | | | | ARM uses these to indicate predicates. llvm-svn: 91922
* Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor ofDan Gohman2009-12-051-9/+0
| | | | | | | MachineBasicBlock::canFallThrough(), which is target-independent and more thorough. llvm-svn: 90634
* Add MachineBasicBlock::getName, and use it in place of getBasicBlock()->getName.Jakob Stoklund Olesen2009-11-201-1/+1
| | | | | | Fix debug code that assumes getBasicBlock never returns NULL. llvm-svn: 89428
* Allow the machine verifier to be run outside the PassManager.Jakob Stoklund Olesen2009-11-181-17/+160
| | | | | | Verify LiveVariables information when present. llvm-svn: 89241
* Add MachineFunction::verify() to call the machine code verifier directly.Jakob Stoklund Olesen2009-11-131-0/+4
| | | | llvm-svn: 88706
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