| Commit message (Collapse) | Author | Age | Files | Lines | ||
|---|---|---|---|---|---|---|
| ... | ||||||
| * | misched: Added ScheduleDAGInstrs::IsPostRA | Andrew Trick | 2012-01-14 | 1 | -2/+2 | |
| | | | | | llvm-svn: 148172 | |||||
| * | misched: Invoke the DAG builder on each sequence of schedulable instructions. | Andrew Trick | 2012-01-14 | 1 | -6/+31 | |
| | | | | | llvm-svn: 148171 | |||||
| * | Move things around to make the file navigable, even though it will probably ↵ | Andrew Trick | 2012-01-14 | 1 | -19/+32 | |
| | | | | | | | be split up later. llvm-svn: 148170 | |||||
| * | Added the MachineSchedulerPass skeleton. | Andrew Trick | 2012-01-13 | 1 | -0/+233 | |
| llvm-svn: 148105 | ||||||
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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