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path: root/llvm/lib/CodeGen/MachinePipeliner.cpp
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* [CodeGen] Convert a loop to a for-each loop. NFCJustin Lebar2016-08-231-7/+5
| | | | llvm-svn: 279536
* [Pipeliner] Fix an asssert due to invalid Phi in the epilogBrendon Cahoon2016-08-161-2/+1
| | | | | | | | | | | | The pipeliner was generating an invalid Phi name for an operand in the epilog block, which caused an assert in the live variable analysis pass. The fix is to the code that generates new Phis in the epilog block. In this case, there is an existing Phi that needs to be reused rather than creating a new Phi instruction. Differential Revision: https://reviews.llvm.org/D23513 llvm-svn: 278805
* Minor comment fix ("generate" --> "generates").Justin Lebar2016-08-121-1/+1
| | | | llvm-svn: 278578
* Fix some Clang-tidy modernize and Include What You Use warnings.Eugene Zelenko2016-08-111-16/+42
| | | | | | Differential revision: https://reviews.llvm.org/D23291 llvm-svn: 278364
* Move helpers into anonymous namespaces. NFC.Benjamin Kramer2016-08-061-2/+3
| | | | llvm-svn: 277916
* Replace MachineInstr* with MachineInstr& in TargetInstrInfo, NFCKrzysztof Parzyszek2016-08-011-9/+9
| | | | | | There were a few cases introduced with the modulo scheduler. llvm-svn: 277358
* Fixed (incorrectly firing) MSVC unused variable warningSimon Pilgrim2016-07-291-2/+1
| | | | llvm-svn: 277198
* MachinePipeliner pass that implements Swing Modulo SchedulingBrendon Cahoon2016-07-291-0/+3943
Software pipelining is an optimization for improving ILP by overlapping loop iterations. Swing Modulo Scheduling (SMS) is an implementation of software pipelining that attempts to reduce register pressure and generate efficient pipelines with a low compile-time cost. This implementaion of SMS is a target-independent back-end pass. When enabled, the pass should run just prior to the register allocation pass, while the machine IR is in SSA form. If the pass is successful, then the original loop is replaced by the optimized loop. The optimized loop contains one or more prolog blocks, the pipelined kernel, and one or more epilog blocks. This pass is enabled for Hexagon only. To enable for other targets, a couple of target specific hooks must be implemented, and the pass needs to be called from the target's TargetMachine implementation. Differential Review: http://reviews.llvm.org/D16829 llvm-svn: 277169
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