| Commit message (Collapse) | Author | Age | Files | Lines |
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expensive
subregister query, and by increasing the size of the subregister hashtable so
that there are fewer collisions.
llvm-svn: 54781
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a new ilist_node class, and remove them. Unlike alist_node,
ilist_node doesn't attempt to manage storage itself, so it avoids
the associated problems, including being opaque in gdb.
Adjust the Recycler class so that it doesn't depend on alist_node.
Also, change it to use explicit Size and Align parameters, allowing
it to work when the largest-sized node doesn't have the greatest
alignment requirement.
Change MachineInstr's MachineMemOperand list from a pool-backed
alist to a std::list for now.
llvm-svn: 54146
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in the MachineInstr clone code.
llvm-svn: 53868
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llvm-svn: 53779
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Fix a leak that this turned up in LowerSubregs.cpp.
And, comment a leak in LiveIntervalAnalysis.cpp.
llvm-svn: 53746
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llvm-svn: 53680
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llvm-svn: 53471
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the operand index of def machineoperand and at most one full scan of non-implicit operands is needed.
- Change local register allocator to use the new isRegReDefinedByTwoAddr instead of reinventing the wheel.
llvm-svn: 53394
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parent is non-null. It now always is.
llvm-svn: 53263
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llvm-svn: 53262
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MachineMemOperands. The pools are owned by MachineFunctions.
This drastically reduces the number of calls to malloc/free made
during the "Emit" phase of scheduling, as well as later phases
in CodeGen. Combined with other changes, this speeds up the
"instruction selection" phase of CodeGen by 10% in some cases.
llvm-svn: 53212
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#include dependency on Support/MathExtras.h in the header file.
llvm-svn: 53200
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propagate kill / dead markers as new instructions are constructed in foldMemoryOperand, convertToThressAddress, etc.
- Also remove LiveVariables::instructionChanged, etc. Replace all calls with cheaper calls which update VarInfo kill list.
llvm-svn: 53097
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254.gap failure was not due to this mod.
llvm-svn: 53068
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llvm-svn: 53050
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llvm-svn: 52988
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the need for a flavor operand, and add a new SDNode subclass,
LabelSDNode, for use with them to eliminate the need for a label id
operand.
Change instruction selection to let these label nodes through
unmodified instead of creating copies of them. Teach the MachineInstr
emitter how to emit a MachineInstr directly from an ISD label node.
This avoids the need for allocating SDNodes for the label id and
flavor value, as well as SDNodes for each of the post-isel label,
label id, and label flavor.
llvm-svn: 52943
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llvm-svn: 52841
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know that there aren't any.
This speed up LiveVariables on instcombine at -O0 -g from 0.3855s to 0.3503s. Look for more improvements in this area soon!
llvm-svn: 52804
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instruction to execute. This can be used for transformations (like two-address
conversion) to remat an instruction instead of generating a "move"
instruction. The idea is to decrease the live ranges and register pressure and
all that jazz.
llvm-svn: 51660
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llvm-svn: 50687
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llvm-svn: 49783
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review feedback from Chris quite a while ago. No functionality
change.
llvm-svn: 49348
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llvm-svn: 48577
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llvm-svn: 48311
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findRegisterUseOperandIdx, findRegisterDefOperandIndx. Fix some naming inconsistencies.
llvm-svn: 47927
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llvm-svn: 47875
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- Cleaned up how the prologue-epilogue inserter loops over the instructions.
- Instead of restarting the processing of an instruction if we remove an
implicit kill, just update the end iterator and make sure that the iterator
isn't incremented.
llvm-svn: 47870
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marking both a super- and sub-register as "killed". This removes implicit uses
that are marked as "killed".
llvm-svn: 47862
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llvm-svn: 47629
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%r3 on PPC) in their ASM files. However, it's hard for humans to read
during debugging. Adding a new field to the register data that lets you
specify a different name to be printed than the one that goes into the
ASM file -- %x3 instead of %r3, for instance.
llvm-svn: 47534
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FP Immediates, crazily enough
llvm-svn: 47117
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llvm-svn: 46930
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llvm-svn: 46895
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as <unknown>. And make some minor adjustments to the MemOperand
dump format.
llvm-svn: 46853
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initializer problem, a minor tweak to the way the
DAGISelEmitter finds load/store nodes, and a renaming of the
new PseudoSourceValue objects.
llvm-svn: 46827
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re-commit.
llvm-svn: 46623
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or misc labels. This fixes the EH breakage. However I am not convinced this is *the* solution.
llvm-svn: 46609
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in the backend. Introduce a new SDNode type, MemOperandSDNode, for
holding a MemOperand in the SelectionDAG IR, and add a MemOperand
list to MachineInstr, and code to manage them. Remove the offset
field from SrcValueSDNode; uses of SrcValueSDNode that were using
it are all all using MemOperandSDNode now.
Also, begin updating some getLoad and getStore calls to use the
PseudoSourceValue objects.
Most of this was written by Florian Brander, some
reorganization and updating to TOT by me.
llvm-svn: 46585
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MachineInstr rather than LiveVariables.
llvm-svn: 46295
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llvm-svn: 45697
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Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.
llvm-svn: 45695
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Evan, please review the comments I added to getNumDefs to make sure
that they are accurate, thx.
llvm-svn: 45687
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llvm-svn: 45680
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over to using them, instead of diddling Flags directly. Change the
various flags from const variables to enums.
llvm-svn: 45677
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that it is cheap and efficient to get.
Move a variety of predicates from TargetInstrInfo into
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around. Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.
Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.
llvm-svn: 45674
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def of the vreg at the start of the list, so the list doesn't need to be traversed.
llvm-svn: 45483
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dereferencing
it now returns the machineinstr of the use. To get the operand, use I.getOperand().
Add a new MachineRegisterInfo::replaceRegWith, which is basically like
Value::replaceAllUsesWith.
llvm-svn: 45482
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operands. The lists are currently kept in MachineRegisterInfo, but it does
not yet provide an iterator interface to them.
llvm-svn: 45477
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llvm-svn: 45469
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