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path: root/llvm/lib/CodeGen/MachineInstr.cpp
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* Give RemoveRegOperandFromRegInfo a comment and move theDan Gohman2009-04-151-0/+15
| | | | | | code out of line. llvm-svn: 69124
* ignore register zero in isRegTiedToUseOperand, following the example ofChris Lattner2009-04-091-1/+1
| | | | | | isRegTiedToDefOperand. Thanks to Bob for pointing this out! llvm-svn: 68734
* Fix pr3954. The register scavenger asserts for inline assembly withBob Wilson2009-04-091-9/+17
| | | | | | | | | | | | register destinations that are tied to source operands. The TargetInstrDescr::findTiedToSrcOperand method silently fails for inline assembly. The existing MachineInstr::isRegReDefinedByTwoAddr was very close to doing what is needed, so this revision makes a few changes to that method and also renames it to isRegTiedToUseOperand (for consistency with the very similar isRegTiedToDefOperand and because it handles both two-address instructions and inline assembly with tied registers). llvm-svn: 68714
* reg0 references are not real registers. This fixes a crash on the Chris Lattner2009-04-091-1/+1
| | | | | | attached testcase. llvm-svn: 68712
* Model inline asm constraint which ties an input to an output register as ↵Evan Cheng2009-03-231-1/+60
| | | | | | machine operand TIED_TO constraint. This eliminated the need to pre-allocate registers for these. This also allows register allocator can eliminate the unneeded copies. llvm-svn: 67512
* Added MachineInstr::isRegTiedToDefOperand to check for two-addressness.Evan Cheng2009-03-191-1/+19
| | | | llvm-svn: 67335
* Print out debug info when printing the machine instruction.Bill Wendling2009-02-191-0/+9
| | | | llvm-svn: 65067
* Add a DebugLoc field and some simple accessors.Dale Johannesen2009-01-271-7/+46
| | | | llvm-svn: 63152
* Use isTerminator() instead of isBranch()||isReturn() inDan Gohman2008-12-231-1/+1
| | | | | | | | several places. isTerminator() returns true for a superset of cases, and includes things like FP_REG_KILL, which are nither return or branch but aren't safe to move/remat/etc. llvm-svn: 61373
* Print subreg information in MachineInstr::dump.Dan Gohman2008-12-181-1/+5
| | | | llvm-svn: 61213
* Minor code simplification.Dan Gohman2008-12-091-3/+3
| | | | llvm-svn: 60804
* Drop the reg argument to isRegReDefinedByTwoAddr, which was redundant.Dan Gohman2008-12-051-3/+4
| | | | llvm-svn: 60586
* Add more const qualifiers. This fixes build breakage from r59540.Dan Gohman2008-11-181-1/+1
| | | | llvm-svn: 59542
* Make some methods const.Dan Gohman2008-11-181-2/+4
| | | | llvm-svn: 59540
* Added missing print functions that take a raw_ostreamMon P Wang2008-10-101-2/+11
| | | | llvm-svn: 57339
* Switch the MachineOperand accessors back to the short names likeDan Gohman2008-10-031-24/+24
| | | | | | isReg, etc., from isRegister, etc. llvm-svn: 57006
* Fix a think-o in isSafeToMove. This fixes it from thinking thatDan Gohman2008-10-021-1/+1
| | | | | | volatile memory references are safe to move. llvm-svn: 56948
* Next round of earlyclobber handling. Approach theDale Johannesen2008-09-241-8/+1
| | | | | | | | | | RA problem by expanding the live interval of an earlyclobber def back one slot. Remove overlap-earlyclobber throughout. Remove earlyclobber bits and their handling from live internals. llvm-svn: 56539
* Add a method to MachineInstr for testing whether it makesDan Gohman2008-09-241-9/+30
| | | | | | any volatile memory references. llvm-svn: 56528
* Add a bit to mark operands of asm's that conflictDale Johannesen2008-09-171-1/+10
| | | | | | | | | with an earlyclobber operand elsewhere. Propagate this bit and the earlyclobber bit through SDISel. Change linear-scan RA not to allocate regs in a way that conflicts with an earlyclobber. See also comments. llvm-svn: 56290
* adjust last patch per review feedbackDale Johannesen2008-09-141-3/+3
| | | | llvm-svn: 56194
* Remove isImm(), isReg(), and friends, in favor of Dan Gohman2008-09-131-15/+15
| | | | | | | | | isImmediate(), isRegister(), and friends, to avoid confusion about having two different names with the same meaning. I'm not attached to the longer names, and would be ok with changing to the shorter names if others prefer it. llvm-svn: 56189
* Pass "earlyclobber" bit through to machineDale Johannesen2008-09-121-2/+6
| | | | | | | representation; coalescer and RA need to know about it. No functional change. llvm-svn: 56161
* Fix addRegisterDead and addRegisterKilled to be more thoroughDan Gohman2008-09-031-19/+34
| | | | | | | | | | | | | | | | when searching for redundant subregister dead/kill bits. Previously it was common to see instructions marked like this: "RET %EAX<imp-use,kill>, %AX<imp-use,kill>" With this change, addRegisterKilled continues scanning after finding the %EAX operand, so it proceeds to discover the redundant %AX kill and eliminates it, producing this: "RET %EAX<imp-use,kill>" This currently has no effect on the generated code. llvm-svn: 55698
* Fold isRematerializable checks into isSafeToReMat.Evan Cheng2008-08-301-1/+3
| | | | llvm-svn: 55563
* Move the check whether it's worth remating to caller.Evan Cheng2008-08-271-3/+1
| | | | llvm-svn: 55434
* Refactor isSafeToReMat out of 2addr pass.Evan Cheng2008-08-271-0/+25
| | | | llvm-svn: 55430
* simplify PseudoSourceValue printing a bit. Unnest all of ↵Chris Lattner2008-08-241-3/+5
| | | | | | PseudoSourceValue.cpp from the llvm namespace. llvm-svn: 55293
* Print PseudoSourceValue.Evan Cheng2008-08-241-2/+2
| | | | llvm-svn: 55291
* Change the FoldingSetNodeID usage for objects which carryDan Gohman2008-08-201-0/+10
| | | | | | | | alignment and volatility information, such as loads and stores, to reduce the number of integer values added to the FoldingSetNodeID. llvm-svn: 55058
* Move MachineInstr::getOpcode inline.Owen Anderson2008-08-141-6/+0
| | | | llvm-svn: 54807
* Speed up addRegisterDead by adding more fast checks before performing the ↵Owen Anderson2008-08-141-1/+3
| | | | | | | | | expensive subregister query, and by increasing the size of the subregister hashtable so that there are fewer collisions. llvm-svn: 54781
* Fold the useful features of alist and alist_node into ilist, andDan Gohman2008-07-281-5/+4
| | | | | | | | | | | | | | | | a new ilist_node class, and remove them. Unlike alist_node, ilist_node doesn't attempt to manage storage itself, so it avoids the associated problems, including being opaque in gdb. Adjust the Recycler class so that it doesn't depend on alist_node. Also, change it to use explicit Size and Align parameters, allowing it to work when the largest-sized node doesn't have the greatest alignment requirement. Change MachineInstr's MachineMemOperand list from a pool-backed alist to a std::list for now. llvm-svn: 54146
* Now that the MachineInstr leaks are fixed, enable leak checkingDan Gohman2008-07-211-0/+2
| | | | | | in the MachineInstr clone code. llvm-svn: 53868
* Fix a memory leak in LiveIntervalAnalysis.Evan Cheng2008-07-191-7/+5
| | | | llvm-svn: 53779
* Re-introduce LeakDetector support for MachineInstrs and MachineBasicBlocks.Dan Gohman2008-07-171-0/+8
| | | | | | | Fix a leak that this turned up in LowerSubregs.cpp. And, comment a leak in LiveIntervalAnalysis.cpp. llvm-svn: 53746
* Add an assert to check for empty flags for MachineMemOperand.Dan Gohman2008-07-161-0/+1
| | | | llvm-svn: 53680
* Trim unnecessary #includes.Dan Gohman2008-07-111-1/+0
| | | | llvm-svn: 53471
* - Change the horrible N^2 isRegReDefinedByTwoAddr. Now callers must supply ↵Evan Cheng2008-07-101-13/+8
| | | | | | | | the operand index of def machineoperand and at most one full scan of non-implicit operands is needed. - Change local register allocator to use the new isRegReDefinedByTwoAddr instead of reinventing the wheel. llvm-svn: 53394
* It's no longer necessary to test if a MachineBasicBlock'sDan Gohman2008-07-081-2/+1
| | | | | | parent is non-null. It now always is. llvm-svn: 53263
* Verify that MachineMemOperand alignment is a non-zero power of 2.Dan Gohman2008-07-081-0/+1
| | | | llvm-svn: 53262
* Pool-allocation for MachineInstrs, MachineBasicBlocks, andDan Gohman2008-07-071-17/+34
| | | | | | | | | | | MachineMemOperands. The pools are owned by MachineFunctions. This drastically reduces the number of calls to malloc/free made during the "Emit" phase of scheduling, as well as later phases in CodeGen. Combined with other changes, this speeds up the "instruction selection" phase of CodeGen by 10% in some cases. llvm-svn: 53212
* Move MachineMemOperand's constructor out of line, to avoid aDan Gohman2008-07-071-0/+11
| | | | | | #include dependency on Support/MathExtras.h in the header file. llvm-svn: 53200
* - Remove calls to copyKillDeadInfo which is an N^2 function. Instead, ↵Evan Cheng2008-07-031-27/+3
| | | | | | | | propagate kill / dead markers as new instructions are constructed in foldMemoryOperand, convertToThressAddress, etc. - Also remove LiveVariables::instructionChanged, etc. Replace all calls with cheaper calls which update VarInfo kill list. llvm-svn: 53097
* Reapply r52988, "Simplify addRegisterKilled and addRegisterDead." TheDan Gohman2008-07-031-18/+18
| | | | | | 254.gap failure was not due to this mod. llvm-svn: 53068
* Revert r52988. It broke 254.gap on x86-64.Dan Gohman2008-07-021-18/+18
| | | | llvm-svn: 53050
* Simplify addRegisterKilled and addRegisterDead.Evan Cheng2008-07-011-18/+18
| | | | llvm-svn: 52988
* Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminatingDan Gohman2008-07-011-1/+9
| | | | | | | | | | | | | | | | the need for a flavor operand, and add a new SDNode subclass, LabelSDNode, for use with them to eliminate the need for a label id operand. Change instruction selection to let these label nodes through unmodified instead of creating copies of them. Teach the MachineInstr emitter how to emit a MachineInstr directly from an ISD label node. This avoids the need for allocating SDNodes for the label id and flavor value, as well as SDNodes for each of the post-isel label, label id, and label flavor. llvm-svn: 52943
* Looks like this condition is inverted.Evan Cheng2008-06-271-2/+2
| | | | llvm-svn: 52841
* Don't perform expensive queries checking for super and sub registers when we ↵Owen Anderson2008-06-271-1/+2
| | | | | | | | know that there aren't any. This speed up LiveVariables on instcombine at -O0 -g from 0.3855s to 0.3503s. Look for more improvements in this area soon! llvm-svn: 52804
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