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* MIR Serialization: Serialize the 'undef' register machine operand flag.Alex Lorenz2015-07-081-0/+2
| | | | llvm-svn: 241762
* MIR Serialization: Serialize the 'killed' register machine operand flag.Alex Lorenz2015-07-081-0/+2
| | | | llvm-svn: 241734
* MIR Parser: Use source locations for MBB naming errors.Alex Lorenz2015-07-081-2/+2
| | | | | | | | | This commit changes the type of the field 'Name' in the struct 'yaml::MachineBasicBlock' from 'std::string' to 'yaml::StringValue'. This change allows the MIR parser to report errors related to the MBB name with the proper source locations. llvm-svn: 241718
* MIR Printer: Use a module slot tracker to print global address operands. NFC.Alex Lorenz2015-07-071-13/+12
| | | | | | | | | This commit adopts the 'ModuleSlotTracker' class, which was surfaced in r240842, to print the global address operands. This change ensures that the slot tracker won't have to be recreated every time a global address operand is printed, making the MIR printing more efficient. llvm-svn: 241645
* MIR Serialization: Serialize the 'dead' register machine operand flag.Alex Lorenz2015-07-071-0/+2
| | | | llvm-svn: 241624
* MIR Serialization: Serialize the implicit register flag.Alex Lorenz2015-07-061-1/+3
| | | | | | | | | | | | | | This commit serializes the implicit flag for the register machine operands. It introduces two new keywords into the machine instruction syntax: 'implicit' and 'implicit-def'. The 'implicit' keyword is used for the implicit register operands, and the 'implicit-def' keyword is used for the register operands that have both the implicit and the define flags set. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10709 llvm-svn: 241519
* Fix compilation failure introduced in r241093.Alex Lorenz2015-06-301-2/+2
| | | | llvm-svn: 241096
* MIR Serialization: Serialize MBB successors.Alex Lorenz2015-06-301-0/+6
| | | | | | | | | | | | | This commit implements serialization of the machine basic block successors. It uses a YAML flow sequence that contains strings that have the MBB references. The MBB references in those strings use the same syntax as the MBB machine operands in the machine instruction strings. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10699 llvm-svn: 241093
* MIR Printer: extract the code that prints MBB references into a new method. NFC.Alex Lorenz2015-06-301-5/+10
| | | | | | | This commit enables the MIR printer to reuse the code that prints MBB references. llvm-svn: 241087
* MIR Serialization: Serialize the register mask machine operands.Alex Lorenz2015-06-291-2/+26
| | | | | | | | | | | | | | | | | This commit implements serialization of the register mask machine operands. This commit serializes only the call preserved register masks that are defined by a target, it doesn't serialize arbitrary register masks. This commit also extends the TargetRegisterInfo class and TableGen so that the users of TRI can get the list of all the call preserved register masks and their names. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10673 llvm-svn: 240966
* MIR Serialization: Serialize global address machine operands.Alex Lorenz2015-06-261-5/+15
| | | | | | | | | | | | This commit serializes the global address machine operands. This commit doesn't serialize the operand's offset and target flags, it serializes only the global value reference. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10671 llvm-svn: 240851
* Fix unused variable from r240792.Alex Lorenz2015-06-261-0/+1
| | | | | | | The variable 'I' wasn't used when assertions were disabled. This commit ensures that 'I' is used outside of an assert. llvm-svn: 240797
* MIR Serialization: Serialize machine basic block operands.Alex Lorenz2015-06-261-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | This commit serializes machine basic block operands. The machine basic block operands use the following syntax: %bb.<id>[.<name>] This commit also modifies the YAML representation for the machine basic blocks - a new, required field 'id' is added to the MBB YAML mapping. The id is used to resolve the MBB references to the actual MBBs. And while the name of the MBB can be included in a MBB reference, this name isn't used to resolve MBB references - as it's possible that multiple MBBs will reference the same BB and thus they will have the same name. If the name is specified, the parser will verify that it is equal to the name of the MBB with the specified id. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10608 llvm-svn: 240792
* MIR Serialization: Serialize simple MachineRegisterInfo attributes.Alex Lorenz2015-06-241-0/+10
| | | | | | | | | | | | | This commit serializes the 3 scalar boolean attributes from the MachineRegisterInfo class: IsSSA, TracksRegLiveness, and TracksSubRegLiveness. These attributes are serialized as part of the machine function YAML mapping. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10618 llvm-svn: 240579
* MIR Serialization: Serialize the null register operands.Alex Lorenz2015-06-241-2/+3
| | | | | | | | | | | | This commit serializes the null register machine operands. It uses the '_' keyword to represent them, but the parser also allows the '%noreg' named register syntax. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10580 llvm-svn: 240558
* MIR Serialization: Serialize immediate machine operands.Alex Lorenz2015-06-231-0/+3
| | | | | | | | Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10573 llvm-svn: 240481
* MIR Serialization: Serialize physical register machine operands.Alex Lorenz2015-06-231-1/+49
| | | | | | | | | | | This commit introduces functionality that's used to serialize machine operands. Only the physical register operands are serialized by this commit. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10525 llvm-svn: 240425
* MIR Serialization: Serialize machine instruction names.Alex Lorenz2015-06-221-0/+32
| | | | | | | | | | | | | | | | This commit implements initial machine instruction serialization. It serializes machine instruction names. The instructions are represented using a YAML sequence of string literals and are a part of machine basic block YAML mapping. This commit introduces a class called 'MIParser' which will be used to parse the machine instructions and operands. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10481 llvm-svn: 240295
* MIR Serialization: Serialize the list of machine basic blocks with simple ↵Alex Lorenz2015-06-191-0/+20
| | | | | | | | | | | | | | attributes. This commit implements the initial serialization of machine basic blocks in a machine function. Only the simple, scalar MBB attributes are serialized. The reference to LLVM IR's basic block is preserved when that basic block has a name. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10465 llvm-svn: 240145
* MIR Serialization: Print and parse simple machine function attributes.Alex Lorenz2015-06-161-0/+3
| | | | | | | | | | | This commit serializes the simple, scalar attributes from the 'MachineFunction' class. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10449 llvm-svn: 239790
* MIR Serialization: move the MIR printer out of the MIR printing pass.Alex Lorenz2015-06-151-0/+73
This commit decouples the MIR printer and the MIR printing pass so that it will be possible to move the MIR printer into a separate machine IR library later on. Reviewers: Duncan P. N. Exon Smith llvm-svn: 239788
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