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path: root/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
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* [MIR] Add support for debug metadata for fixed stack objectsFrancis Visoiu Mistrih2018-04-251-4/+7
* [MIR] Add support for MachineFrameInfo::LocalFrameSizeFrancis Visoiu Mistrih2018-04-061-0/+1
* [MIR] Adding support for Named Virtual Registers in MIR.Puyan Lotfi2018-03-301-3/+13
* [GlobalISel] Print/Parse FailedISel MachineFunction propertyRoman Tereshin2018-02-281-0/+2
* LLParser: add an argument for overriding data layout and do not check alloca ...Yaxun Liu2018-01-301-1/+1
* AArch64: Fix emergency spillslot being out of reach for large callframesMatthias Braun2018-01-191-0/+2
* Revert "AArch64: Fix emergency spillslot being out of reach for large callfra...Matthias Braun2018-01-101-2/+0
* AArch64: Fix emergency spillslot being out of reach for large callframesMatthias Braun2018-01-101-0/+2
* MachineFunction: Return reference from getFunction(); NFCMatthias Braun2017-12-151-2/+2
* MIRParser: Avoid reading uninitialized memory on generic vregsJustin Bogner2017-11-171-0/+1
* Add DK_Remark to SMDiagnosticAdam Nemet2017-10-121-0/+3
* MIR: Serialize CaleeSavedInfo Restored flagMatthias Braun2017-09-281-5/+7
* [MIR] Print target-specific constant poolsDiana Picus2017-08-021-0/+4
* Add an ID field to StackObjectsMatt Arsenault2017-07-201-0/+3
* llc: Add ability to parse mir from stdinMatthias Braun2017-06-061-1/+1
* CodeGen: Refactor MIR parsingMatthias Braun2017-06-061-57/+79
* MIR: remove explicit "noVRegs" property.Tim Northover2017-05-301-2/+0
* MachineFrameInfo: Track whether MaxCallFrameSize is computed yet; NFCMatthias Braun2017-05-011-1/+2
* MIR: Allow parsing of empty machine functionsJustin Bogner2017-04-111-3/+0
* [MIR] Support Customed Register Mask and CSRsOren Ben Simhon2017-03-191-18/+18
* ARM: avoid clobbering register in v6 jump-table expansion.Tim Northover2017-03-151-0/+2
* MIRParser: Allow regclass specification on operandMatthias Braun2017-01-181-5/+6
* Move VariableDbgInfo from MachineModuleInfo to MachineFunctionMatthias Braun2016-11-301-1/+1
* MIRParser: Add support for parsing vreg reg alloc hintsTom Stellard2016-11-151-2/+3
* MIRParser: Rewrite register info initialization; mostly NFCMatthias Braun2016-10-111-43/+74
* Don't create a SymbolTable in Function when the LLVMContext discards value na...Mehdi Amini2016-09-171-1/+1
* [MIR Parser] Fix Build!Mehdi Amini2016-09-171-1/+1
* MIR Parser: issue an error when the Context discard value names.Mehdi Amini2016-09-171-0/+8
* GlobalISel: disambiguate types when printing MIRTim Northover2016-09-121-2/+2
* GlobalISel: move type information to MachineRegisterInfo.Tim Northover2016-09-091-2/+2
* [YAMLIO] Add the ability to map with context.Zachary Turner2016-09-081-1/+2
* [MFProperties] Introduce a reset method with no argument.Quentin Colombet2016-08-261-1/+1
* MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compu...Matthias Braun2016-08-251-2/+4
* MIRParser/MIRPrinter: Compute HasInlineAsm instead of printing/parsing itMatthias Braun2016-08-241-10/+13
* MachineRegisterInfo/MIR: Initialize tracksSubRegLiveness early, do not print/...Matthias Braun2016-08-241-1/+0
* MIRParser/MIRPrinter: Compute isSSA instead of printing/parsing it.Matthias Braun2016-08-241-4/+17
* MachineFunction: Introduce NoPHIs propertyMatthias Braun2016-08-231-0/+18
* [GlobalISel] Add Selected MachineFunction property.Ahmed Bougacha2016-08-021-0/+2
* [GlobalISel] Add RegBankSelected MachineFunction property.Ahmed Bougacha2016-08-021-0/+3
* [GlobalISel] Add Legalized MachineFunction property.Ahmed Bougacha2016-08-021-0/+4
* MachineFunction: Return reference for getFrameInfo(); NFCMatthias Braun2016-07-281-1/+1
* MIRParser: Fix MIRParser not reporting nullptr on error.Matthias Braun2016-07-141-1/+1
* MIRParser: Move SlotMapping and SourceMgr refs to PFS; NFCMatthias Braun2016-07-131-20/+29
* MIRParser: Move MachineFunction reference into PFS; NFCMatthias Braun2016-07-131-82/+70
* [MIR] Check that generic virtual registers get a size.Quentin Colombet2016-06-081-0/+2
* Sink DI metadata usage out of MachineInstr.h and MachineInstrBuilder.hReid Kleckner2016-04-141-0/+1
* [MIR] Teach the parser how to deal with register banks.Quentin Colombet2016-04-081-10/+51
* Introduce MachineFunctionProperties and the AllVRegsAllocated propertyDerek Schuff2016-03-281-0/+2
* [MIR] Teach the parser/printer that generic virtual registers do not need a r...Quentin Colombet2016-03-081-6/+13
* MIR Serialization: Serialize MMI's variable debug information.Alex Lorenz2015-08-191-0/+61
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