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path: root/llvm/lib/CodeGen/MIRParser/MIParser.h
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* [NFC] Header cleanupMehdi Amini2016-04-181-1/+1
| | | | | | | | | | | | | | Removed some unused headers, replaced some headers with forward class declarations. Found using simple scripts like this one: clear && ack --cpp -l '#include "llvm/ADT/IndexedMap.h"' | xargs grep -L 'IndexedMap[<]' | xargs grep -n --color=auto 'IndexedMap' Patch by Eugene Kosov <claprix@yandex.ru> Differential Revision: http://reviews.llvm.org/D19219 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 266595
* MIR Serialization: Serialize MMI's variable debug information.Alex Lorenz2015-08-191-0/+5
| | | | llvm-svn: 245396
* MIR Serialization: Serialize the frame information's stack protector index.Alex Lorenz2015-08-181-0/+5
| | | | llvm-svn: 245372
* MIR Serialization: Change MIR syntax - use custom syntax for MBBs.Alex Lorenz2015-08-131-8/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit modifies the way the machine basic blocks are serialized - now the machine basic blocks are serialized using a custom syntax instead of relying on YAML primitives. Instead of using YAML mappings to represent the individual machine basic blocks in a machine function's body, the new syntax uses a single YAML block scalar which contains all of the machine basic blocks and instructions for that function. This is an example of a function's body that uses the old syntax: body: - id: 0 name: entry instructions: - '%eax = MOV32r0 implicit-def %eflags' - 'RETQ %eax' ... The same body is now written like this: body: | bb.0.entry: %eax = MOV32r0 implicit-def %eflags RETQ %eax ... This syntax change is motivated by the fact that the bundled machine instructions didn't map that well to the old syntax which was using a single YAML sequence to store all of the machine instructions in a block. The bundled machine instructions internally use flags like BundledPred and BundledSucc to determine the bundles, and serializing them as MI flags using the old syntax would have had a negative impact on the readability and the ease of editing for MIR files. The new syntax allows me to serialize the bundled machine instructions using a block construct without relying on the internal flags, for example: BUNDLE implicit-def dead %itstate, implicit-def %s1 ... { t2IT 1, 24, implicit-def %itstate %s1 = VMOVS killed %s0, 1, killed %cpsr, implicit killed %itstate } This commit also converts the MIR testcases to the new syntax. I developed a script that can convert from the old syntax to the new one. I will post the script on the llvm-commits mailing list in the thread for this commit. llvm-svn: 244982
* MIR Serialization: Serialize the unnamed basic block references.Alex Lorenz2015-07-271-0/+6
| | | | | | | | | | | | This commit serializes the references from the machine basic blocks to the unnamed basic blocks. This commit adds a new attribute to the machine basic block's YAML mapping called 'ir-block'. This attribute contains the actual reference to the basic block. Reviewers: Duncan P. N. Exon Smith llvm-svn: 243340
* MIR Serialization: Serialize the machine function's liveins.Alex Lorenz2015-07-271-0/+6
| | | | | Reviewers: Duncan P. N. Exon Smith llvm-svn: 243288
* MIR Serialization: Initial serialization of machine constant pools.Alex Lorenz2015-07-201-0/+1
| | | | | | | | | | This commit implements the initial serialization of machine constant pools and the constant pool index machine operands. The constant pool is serialized using a YAML sequence of YAML mappings that represent the constant values. The target-specific constant pool items aren't serialized by this commit. Reviewers: Duncan P. N. Exon Smith llvm-svn: 242707
* MIR Serialization: Serialize the frame index machine operands.Alex Lorenz2015-07-161-0/+2
| | | | | Reviewers: Duncan P. N. Exon Smith llvm-svn: 242487
* MIR Serialization: Serialize the jump table index operands.Alex Lorenz2015-07-151-0/+1
| | | | | Reviewers: Duncan P. N. Exon Smith llvm-svn: 242358
* MIR Serialization: Serialize the machine basic block live in registers.Alex Lorenz2015-07-141-0/+6
| | | | llvm-svn: 242204
* MIR Serialization: Serialize the virtual register operands.Alex Lorenz2015-07-101-0/+1
| | | | | | | | Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D11005 llvm-svn: 241959
* MIR Parser: wrap 'MBBSlots' from the MI parsing functions in a struct. NFC.Alex Lorenz2015-07-071-3/+6
| | | | | | | | | | | This commit modifies the interface for the machine instruction parsing functions by wrapping the parameter 'MBBSlots' in a new structure called 'PerFunctionMIParsingState'. This change is useful as in the future I will be able to pass new parameters to the machine instruction parser just by modifying the 'PerFunctionMIParsingState' structure instead of adding a new parameter to each function. llvm-svn: 241607
* MIR Serialization: Serialize MBB successors.Alex Lorenz2015-06-301-0/+5
| | | | | | | | | | | | | This commit implements serialization of the machine basic block successors. It uses a YAML flow sequence that contains strings that have the MBB references. The MBB references in those strings use the same syntax as the MBB machine operands in the machine instruction strings. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10699 llvm-svn: 241093
* MIR Parser: make the machine instruction parsing interface more consistent. NFC.Alex Lorenz2015-06-301-4/+4
| | | | | | | | | This commit refactors the interface for machine instruction parser. It adopts the pattern of returning a bool and passing in the result in the first argument that is used by the other parsing methods for the the method 'parse' and the function 'parseMachineInstr'. llvm-svn: 241085
* MIR Serialization: Serialize global address machine operands.Alex Lorenz2015-06-261-1/+2
| | | | | | | | | | | | This commit serializes the global address machine operands. This commit doesn't serialize the operand's offset and target flags, it serializes only the global value reference. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10671 llvm-svn: 240851
* MIR Serialization: Serialize machine basic block operands.Alex Lorenz2015-06-261-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | This commit serializes machine basic block operands. The machine basic block operands use the following syntax: %bb.<id>[.<name>] This commit also modifies the YAML representation for the machine basic blocks - a new, required field 'id' is added to the MBB YAML mapping. The id is used to resolve the MBB references to the actual MBBs. And while the name of the MBB can be included in a MBB reference, this name isn't used to resolve MBB references - as it's possible that multiple MBBs will reference the same BB and thus they will have the same name. If the name is specified, the parser will verify that it is equal to the name of the MBB with the specified id. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10608 llvm-svn: 240792
* MIR Serialization: Serialize machine instruction names.Alex Lorenz2015-06-221-0/+31
This commit implements initial machine instruction serialization. It serializes machine instruction names. The instructions are represented using a YAML sequence of string literals and are a part of machine basic block YAML mapping. This commit introduces a class called 'MIParser' which will be used to parse the machine instructions and operands. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10481 llvm-svn: 240295
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