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path: root/llvm/lib/CodeGen/MIRParser/MILexer.cpp
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* MIR Serialization: Serialize the '.cfi_offset' CFI instruction.Alex Lorenz2015-07-231-0/+1
| | | | | Reviewers: Duncan P. N. Exon Smith llvm-svn: 243062
* MIR Serialization: Serialize the machine instruction's debug location.Alex Lorenz2015-07-221-0/+1
| | | | llvm-svn: 242938
* MIR Serialization: Serialize the metadata machine operands.Alex Lorenz2015-07-221-0/+2
| | | | llvm-svn: 242916
* MIR Serialization: Start serializing the CFI operands with .cfi_def_cfa_offset.Alex Lorenz2015-07-211-1/+2
| | | | | | | | This commit begins serialization of the CFI index machine operands by serializing one kind of CFI instruction - the .cfi_def_cfa_offset instruction. Reviewers: Duncan P. N. Exon Smith llvm-svn: 242845
* MIR Parser: Reuse the function 'lexName' when lexing global value tokens. NFC.Alex Lorenz2015-07-211-31/+19
| | | | | | | This commit refactors the function 'maybeLexGlobalValue' so that now it reuses the function 'lexName' when lexing a named global value token. llvm-svn: 242837
* MIR Serialization: Serialize the external symbol machine operands.Alex Lorenz2015-07-211-0/+32
| | | | | Reviewers: Duncan P. N. Exon Smith llvm-svn: 242806
* MIR Serialization: Initial serialization of machine constant pools.Alex Lorenz2015-07-201-0/+6
| | | | | | | | | | This commit implements the initial serialization of machine constant pools and the constant pool index machine operands. The constant pool is serialized using a YAML sequence of YAML mappings that represent the constant values. The target-specific constant pool items aren't serialized by this commit. Reviewers: Duncan P. N. Exon Smith llvm-svn: 242707
* MIR Parser: Add support for quoted named global value operands.Alex Lorenz2015-07-201-3/+59
| | | | | | | | | | This commit extends the machine instruction lexer and implements support for the quoted global value tokens. With this change the syntax for the global value identifier tokens becomes identical to the syntax for the global identifier tokens from the LLVM's assembly language. Reviewers: Duncan P. N. Exon Smith llvm-svn: 242702
* MIR Parser: Allow the dollar characters in all of the identifier tokens.Alex Lorenz2015-07-171-1/+4
| | | | | | | | | | This commit modifies the machine instruction lexer so that it now accepts the '$' characters in identifier tokens. This change makes the syntax for unquoted global value tokens consistent with the syntax for the global idenfitier tokens in the LLVM's assembly language. llvm-svn: 242584
* MIR Serialization: Serialize the frame setup machine instruction flag.Alex Lorenz2015-07-171-0/+1
| | | | llvm-svn: 242491
* MIR Serialization: Serialize the frame index machine operands.Alex Lorenz2015-07-161-0/+33
| | | | | Reviewers: Duncan P. N. Exon Smith llvm-svn: 242487
* MIR Serialization: Serialize the jump table index operands.Alex Lorenz2015-07-151-0/+19
| | | | | Reviewers: Duncan P. N. Exon Smith llvm-svn: 242358
* MIR Serialization: Serialize the sub register indices.Alex Lorenz2015-07-131-0/+2
| | | | | | | | This commit serializes the sub register indices from the register machine operands. Reviewers: Duncan P. N. Exon Smith llvm-svn: 242084
* MIR Serialization: Serialize the virtual register operands.Alex Lorenz2015-07-101-0/+13
| | | | | | | | Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D11005 llvm-svn: 241959
* MIR Serialization: Serialize the 'undef' register machine operand flag.Alex Lorenz2015-07-081-0/+1
| | | | llvm-svn: 241762
* MIR Serialization: Serialize the 'killed' register machine operand flag.Alex Lorenz2015-07-081-0/+1
| | | | llvm-svn: 241734
* MIR Serialization: Serialize the 'dead' register machine operand flag.Alex Lorenz2015-07-071-0/+1
| | | | llvm-svn: 241624
* MIR Serialization: Serialize the implicit register flag.Alex Lorenz2015-07-061-2/+10
| | | | | | | | | | | | | | This commit serializes the implicit flag for the register machine operands. It introduces two new keywords into the machine instruction syntax: 'implicit' and 'implicit-def'. The 'implicit' keyword is used for the implicit register operands, and the 'implicit-def' keyword is used for the register operands that have both the implicit and the define flags set. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10709 llvm-svn: 241519
* MIR Parser: adopt the 'maybeLex...' pattern. NFC.Alex Lorenz2015-06-301-22/+37
| | | | | | | | | | | | This commit refactors the machine instruction lexer so that the lexing functions use the 'maybeLex...' pattern, where they determine if they can lex the current token by themselves. Reviewers: Sean Silva Differential Revision: http://reviews.llvm.org/D10817 llvm-svn: 241078
* MIR Serialization: Serialize global address machine operands.Alex Lorenz2015-06-261-0/+21
| | | | | | | | | | | | This commit serializes the global address machine operands. This commit doesn't serialize the operand's offset and target flags, it serializes only the global value reference. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10671 llvm-svn: 240851
* MIR Serialization: Serialize machine basic block operands.Alex Lorenz2015-06-261-3/+33
| | | | | | | | | | | | | | | | | | | | | | | | | This commit serializes machine basic block operands. The machine basic block operands use the following syntax: %bb.<id>[.<name>] This commit also modifies the YAML representation for the machine basic blocks - a new, required field 'id' is added to the MBB YAML mapping. The id is used to resolve the MBB references to the actual MBBs. And while the name of the MBB can be included in a MBB reference, this name isn't used to resolve MBB references - as it's possible that multiple MBBs will reference the same BB and thus they will have the same name. If the name is specified, the parser will verify that it is equal to the name of the MBB with the specified id. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10608 llvm-svn: 240792
* MIR Serialization: Serialize the null register operands.Alex Lorenz2015-06-241-1/+3
| | | | | | | | | | | | This commit serializes the null register machine operands. It uses the '_' keyword to represent them, but the parser also allows the '%noreg' named register syntax. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10580 llvm-svn: 240558
* MILexer.cpp: Try to fix a warning. [-Wsign-compare]NAKAMURA Takumi2015-06-241-1/+1
| | | | llvm-svn: 240525
* MIR Serialization: Serialize immediate machine operands.Alex Lorenz2015-06-231-1/+13
| | | | | | | | Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10573 llvm-svn: 240481
* MIR Serialization: Serialize physical register machine operands.Alex Lorenz2015-06-231-0/+32
| | | | | | | | | | | This commit introduces functionality that's used to serialize machine operands. Only the physical register operands are serialized by this commit. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10525 llvm-svn: 240425
* MIR Serialization: Introduce a lexer for machine instructions.Alex Lorenz2015-06-221-0/+87
This commit adds a function that tokenizes the string containing the machine instruction. This commit also adds a struct called 'MIToken' which is used to represent the lexer's tokens. Reviewers: Sean Silva Differential Revision: http://reviews.llvm.org/D10521 llvm-svn: 240323
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