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path: root/llvm/lib/CodeGen/LowerSubregs.cpp
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* Fix indentation.Dan Gohman2008-08-201-2/+2
| | | | llvm-svn: 55049
* Re-enable elimination of unnecessary SUBREG_TO_REG instructions inDan Gohman2008-08-071-4/+9
| | | | | | | | | | | LowerSubregs, and fix an x86-64 isel bug that this exposed. SUBREG_TO_REG for x86-64 implicit zero extension is only safe for isel to generate when the source is known to always have zeros in the high 32 bits. The EXTRACT_SUBREG instruction does not clear the high 32 bits. llvm-svn: 54444
* Re-introduce LeakDetector support for MachineInstrs and MachineBasicBlocks.Dan Gohman2008-07-171-3/+3
| | | | | | | Fix a leak that this turned up in LowerSubregs.cpp. And, comment a leak in LiveIntervalAnalysis.cpp. llvm-svn: 53746
* It's not safe to remove SUBREG_TO_REG that looks like identity copies, e.g. ↵Evan Cheng2008-06-171-11/+6
| | | | | | movl %eax, %eax on x86-64 actually does a zero-extend. llvm-svn: 52421
* Do not issue identity copies.Evan Cheng2008-06-161-13/+22
| | | | llvm-svn: 52373
* Revert this.Evan Cheng2008-06-041-4/+0
| | | | llvm-svn: 51949
* LowerSubregs should not clobber any analysis.Evan Cheng2008-06-041-0/+4
| | | | llvm-svn: 51933
* Make insert_subreg a two-address instruction, vastly simplifying ↵Christopher Lamb2008-03-161-94/+61
| | | | | | LowerSubregs pass. Add a new TII, subreg_to_reg, which is like insert_subreg except that it takes an immediate implicit value to insert into rather than a register. llvm-svn: 48412
* Get rid of a pseudo instruction and replace it with subreg based operation ↵Christopher Lamb2008-03-131-10/+14
| | | | | | | on real instructions, ridding the asm printers of the hack used to do this previously. In the process, update LowerSubregs to be careful about eliminating copies that have side affects. Note: the coalescer will have to be careful about this too, when it starts coalescing insert_subreg nodes. llvm-svn: 48329
* Recommitting parts of r48130. These do not appear to cause the observed ↵Christopher Lamb2008-03-111-23/+12
| | | | | | failures. llvm-svn: 48223
* Use TargetRegisterInfo::getPhysicalRegisterRegClass. Remove duplicated code.Evan Cheng2008-03-111-21/+6
| | | | llvm-svn: 48221
* Revert 48125, 48126, and 48130 for now to unbreak some x86-64 tests.Evan Cheng2008-03-101-12/+23
| | | | llvm-svn: 48167
* Allow insert_subreg into implicit, target-specific values. Christopher Lamb2008-03-101-23/+12
| | | | | | | Change insert/extract subreg instructions to be able to be used in TableGen patterns. Use the above features to reimplement an x86-64 pseudo instruction as a pattern. llvm-svn: 48130
* Rename MRegisterInfo to TargetRegisterInfo.Dan Gohman2008-02-101-25/+25
| | | | llvm-svn: 46930
* Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of theOwen Anderson2007-12-311-4/+6
| | | | | | Machine-level API cleanup instigated by Chris. llvm-svn: 45470
* Rename SSARegMap -> MachineRegisterInfo in keeping with the idea Chris Lattner2007-12-311-5/+5
| | | | | | | | | | | | | | that "machine" classes are used to represent the current state of the code being compiled. Given this expanded name, we can start moving other stuff into it. For now, move the UsedPhysRegs and LiveIn/LoveOuts vectors from MachineFunction into it. Update all the clients to match. This also reduces some needless #includes, such as MachineModuleInfo from MachineFunction. llvm-svn: 45467
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
| | | | llvm-svn: 45418
* isSubRegOf() is a dup of isSubRegister.Evan Cheng2007-10-231-1/+1
| | | | llvm-svn: 43249
* Allow copyRegToReg to emit cross register classes copies.Evan Cheng2007-09-261-4/+4
| | | | | | Tested with "make check"! llvm-svn: 42346
* Remove isReg, isImm, and isMBB, and change all their users to use Dan Gohman2007-09-141-3/+3
| | | | | | | isRegister, isImmediate, and isMachineBasicBlock, which are equivalent, and more popular. llvm-svn: 41958
* Move isSubRegOf into MRegisterInfo. Fix a missed move elimination in ↵Christopher Lamb2007-08-101-17/+24
| | | | | | LowerSubregs and add more debugging output there. llvm-svn: 41005
* Implement review feedback. No functionality change.Christopher Lamb2007-08-061-137/+152
| | | | llvm-svn: 40863
* Add a MachineFunction pass, which runs post register allocation, that turns ↵Christopher Lamb2007-07-261-0/+226
subreg insert/extract instruction into register copies. This ensures correct code gen if the coalescer isn't able to remove all subreg instructions. llvm-svn: 40521
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