bcm5719-llvm - Project Ortega BCM5719 LLVM

	Commit message (Collapse)	Author	Age	Files	Lines
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*	Do not issue identity copies.	Evan Cheng	2008-06-16	1	-13/+22
\| \| \| \|	llvm-svn: 52373
*	Revert this.	Evan Cheng	2008-06-04	1	-4/+0
\| \| \| \|	llvm-svn: 51949
*	LowerSubregs should not clobber any analysis.	Evan Cheng	2008-06-04	1	-0/+4
\| \| \| \|	llvm-svn: 51933
*	Make insert_subreg a two-address instruction, vastly simplifying ↵	Christopher Lamb	2008-03-16	1	-94/+61
\| \| \| \| \| \|	LowerSubregs pass. Add a new TII, subreg_to_reg, which is like insert_subreg except that it takes an immediate implicit value to insert into rather than a register. llvm-svn: 48412
*	Get rid of a pseudo instruction and replace it with subreg based operation ↵	Christopher Lamb	2008-03-13	1	-10/+14
\| \| \| \| \| \| \|	on real instructions, ridding the asm printers of the hack used to do this previously. In the process, update LowerSubregs to be careful about eliminating copies that have side affects. Note: the coalescer will have to be careful about this too, when it starts coalescing insert_subreg nodes. llvm-svn: 48329
*	Recommitting parts of r48130. These do not appear to cause the observed ↵	Christopher Lamb	2008-03-11	1	-23/+12
\| \| \| \| \| \|	failures. llvm-svn: 48223
*	Use TargetRegisterInfo::getPhysicalRegisterRegClass. Remove duplicated code.	Evan Cheng	2008-03-11	1	-21/+6
\| \| \| \|	llvm-svn: 48221
*	Revert 48125, 48126, and 48130 for now to unbreak some x86-64 tests.	Evan Cheng	2008-03-10	1	-12/+23
\| \| \| \|	llvm-svn: 48167
*	Allow insert_subreg into implicit, target-specific values.	Christopher Lamb	2008-03-10	1	-23/+12
\| \| \| \| \| \| \|	Change insert/extract subreg instructions to be able to be used in TableGen patterns. Use the above features to reimplement an x86-64 pseudo instruction as a pattern. llvm-svn: 48130
*	Rename MRegisterInfo to TargetRegisterInfo.	Dan Gohman	2008-02-10	1	-25/+25
\| \| \| \|	llvm-svn: 46930
*	Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the	Owen Anderson	2007-12-31	1	-4/+6
\| \| \| \| \| \|	Machine-level API cleanup instigated by Chris. llvm-svn: 45470
*	Rename SSARegMap -> MachineRegisterInfo in keeping with the idea	Chris Lattner	2007-12-31	1	-5/+5
\| \| \| \| \| \| \| \| \| \| \| \| \| \|	that "machine" classes are used to represent the current state of the code being compiled. Given this expanded name, we can start moving other stuff into it. For now, move the UsedPhysRegs and LiveIn/LoveOuts vectors from MachineFunction into it. Update all the clients to match. This also reduces some needless #includes, such as MachineModuleInfo from MachineFunction. llvm-svn: 45467
*	Remove attribution from file headers, per discussion on llvmdev.	Chris Lattner	2007-12-29	1	-2/+2
\| \| \| \|	llvm-svn: 45418
*	isSubRegOf() is a dup of isSubRegister.	Evan Cheng	2007-10-23	1	-1/+1
\| \| \| \|	llvm-svn: 43249
*	Allow copyRegToReg to emit cross register classes copies.	Evan Cheng	2007-09-26	1	-4/+4
\| \| \| \| \| \|	Tested with "make check"! llvm-svn: 42346
*	Remove isReg, isImm, and isMBB, and change all their users to use	Dan Gohman	2007-09-14	1	-3/+3
\| \| \| \| \| \| \|	isRegister, isImmediate, and isMachineBasicBlock, which are equivalent, and more popular. llvm-svn: 41958
*	Move isSubRegOf into MRegisterInfo. Fix a missed move elimination in ↵	Christopher Lamb	2007-08-10	1	-17/+24
\| \| \| \| \| \|	LowerSubregs and add more debugging output there. llvm-svn: 41005
*	Implement review feedback. No functionality change.	Christopher Lamb	2007-08-06	1	-137/+152
\| \| \| \|	llvm-svn: 40863
*	Add a MachineFunction pass, which runs post register allocation, that turns ↵	Christopher Lamb	2007-07-26	1	-0/+226
	subreg insert/extract instruction into register copies. This ensures correct code gen if the coalescer isn't able to remove all subreg instructions. llvm-svn: 40521