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path: root/llvm/lib/CodeGen/LiveVariables.cpp
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* Use SmallVectorImpl instead of SmallVector for iterators and references to ↵Craig Topper2013-07-031-2/+2
| | | | | | avoid specifying the vector size unnecessarily. llvm-svn: 185512
* Simplify logic now that r182490 is in place. No functional change intended.Chad Rosier2013-05-221-15/+14
| | | | llvm-svn: 182526
* Remove special-casing of return blocks for liveness.Jakob Stoklund Olesen2013-02-051-23/+0
| | | | | | | Now that return value registers are return instruction uses, there is no need for special treatment of return blocks. llvm-svn: 174416
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-5/+5
| | | | | | | | | | | | | | | | | Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] llvm-svn: 169131
* Switch most getReservedRegs() clients to the MRI equivalent.Jakob Stoklund Olesen2012-10-151-4/+2
| | | | | | | Using the cached bit vector in MRI avoids comstantly allocating and recomputing the reserved register bit vector. llvm-svn: 165983
* Release build: guard dump functions withManman Ren2012-09-111-1/+1
| | | | | | | | "#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)" No functional change. Update r163339. llvm-svn: 163653
* LiveVariables: Compute a set of defs and kills to speed up updating LV ↵Benjamin Kramer2012-09-091-4/+30
| | | | | | | | | | | | | | | during critical edge splitting. Previously we checked if the register is def'd in a block via the def/use list a nd walked the list of kills to check if the register is killed in a block. Both of these checks can be made much cheaper by walking the block first and recording all defs and kills. This reduces the compile time of the test case from PR13651 from 40s to 15s at -O2. The compile time is still dominated by LV updating but now the main culprit is SparseBitVector's slowness. llvm-svn: 163478
* Release build: guard dump functions with "ifndef NDEBUG"Manman Ren2012-09-061-0/+2
| | | | | | No functional change. llvm-svn: 163339
* Teach LiveVariables to handle <undef> operands.Jakob Stoklund Olesen2012-06-231-3/+5
| | | | | | | | It's simple: Don't treat <undef> operands as uses, and don't assume a virtual register has a defining instruction unless a real use has been seen. llvm-svn: 159061
* Switch all register list clients to the new MC*Iterator interface.Jakob Stoklund Olesen2012-06-011-32/+29
| | | | | | | | | | | | | No functional change intended. Sorry for the churn. The iterator classes are supposed to help avoid giant commits like this one in the future. The TableGen-produced register lists are getting quite large, and it may be necessary to change the table representation. This makes it possible to do so without changing all clients (again). llvm-svn: 157854
* Fix typo.Lang Hames2012-04-011-1/+1
| | | | llvm-svn: 153846
* Assert on SSA errors in LiveVariables.Jakob Stoklund Olesen2012-03-091-0/+1
| | | | | | All uses of a virtual register must be dominated by its def. llvm-svn: 152449
* Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce ↵Craig Topper2012-03-051-17/+17
| | | | | | static data size. llvm-svn: 152016
* RegAlloc superpass: includes phi elimination, coalescing, and scheduling.Andrew Trick2012-02-101-0/+8
| | | | | | | | | | | | | | | | Creates a configurable regalloc pipeline. Ensure specific llc options do what they say and nothing more: -reglloc=... has no effect other than selecting the allocator pass itself. This patch introduces a new umbrella flag, "-optimize-regalloc", to enable/disable the optimizing regalloc "superpass". This allows for example testing coalscing and scheduling under -O0 or vice-versa. When a CodeGen pass requires the MachineFunction to have a particular property, we need to explicitly define that property so it can be directly queried rather than naming a specific Pass. For example, to check for SSA, use MRI->isSSA, not addRequired<PHIElimination>. CodeGen transformation passes are never "required" as an analysis ProcessImplicitDefs does not require LiveVariables. We have a plan to massively simplify some of the early passes within the regalloc superpass. llvm-svn: 150226
* whitespaceAndrew Trick2012-02-031-3/+3
| | | | llvm-svn: 149671
* Fix an obvious typo.Evan Cheng2012-01-211-1/+1
| | | | llvm-svn: 148622
* Handle register masks in LiveVariables.Jakob Stoklund Olesen2012-01-211-0/+30
| | | | | | | | | | | A register mask operand kills any live physreg that isn't preserved. Unlike an implicit-def operand, the clobbered physregs are never live afterwards. This means LiveVariables has to track a much smaller number of live physregs, and it should spend much less time in addRegisterDead(). llvm-svn: 148609
* Delete an unused member variable.Jakob Stoklund Olesen2012-01-201-1/+0
| | | | llvm-svn: 148594
* After r147827 and r147902, it's now possible for unallocatable registers to beEvan Cheng2012-01-141-6/+22
| | | | | | | | | | | | | | | | | | | live across BBs before register allocation. This miscompiled 197.parser when a cmp + b are optimized to a cbnz instruction even though the CPSR def is live-in a successor. cbnz r6, LBB89_12 ... LBB89_12: ble LBB89_1 The fix consists of two parts. 1) Teach LiveVariables that some unallocatable registers might be liveouts so don't mark their last use as kill if they are. 2) ARM constantpool island pass shouldn't form cbz / cbnz if the conditional branch does not kill CPSR. rdar://10676853 llvm-svn: 148168
* Add bundle aware API for querying instruction properties and switch the codeEvan Cheng2011-12-071-2/+2
| | | | | | | | | | | | | | generator to it. For non-bundle instructions, these behave exactly the same as the MC layer API. For properties like mayLoad / mayStore, look into the bundle and if any of the bundled instructions has the property it would return true. For properties like isPredicable, only return true if *all* of the bundled instructions have the property. For properties like canFoldAsLoad, isCompare, conservatively return false for bundles. llvm-svn: 146026
* First chunk of MachineInstr bundle support.Evan Cheng2011-12-061-1/+1
| | | | | | | | | 1. Added opcode BUNDLE 2. Taught MachineInstr class to deal with bundled MIs 3. Changed MachineBasicBlock iterator to skip over bundled MIs; added an iterator to walk all the MIs 4. Taught MachineBasicBlock methods about bundled MIs llvm-svn: 145975
* Silence a bunch (but not all) "variable written but not read" warningsDuncan Sands2011-08-121-1/+1
| | | | | | when building with assertions disabled. llvm-svn: 137460
* Reduce vector reallocations.Benjamin Kramer2011-03-081-4/+2
| | | | llvm-svn: 127254
* Use an IndexedMap for LiveVariables::VirtRegInfo.Jakob Stoklund Olesen2011-01-081-25/+10
| | | | | | | | Provide MRI::getNumVirtRegs() and TRI::index2VirtReg() functions to allow iteration over virtual registers without depending on the representation of virtual register numbers. llvm-svn: 123098
* Begin adding static dependence information to passes, which will allow us toOwen Anderson2010-10-121-1/+4
| | | | | | | | | perform initialization without static constructors AND without explicit initialization by the client. For the moment, passes are required to initialize both their (potential) dependencies and any passes they preserve. I hope to be able to relax the latter requirement in the future. llvm-svn: 116334
* Now with fewer extraneous semicolons!Owen Anderson2010-10-071-1/+1
| | | | llvm-svn: 115996
* Remove unused functions.Jakob Stoklund Olesen2010-08-161-15/+0
| | | | llvm-svn: 111156
* Fix batch of converting RegisterPass<> to INTIALIZE_PASS().Owen Anderson2010-07-211-1/+2
| | | | llvm-svn: 109045
* fix a -Wbool-conversions warning from clang.Chris Lattner2010-06-141-1/+1
| | | | llvm-svn: 105942
* Fix some liveout handling related to tail calls, see comments.Dale Johannesen2010-06-051-1/+6
| | | | | | | I don't think this ever resulted in problems on x86, but it would on ARM. llvm-svn: 105509
* Eliminate MachineBasicBlock::const_livein_iterator and makeDan Gohman2010-04-131-1/+1
| | | | | | | | MachineBasicBlock::livein_iterator a const_iterator, because clients shouldn't ever be using the iterator interface to mutate the livein set. llvm-svn: 101147
* LiveVariables should clear kill / dead markers first. This allows us to ↵Evan Cheng2010-03-261-3/+7
| | | | | | remove a hack in the scheduler. llvm-svn: 99597
* Better handling of dead super registers in LiveVariables. We used to do this:Jakob Stoklund Olesen2010-03-051-21/+21
| | | | | | | | | | | | | | | | | | | | | CALL ... %RAX<imp-def> ... [not using %RAX] %EAX = ..., %RAX<imp-use, kill> RET %EAX<imp-use,kill> Now we do this: CALL ... %RAX<imp-def, dead> ... [not using %RAX] %EAX = ... RET %EAX<imp-use,kill> By not artificially keeping %RAX alive, we lower register pressure a bit. The correct number of instructions for 2008-08-05-SpillerBug.ll is obviously 55, anybody can see that. Sheesh. llvm-svn: 97838
* Keep track of phi join registers explicitly in LiveVariables.Jakob Stoklund Olesen2010-02-231-0/+1
| | | | | | | | Previously, LiveIntervalAnalysis would infer phi joins by looking for multiply defined registers. That doesn't work if the phi join is implicitly defined in all but one of the predecessors. llvm-svn: 96994
* move target-independent opcodes out of TargetInstrInfoChris Lattner2010-02-091-5/+4
| | | | | | | | | into TargetOpcodes.h. #include the new TargetOpcodes.h into MachineInstr. Add new inline accessors (like isPHI()) to MachineInstr, and start using them throughout the codebase. llvm-svn: 95687
* Skip DEBUG_VALUE in some places where it was affecting codegen.Dale Johannesen2010-02-091-0/+2
| | | | llvm-svn: 95647
* Remove dead variable.Benjamin Kramer2010-01-071-7/+2
| | | | llvm-svn: 92919
* Change errs() to dbgs().David Greene2010-01-041-6/+7
| | | | llvm-svn: 92532
* Move PHIElimination::isLiveOut method to LiveVariables.Jakob Stoklund Olesen2009-12-011-0/+45
| | | | | | | | We want LiveVariables clients to use methods rather than accessing the getVarInfo data structure directly. That way it will be possible to change the LiveVariables representation. llvm-svn: 90240
* Fix PR5614: parts of a physical register def may be killed the rest.Evan Cheng2009-12-011-1/+47
| | | | llvm-svn: 90180
* Be more clever about calculating live variables through new basic blocks.Jakob Stoklund Olesen2009-11-211-19/+29
| | | | | | | | | | | | When splitting a critical edge, the registers live through the edge are: - Used in a PHI instruction, or - Live out from the predecessor, and - Live in to the successor. This allows the coalescer to eliminate even more phi joins. llvm-svn: 89530
* Fix PR5410: LiveVariables lost subreg def:Evan Cheng2009-11-131-1/+7
| | | | | | | | | | | | | | D0<def,dead> = ... ... = S0<use, kill> S0<def> = ... ... D0<def> = The first D0 def is correctly marked dead, however, livevariables should have added an implicit def of S0 or we end up with a use without a def. llvm-svn: 88690
* Fix liveness calculation when splitting critical edges during PHI elimination.Jakob Stoklund Olesen2009-11-111-20/+21
| | | | | | | | | | | | | | - Edges are split before any phis are eliminated, so the code is SSA. - Create a proper IR BasicBlock for the split edges. - LiveVariables::addNewBlock now has same syntax as MachineDominatorTree::addNewBlock. Algorithm calculates predecessor live-out set rather than successor live-in set. This feature still causes some miscompilations. llvm-svn: 86867
* Teach PHIElimination to split critical edges when -split-phi-edges is enabled.Jakob Stoklund Olesen2009-11-101-0/+40
| | | | | | | | Critical edges leading to a PHI node are split when the PHI source variable is live out from the predecessor block. This help the coalescer eliminate more PHI joins. llvm-svn: 86725
* When LiveVariables is adding implicit-def to model "partial dead", add the ↵Evan Cheng2009-10-141-1/+12
| | | | | | earlyclobber marker if the superreg def has it. llvm-svn: 84153
* Clean up LiveVariables and change how it deals with partial updates and ↵Evan Cheng2009-09-241-198/+64
| | | | | | kills. This also eliminate the horrible check which scan forward to the end of the basic block. It should be faster and more accurate. llvm-svn: 82676
* Fix PR5024. LiveVariables physical register defs should *commit* only after allEvan Cheng2009-09-231-32/+93
| | | | | | | | of the defs are processed. Also fix a implicit_def propagation bug: a implicit_def of a physical register should be applied to uses of the sub-registers. llvm-svn: 82616
* Fix PR5024. LiveVariables::FindLastPartialDef should return a set of ↵Evan Cheng2009-09-221-6/+22
| | | | | | sub-registers that were defined by the last partial def, not just a single sub-register. llvm-svn: 82535
* remove the last uses of Config/alloca.hChris Lattner2009-08-231-1/+0
| | | | llvm-svn: 79873
* remove various std::ostream version of printing methods fromChris Lattner2009-08-231-6/+6
| | | | | | | | MachineInstr and MachineOperand. This required eliminating a bunch of stuff that was using DOUT, I hope that bill doesn't mind me stealing his fun. ;-) llvm-svn: 79813
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