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* Fix PHI handling in LiveIntervals::shrinkToUses().Jakob Stoklund Olesen2011-03-031-1/+1
| | | | | | | | | We need to wait until we meet a PHIDef in its defining block before resurrecting PHIKills in the predecessors. This should unbreak the llvm-gcc-build-x86_64-darwin10-x-mingw32-x-armeabi bot. llvm-svn: 126905
* Quiet a compiler warning about unused variable 'ExtVNI'.Nick Lewycky2011-03-021-0/+1
| | | | llvm-svn: 126815
* Simplify LiveIntervals::shrinkToUses() a bit by using the new extendInBlock().Jakob Stoklund Olesen2011-03-021-31/+19
| | | | llvm-svn: 126806
* Fix typo.Jakob Stoklund Olesen2011-03-021-1/+1
| | | | llvm-svn: 126805
* Move more fragments of spill weight calculation into CalcSpillWeights.hJakob Stoklund Olesen2011-02-141-3/+4
| | | | | | | | | | Simplify the spill weight calculation a bit by bypassing getApproximateInstructionCount() and using LiveInterval::getSize() directly. This changes the computed spill weights, but only by a constant factor in each function. It should not affect how spill weights compare against each other, and so it shouldn't affect code generation. llvm-svn: 125530
* Move calcLiveBlockInfo() and the BlockInfo struct into SplitAnalysis.Jakob Stoklund Olesen2011-02-091-1/+1
| | | | | | No functional changes intended. llvm-svn: 125231
* Add LiveIntervals::addKillFlags() to recompute kill flags after register ↵Jakob Stoklund Olesen2011-02-081-0/+23
| | | | | | | | | allocation. This is a lot easier than trying to get kill flags right during live range splitting and rematerialization. llvm-svn: 125113
* Add LiveIntervals::shrinkToUses().Jakob Stoklund Olesen2011-02-081-0/+122
| | | | | | | | After uses of a live range are removed, recompute the live range to only cover the remaining uses. This is necessary after rematerializing the value before some (but not all) uses. llvm-svn: 125058
* Apparently, it is possible for a block with a landing pad successor to have ↵Jakob Stoklund Olesen2011-02-041-1/+1
| | | | | | | | | no calls. In that case we simply ignore the landing pad and split live ranges before the first terminator. llvm-svn: 124907
* Add LiveIntervals::getLastSplitPoint().Jakob Stoklund Olesen2011-02-041-0/+22
| | | | | | | | A live range cannot be split everywhere in a basic block. A split must go before the first terminator, and if the variable is live into a landing pad, the split must happen before the call that can throw. llvm-svn: 124894
* Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.Jakob Stoklund Olesen2011-01-101-2/+2
| | | | | | | | These functions not longer assert when passed 0, but simply return false instead. No functional change intended. llvm-svn: 123155
* Replace TargetRegisterInfo::printReg with a PrintReg class that also works ↵Jakob Stoklund Olesen2011-01-091-21/+3
| | | | | | | | | | without a TRI instance. Print virtual registers numbered from 0 instead of the arbitrary FirstVirtualRegister. The first virtual register is printed as %vreg0. TRI::NoRegister is printed as %noreg. llvm-svn: 123107
* Fix emergency spilling in LiveIntervals::spillPhysRegAroundRegDefsUses.Jakob Stoklund Olesen2010-11-161-22/+23
| | | | | | | | | | | | | | Always spill the full representative register at any point where any subregister is live. This fixes PR8620 which caused the old logic to get confused and not spill anything at all. The fundamental problem here is that the coalescer is too aggressive about physical register coalescing. It sometimes makes it impossible to allocate registers without these emergency spills. llvm-svn: 119375
* Fix PR8612 in the standard spiller, take two.Jakob Stoklund Olesen2010-11-161-1/+8
| | | | | | | | | | The live range of a register defined by an early clobber starts at the use slot, not the def slot. Except when it is an early clobber tied to a use operand. Then it starts at the def slot like a standard def. llvm-svn: 119305
* Revert "Fix PR8612 in the standard spiller as well."Jakob Stoklund Olesen2010-11-151-5/+1
| | | | | | This reverts r119183 which borke the buildbots. llvm-svn: 119270
* Fix PR8612 in the standard spiller as well.Jakob Stoklund Olesen2010-11-151-1/+5
| | | | | | | The live range of a register defined by an early clobber starts at the use slot, not the def slot. llvm-svn: 119183
* RABasic is nearly functionally complete. There are a few remainingAndrew Trick2010-11-101-8/+10
| | | | | | | | | benchmarks hitting an assertion. Adds LiveIntervalUnion::collectInterferingVRegs. Fixes "late spilling" by checking for any unspillable live vregs among all physReg aliases. llvm-svn: 118701
* Teach MachineBasicBlock::print() to annotate instructions and blocks withJakob Stoklund Olesen2010-10-261-13/+1
| | | | | | SlotIndexes when available. llvm-svn: 117392
* Begin adding static dependence information to passes, which will allow us toOwen Anderson2010-10-121-1/+10
| | | | | | | | | perform initialization without static constructors AND without explicit initialization by the client. For the moment, passes are required to initialize both their (potential) dependencies and any passes they preserve. I hope to be able to relax the latter requirement in the future. llvm-svn: 116334
* Replace FindLiveRangeContaining() with getVNInfoAt() in LiveIntervalAnalysis.Jakob Stoklund Olesen2010-10-111-10/+8
| | | | | | This helps hiding the LiveRange class which really should be private. llvm-svn: 116244
* Now with fewer extraneous semicolons!Owen Anderson2010-10-071-1/+1
| | | | llvm-svn: 115996
* Removed VNInfo::isDefAccurate(). Def "accuracy" can be checked by testing ↵Lang Hames2010-09-251-19/+19
| | | | | | whether LiveIntervals::getInstructionFromIndex(def) returns NULL. llvm-svn: 114791
* Remove SlotIndex::PHI_BIT. It is no longer used by anything.Jakob Stoklund Olesen2010-09-251-4/+2
| | | | llvm-svn: 114779
* PHI elimination shouldn't require machineloopinfo since it's used at -O0. ↵Evan Cheng2010-08-171-2/+3
| | | | | | Move the requirement to LiveIntervalAnalysis instead. Note this does not change the number of times machineloopinfo is computed. llvm-svn: 111285
* Remove trailing whitespace.Jakob Stoklund Olesen2010-08-121-25/+25
| | | | llvm-svn: 110944
* Oops. Don't normalize spill weights twice.Jakob Stoklund Olesen2010-08-031-1/+0
| | | | | | | | | When the normalizeSpillWeights function was introduced, I forgot to remove this normalization. This change could affect register allocation. Hopefully for the better. llvm-svn: 110119
* Fix batch of converting RegisterPass<> to INTIALIZE_PASS().Owen Anderson2010-07-211-1/+2
| | | | llvm-svn: 109045
* Remove many calls to TII::isMoveInstr. Targets should be producing COPY anyway.Jakob Stoklund Olesen2010-07-161-16/+4
| | | | | | TII::isMoveInstr is going tobe completely removed. llvm-svn: 108507
* Fix small bug in isMoveInstr -> COPY translationJakob Stoklund Olesen2010-07-091-3/+4
| | | | llvm-svn: 108013
* Change TII::foldMemoryOperand API to require the machine instruction to beJakob Stoklund Olesen2010-07-091-4/+4
| | | | | | | | | | | | | | inserted in a MBB, and return an already inserted MI. This target API change is necessary to allow foldMemoryOperand to call storeToStackSlot and loadFromStackSlot when folding a COPY to a stack slot reference in a target independent way. The foldMemoryOperandImpl hook is going to change in the same way, but I'll wait until COPY folding is actually implemented. Most targets only fold copies and won't need to specialize this hook at all. llvm-svn: 107991
* Convert EXTRACT_SUBREG to COPY when emitting machine instrs.Jakob Stoklund Olesen2010-07-081-0/+3
| | | | | | | | | EXTRACT_SUBREG no longer appears as a machine instruction. Use COPY instead. Add isCopy() checks in many places using isMoveInstr() and isExtractSubreg(). The isMoveInstr hook will be removed later. llvm-svn: 107879
* Remove references to INSERT_SUBREG after de-SSA.Jakob Stoklund Olesen2010-07-081-6/+0
| | | | | | | Fix X86InstrInfo::convertToThreeAddressWithLEA to generate COPY instead of INSERT_SUBREG. llvm-svn: 107878
* Revert "Remove references to INSERT_SUBREG after de-SSA" r107725.Jakob Stoklund Olesen2010-07-071-0/+6
| | | | | | Buildbot breakage. llvm-svn: 107744
* Remove references to INSERT_SUBREG after de-SSAJakob Stoklund Olesen2010-07-061-6/+0
| | | | llvm-svn: 107732
* Convert INSERT_SUBREG to COPY in TwoAddressInstructionPass.Jakob Stoklund Olesen2010-07-061-1/+1
| | | | | | | | | INSERT_SUBREG will now only appear in SSA machine instructions. Fix the handling of partial redefs in ProcessImplicitDefs. This is now relevant since partial redef COPY instructions appear. llvm-svn: 107726
* Detect and handle COPY in many places.Jakob Stoklund Olesen2010-07-031-5/+5
| | | | | | | This code is transitional, it will soon be possible to eliminate isExtractSubreg, isInsertSubreg, and isMoveInstr in most places. llvm-svn: 107547
* VNInfos don't need to be destructed anymore.Benjamin Kramer2010-06-261-2/+2
| | | | llvm-svn: 106943
* Don't track kills in VNInfo. Use interval ends instead.Jakob Stoklund Olesen2010-06-251-19/+1
| | | | | | | | | | | | The VNInfo.kills vector was almost unused except for all the code keeping it updated. The few places using it were easily rewritten to check for interval ends instead. The two new methods LiveInterval::killedAt and killedInRange are replacements. This brings us down to 3 independent data structures tracking kills. llvm-svn: 106905
* Remove the now unused LiveIntervals::getVNInfoSourceReg().Jakob Stoklund Olesen2010-06-241-31/+0
| | | | | | | This method was always a bit too simplistic for the real world. It didn't really deal with subregisters and such. llvm-svn: 106781
* Remove the -fast-spill option.Jakob Stoklund Olesen2010-06-241-87/+0
| | | | | | | This code path has never really been used, and we are going to be handling spilling through the Spiller interface in the future. llvm-svn: 106777
* Replace a big gob of old coalescer logic with the new CoalescerPair class.Jakob Stoklund Olesen2010-06-241-8/+4
| | | | | | | | | | CoalescerPair can determine if a copy can be coalesced, and which register gets merged away. The old logic in SimpleRegisterCoalescing had evolved into something a bit too convoluted. This second attempt fixes some crashes that only occurred Linux. llvm-svn: 106769
* Verify that VNI kills are pointing to existing instructions.Jakob Stoklund Olesen2010-06-241-0/+1
| | | | | | | In this case it is essential that the kill is real because the spiller will decide to omit a spill if it thinks there is a later kill. llvm-svn: 106751
* Revert "Replace a big gob of old coalescer logic with the new CoalescerPair ↵Jakob Stoklund Olesen2010-06-241-5/+8
| | | | | | | | class." Whiny buildbots. llvm-svn: 106710
* Replace a big gob of old coalescer logic with the new CoalescerPair class.Jakob Stoklund Olesen2010-06-241-8/+5
| | | | | | | | CoalescerPair can determine if a copy can be coalesced, and which register gets merged away. The old logic in SimpleRegisterCoalescing had evolved into something a bit too convoluted. llvm-svn: 106701
* TwoAddressInstructionPass::CoalesceExtSubRegs can insert INSERT_SUBREGJakob Stoklund Olesen2010-06-181-1/+8
| | | | | | | | | instructions, but it doesn't really understand live ranges, so the first INSERT_SUBREG uses an implicitly defined register. Fix it in LiveVariableAnalysis by adding the <undef> flag. llvm-svn: 106333
* Allow a register to be redefined multiple times in a basic block.Jakob Stoklund Olesen2010-06-161-6/+2
| | | | | | | | | | | | | | | | | | | | LiveVariableAnalysis was a bit picky about a register only being redefined once, but that really isn't necessary. Here is an example of chained INSERT_SUBREGs that we can handle now: 68 %reg1040<def> = INSERT_SUBREG %reg1040, %reg1028<kill>, 14 register: %reg1040 +[70,134:0) 76 %reg1040<def> = INSERT_SUBREG %reg1040, %reg1029<kill>, 13 register: %reg1040 replace range with [70,78:1) RESULT: %reg1040,0.000000e+00 = [70,78:1)[78,134:0) 0@78-(134) 1@70-(78) 84 %reg1040<def> = INSERT_SUBREG %reg1040, %reg1030<kill>, 12 register: %reg1040 replace range with [78,86:2) RESULT: %reg1040,0.000000e+00 = [70,78:1)[78,86:2)[86,134:0) 0@86-(134) 1@70-(78) 2@78-(86) 92 %reg1040<def> = INSERT_SUBREG %reg1040, %reg1031<kill>, 11 register: %reg1040 replace range with [86,94:3) RESULT: %reg1040,0.000000e+00 = [70,78:1)[78,86:2)[86,94:3)[94,134:0) 0@94-(134) 1@70-(78) 2@78-(86) 3@86-(94) rdar://problem/8096390 llvm-svn: 106152
* Use readsWritesVirtualRegister instead of counting uses and defs when insertingJakob Stoklund Olesen2010-06-031-46/+8
| | | | | | | | | | | | | spills and reloads. This means that a partial define of a register causes a reload so the other parts of the register are preserved. The reload can be prevented by adding an <imp-def> operand for the full register. This is already done by the coalescer and live interval analysis where relevant. llvm-svn: 105369
* - Change MachineInstr::findRegisterDefOperandIdx so it can also look for defsEvan Cheng2010-05-211-3/+3
| | | | | | | | | | that are aliases of the specified register. - Rename modifiesRegister to definesRegister since it's looking a def of the specific register or one of its super-registers. It's not looking for def of a sub-register or alias that could change the specified register. - Added modifiesRegister to look for defs of aliases. llvm-svn: 104377
* Revert "Use MachineInstr::readsWritesVirtualRegister to determine if a ↵Jakob Stoklund Olesen2010-05-211-8/+46
| | | | | | | | register is read." This reverts r104322. I think it was causing miscompilations. llvm-svn: 104323
* Use MachineInstr::readsWritesVirtualRegister to determine if a register is read.Jakob Stoklund Olesen2010-05-211-46/+8
| | | | | | This correctly handles partial redefines and undef uses. llvm-svn: 104322
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