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* Exclusively use SplitAnalysis::getLastSplitPoint().Jakob Stoklund Olesen2012-01-111-22/+0
| | | | | | | | | Delete the alternative implementation in LiveIntervalAnalysis. These functions computed the same thing, but SplitAnalysis caches the result. llvm-svn: 147911
* Use the 'regalloc' debug tag for most register allocator tracing.Jakob Stoklund Olesen2012-01-071-1/+1
| | | | llvm-svn: 147725
* Clarified assert text.Lang Hames2012-01-031-1/+1
| | | | llvm-svn: 147471
* Add bundle aware API for querying instruction properties and switch the codeEvan Cheng2011-12-071-1/+1
| | | | | | | | | | | | | | generator to it. For non-bundle instructions, these behave exactly the same as the MC layer API. For properties like mayLoad / mayStore, look into the bundle and if any of the bundled instructions has the property it would return true. For properties like isPredicable, only return true if *all* of the bundled instructions have the property. For properties like canFoldAsLoad, isCompare, conservatively return false for bundles. llvm-svn: 146026
* Fix early-clobber handling in shrinkToUses.Jakob Stoklund Olesen2011-11-141-12/+8
| | | | | | | | I broke this in r144515, it affected most ARM testers. <rdar://problem/10441389> llvm-svn: 144547
* Use kill slots instead of the previous slot in shrinkToUses.Jakob Stoklund Olesen2011-11-131-13/+14
| | | | | | It's more natural to use the actual end points. llvm-svn: 144515
* Terminate all dead defs at the dead slot instead of the 'next' slot.Jakob Stoklund Olesen2011-11-131-2/+2
| | | | | | | | | | | | | | | | | | | This makes no difference for normal defs, but early clobber dead defs now look like: [Slot_EarlyClobber; Slot_Dead) instead of: [Slot_EarlyClobber; Slot_Register). Live ranges for normal dead defs look like: [Slot_Register; Slot_Dead) as before. llvm-svn: 144512
* Simplify early clobber slots a bit.Jakob Stoklund Olesen2011-11-131-12/+3
| | | | llvm-svn: 144507
* Rename SlotIndexes to match how they are used.Jakob Stoklund Olesen2011-11-131-32/+32
| | | | | | | | | | | | | | | | | | | | The old naming scheme (load/use/def/store) can be traced back to an old linear scan article, but the names don't match how slots are actually used. The load and store slots are not needed after the deferred spill code insertion framework was deleted. The use and def slots don't make any sense because we are using half-open intervals as is customary in C code, but the names suggest closed intervals. In reality, these slots were used to distinguish early-clobber defs from normal defs. The new naming scheme also has 4 slots, but the names match how the slots are really used. This is a purely mechanical renaming, but some of the code makes a lot more sense now. llvm-svn: 144503
* Delete the old spilling framework from LiveIntervalAnalysis.Jakob Stoklund Olesen2011-11-121-1193/+0
| | | | | | This is dead code, all register allocators use InlineSpiller. llvm-svn: 144478
* Add a FIXME.Jakob Stoklund Olesen2011-10-051-0/+4
| | | | | | | | TwoAddressInstructionPass should annotate instructions with <undef> flags when it lower REG_SEQUENCE instructions. LiveIntervals should not be in the business of modifying code (except for kill flags, perhaps). llvm-svn: 141187
* Allow <undef> flags on def operands as well as uses.Jakob Stoklund Olesen2011-10-041-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The <undef> flag says that a MachineOperand doesn't read its register, or doesn't depend on the previous value of its register. A full register def never depends on the previous register value. A partial register def may depend on the previous value if it is intended to update part of a register. For example: %vreg10:dsub_0<def,undef> = COPY %vreg1 %vreg10:dsub_1<def> = COPY %vreg2 The first copy instruction defines the full %vreg10 register with the bits not covered by dsub_0 defined as <undef>. It is not considered a read of %vreg10. The second copy modifies part of %vreg10 while preserving the rest. It has an implicit read of %vreg10. This patch adds a MachineOperand::readsReg() method to determine if an operand reads its register. Previously, this was modelled by adding a full-register <imp-def> operand to the instruction. This approach makes it possible to determine directly from a MachineOperand if it reads its register. No scanning of MI operands is required. llvm-svn: 141124
* Speed up LiveIntervals::shrinkToUse with some caching.Jakob Stoklund Olesen2011-09-151-6/+8
| | | | | | | | | | | | | Blocks with multiple PHI successors only need to go on the worklist once. Use a SmallPtrSet to track the live-out blocks that have already been handled. This is a lot faster than the two live range check we would otherwise do. Also stop recomputing hasPHIKill flags. Like RenumberValues(), it is conservatively correct to leave them in, and they are not used for anything important. llvm-svn: 139792
* Switch extendInBlock() to take a kill slot instead of the last use slot.Jakob Stoklund Olesen2011-09-131-1/+1
| | | | | | | Three out of four clients prefer this interface which is consistent with extendIntervalEndTo() and LiveRangeCalc::extend(). llvm-svn: 139604
* When a physreg is live-in and live through a basic block, make sure its liveJakob Stoklund Olesen2011-04-301-1/+1
| | | | | | | | range covers the entire block. The live range can't be terminated at a random instruction. llvm-svn: 130619
* Fix a ton of comment typos found by codespell. Patch byChris Lattner2011-04-151-1/+1
| | | | | | Luis Felipe Strano Moraes! llvm-svn: 129558
* Don't add live ranges for sub-registers when clobbering a physical register.Jakob Stoklund Olesen2011-04-111-7/+0
| | | | | | | | | Both coalescing and register allocation already check aliases for interference, so these extra segments are only slowing us down. This speeds up both linear scan and the greedy register allocator. llvm-svn: 129283
* Recompute hasPHIKill flags when shrinking live intervals.Jakob Stoklund Olesen2011-04-071-1/+3
| | | | | | PHI values may be deleted, causing the flags to be wrong. This fixes PR9616. llvm-svn: 129092
* Allow coalescing with reserved physregs in certain cases:Jakob Stoklund Olesen2011-04-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | When a virtual register has a single value that is defined as a copy of a reserved register, permit that copy to be joined. These virtual register are usually copies of the stack pointer: %vreg75<def> = COPY %ESP; GR32:%vreg75 MOV32mr %vreg75, 1, %noreg, 0, %noreg, %vreg74<kill> MOV32mi %vreg75, 1, %noreg, 8, %noreg, 0 MOV32mi %vreg75<kill>, 1, %noreg, 4, %noreg, 0 CALLpcrel32 ... Coalescing these virtual registers early decreases register pressure. Previously, they were coalesced by RALinScan::attemptTrivialCoalescing after register allocation was completed. The lower register pressure causes the mcinst-lowering-cmp0.ll test case to fail because it depends on linear scan spilling a particular register. I am deleting 2008-08-05-SpillerBug.ll because it is counting the number of instructions emitted, and its revision history shows the 'correct' count being edited many times. llvm-svn: 128845
* lib/CodeGen/LiveIntervalAnalysis.cpp: [PR9590] Don't use ↵NAKAMURA Takumi2011-03-311-1/+3
| | | | | | | | | | std::pow(float,float) here. We don't expect the real "powf()" on some hosts (and powf() would be available on other hosts). For consistency, std::pow(double,double) may be called instead. Or, precision issue might attack us, to see unstable regalloc and stack coloring. llvm-svn: 128629
* Accept instructions that read undefined values.Jakob Stoklund Olesen2011-03-181-1/+9
| | | | | | | This is not supposed to happen, but I have seen the x86 rematter getting confused when rematerializing partial redefs. llvm-svn: 127857
* Dead code elimination may separate the live interval into multiple connected ↵Jakob Stoklund Olesen2011-03-171-1/+5
| | | | | | | | | components. I have convinced myself that it can only happen when a phi value dies. When it happens, allocate new virtual registers for the components. llvm-svn: 127827
* Clarify debugging output.Jakob Stoklund Olesen2011-03-161-2/+2
| | | | llvm-svn: 127771
* Make SpillIs an optional pointer. Avoid creating a bunch of temporary ↵Jakob Stoklund Olesen2011-03-101-8/+8
| | | | | | SmallVectors. llvm-svn: 127388
* Let shrinkToUses optionally return a list of now dead machine instructions.Jakob Stoklund Olesen2011-03-071-1/+6
| | | | llvm-svn: 127192
* Handle the special case of registers begin redefined by early-clobber defs.Jakob Stoklund Olesen2011-03-071-0/+7
| | | | | | | In this case, the value need to be available at the load index instead of the normal use index. llvm-svn: 127167
* Fix PHI handling in LiveIntervals::shrinkToUses().Jakob Stoklund Olesen2011-03-031-1/+1
| | | | | | | | | We need to wait until we meet a PHIDef in its defining block before resurrecting PHIKills in the predecessors. This should unbreak the llvm-gcc-build-x86_64-darwin10-x-mingw32-x-armeabi bot. llvm-svn: 126905
* Quiet a compiler warning about unused variable 'ExtVNI'.Nick Lewycky2011-03-021-0/+1
| | | | llvm-svn: 126815
* Simplify LiveIntervals::shrinkToUses() a bit by using the new extendInBlock().Jakob Stoklund Olesen2011-03-021-31/+19
| | | | llvm-svn: 126806
* Fix typo.Jakob Stoklund Olesen2011-03-021-1/+1
| | | | llvm-svn: 126805
* Move more fragments of spill weight calculation into CalcSpillWeights.hJakob Stoklund Olesen2011-02-141-3/+4
| | | | | | | | | | Simplify the spill weight calculation a bit by bypassing getApproximateInstructionCount() and using LiveInterval::getSize() directly. This changes the computed spill weights, but only by a constant factor in each function. It should not affect how spill weights compare against each other, and so it shouldn't affect code generation. llvm-svn: 125530
* Move calcLiveBlockInfo() and the BlockInfo struct into SplitAnalysis.Jakob Stoklund Olesen2011-02-091-1/+1
| | | | | | No functional changes intended. llvm-svn: 125231
* Add LiveIntervals::addKillFlags() to recompute kill flags after register ↵Jakob Stoklund Olesen2011-02-081-0/+23
| | | | | | | | | allocation. This is a lot easier than trying to get kill flags right during live range splitting and rematerialization. llvm-svn: 125113
* Add LiveIntervals::shrinkToUses().Jakob Stoklund Olesen2011-02-081-0/+122
| | | | | | | | After uses of a live range are removed, recompute the live range to only cover the remaining uses. This is necessary after rematerializing the value before some (but not all) uses. llvm-svn: 125058
* Apparently, it is possible for a block with a landing pad successor to have ↵Jakob Stoklund Olesen2011-02-041-1/+1
| | | | | | | | | no calls. In that case we simply ignore the landing pad and split live ranges before the first terminator. llvm-svn: 124907
* Add LiveIntervals::getLastSplitPoint().Jakob Stoklund Olesen2011-02-041-0/+22
| | | | | | | | A live range cannot be split everywhere in a basic block. A split must go before the first terminator, and if the variable is live into a landing pad, the split must happen before the call that can throw. llvm-svn: 124894
* Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.Jakob Stoklund Olesen2011-01-101-2/+2
| | | | | | | | These functions not longer assert when passed 0, but simply return false instead. No functional change intended. llvm-svn: 123155
* Replace TargetRegisterInfo::printReg with a PrintReg class that also works ↵Jakob Stoklund Olesen2011-01-091-21/+3
| | | | | | | | | | without a TRI instance. Print virtual registers numbered from 0 instead of the arbitrary FirstVirtualRegister. The first virtual register is printed as %vreg0. TRI::NoRegister is printed as %noreg. llvm-svn: 123107
* Fix emergency spilling in LiveIntervals::spillPhysRegAroundRegDefsUses.Jakob Stoklund Olesen2010-11-161-22/+23
| | | | | | | | | | | | | | Always spill the full representative register at any point where any subregister is live. This fixes PR8620 which caused the old logic to get confused and not spill anything at all. The fundamental problem here is that the coalescer is too aggressive about physical register coalescing. It sometimes makes it impossible to allocate registers without these emergency spills. llvm-svn: 119375
* Fix PR8612 in the standard spiller, take two.Jakob Stoklund Olesen2010-11-161-1/+8
| | | | | | | | | | The live range of a register defined by an early clobber starts at the use slot, not the def slot. Except when it is an early clobber tied to a use operand. Then it starts at the def slot like a standard def. llvm-svn: 119305
* Revert "Fix PR8612 in the standard spiller as well."Jakob Stoklund Olesen2010-11-151-5/+1
| | | | | | This reverts r119183 which borke the buildbots. llvm-svn: 119270
* Fix PR8612 in the standard spiller as well.Jakob Stoklund Olesen2010-11-151-1/+5
| | | | | | | The live range of a register defined by an early clobber starts at the use slot, not the def slot. llvm-svn: 119183
* RABasic is nearly functionally complete. There are a few remainingAndrew Trick2010-11-101-8/+10
| | | | | | | | | benchmarks hitting an assertion. Adds LiveIntervalUnion::collectInterferingVRegs. Fixes "late spilling" by checking for any unspillable live vregs among all physReg aliases. llvm-svn: 118701
* Teach MachineBasicBlock::print() to annotate instructions and blocks withJakob Stoklund Olesen2010-10-261-13/+1
| | | | | | SlotIndexes when available. llvm-svn: 117392
* Begin adding static dependence information to passes, which will allow us toOwen Anderson2010-10-121-1/+10
| | | | | | | | | perform initialization without static constructors AND without explicit initialization by the client. For the moment, passes are required to initialize both their (potential) dependencies and any passes they preserve. I hope to be able to relax the latter requirement in the future. llvm-svn: 116334
* Replace FindLiveRangeContaining() with getVNInfoAt() in LiveIntervalAnalysis.Jakob Stoklund Olesen2010-10-111-10/+8
| | | | | | This helps hiding the LiveRange class which really should be private. llvm-svn: 116244
* Now with fewer extraneous semicolons!Owen Anderson2010-10-071-1/+1
| | | | llvm-svn: 115996
* Removed VNInfo::isDefAccurate(). Def "accuracy" can be checked by testing ↵Lang Hames2010-09-251-19/+19
| | | | | | whether LiveIntervals::getInstructionFromIndex(def) returns NULL. llvm-svn: 114791
* Remove SlotIndex::PHI_BIT. It is no longer used by anything.Jakob Stoklund Olesen2010-09-251-4/+2
| | | | llvm-svn: 114779
* PHI elimination shouldn't require machineloopinfo since it's used at -O0. ↵Evan Cheng2010-08-171-2/+3
| | | | | | Move the requirement to LiveIntervalAnalysis instead. Note this does not change the number of times machineloopinfo is computed. llvm-svn: 111285
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