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* Added MachineInstr::isRegTiedToDefOperand to check for two-addressness.Evan Cheng2009-03-191-6/+2
| | | | llvm-svn: 67335
* Fix how livein live intervals are handled. Previously it could end at MBB ↵Evan Cheng2009-03-051-4/+9
| | | | | | start. Sorry, no small test case possible. llvm-svn: 66129
* Fix PR3486. Fix a bug in code that manually patch physical register live ↵Evan Cheng2009-02-081-2/+9
| | | | | | interval after its sub-register is coalesced with a virtual register. llvm-svn: 64082
* Exit with nice warnings when register allocator run out of registers.Evan Cheng2009-01-291-1/+13
| | | | llvm-svn: 63267
* Change TargetInstrInfo::isMoveInstr to return source and destination ↵Evan Cheng2009-01-201-10/+10
| | | | | | sub-register indices as well. llvm-svn: 62600
* The coalescer does not coalesce a virtual register to a physical register if ↵Evan Cheng2009-01-071-3/+49
| | | | | | | | | | | | | | any of the physical register's sub-register live intervals overlaps with the virtual register. This is overly conservative. It prevents a extract_subreg from being coalesced away: v1024 = EDI // not killed = = EDI One possible solution is for the coalescer to examine the sub-register live intervals in the same manner as the physical register. Another possibility is to examine defs and uses (when needed) of sub-registers. Both solutions are too expensive. For now, look for "short virtual intervals" and scan instructions to look for conflict instead. This is a small win on x86-64. e.g. It shaves 403.gcc by ~80 instructions. llvm-svn: 61847
* Fix PR3149. If an early clobber def is a physical register and it is tied to ↵Evan Cheng2008-12-191-7/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | an input operand, it effectively extends the live range of the physical register. Currently we do not have a good way to represent this. 172 %ECX<def> = MOV32rr %reg1039<kill> 180 INLINEASM <es:subl $5,$1 sbbl $3,$0>, 10, %EAX<def>, 14, %ECX<earlyclobber,def>, 9, %EAX<kill>, 36, <fi#0>, 1, %reg0, 0, 9, %ECX<kill>, 36, <fi#1>, 1, %reg0, 0 188 %EAX<def> = MOV32rr %EAX<kill> 196 %ECX<def> = MOV32rr %ECX<kill> 204 %ECX<def> = MOV32rr %ECX<kill> 212 %EAX<def> = MOV32rr %EAX<kill> 220 %EAX<def> = MOV32rr %EAX 228 %reg1039<def> = MOV32rr %ECX<kill> The early clobber operand ties ECX input to the ECX def. The live interval of ECX is represented as this: %reg20,inf = [46,47:1)[174,230:0) 0@174-(230) 1@46-(47) The right way to represent this is something like %reg20,inf = [46,47:2)[174,182:1)[181:230:0) 0@174-(182) 1@181-230 @2@46-(47) Of course that won't work since that means overlapping live ranges defined by two val#. The workaround for now is to add a bit to val# which says the val# is redefined by a early clobber def somewhere. This prevents the move at 228 from being optimized away by SimpleRegisterCoalescing::AdjustCopiesBackFrom. llvm-svn: 61259
* Clarify some comments.Dan Gohman2008-12-081-2/+2
| | | | llvm-svn: 60683
* Reason #3 from 60595 doesn't hold true. If we can fold a PIC load from ↵Evan Cheng2008-12-051-9/+11
| | | | | | constpool into a use, the rewrite happens at time of spill (not in VirtRegMap). Later on, if the GlobalBaseReg is spilled, the spiller can see the use uses GlobalBaseReg and do the right thing. llvm-svn: 60596
* Fix comment.Evan Cheng2008-12-051-1/+1
| | | | llvm-svn: 60592
* Drop the reg argument to isRegReDefinedByTwoAddr, which was redundant.Dan Gohman2008-12-051-1/+1
| | | | llvm-svn: 60586
* Rename isSimpleLoad to canFoldAsLoad, to better reflect its meaning.Dan Gohman2008-12-031-3/+3
| | | | llvm-svn: 60487
* LiveRanges are represented as half-open ranges. Fix the findLiveInMBBs codeDan Gohman2008-11-261-1/+1
| | | | | | | and the LiveInterval.h top-level comment and accordingly. This fixes blocks having spurious live-in registers in boundary cases. llvm-svn: 60092
* Silence unused variable warnings.Devang Patel2008-11-211-0/+1
| | | | llvm-svn: 59841
* Use find_first/find_next to iterate through all the set bits in aDan Gohman2008-11-131-8/+7
| | | | | | BitVector, instead of manually testing each bit. llvm-svn: 59246
* Remove some debugging code made redundant by the change to doDan Gohman2008-11-121-8/+0
| | | | | | | coalescing as a separate pass rather than inside of LiveIntervalAnalysis. llvm-svn: 59146
* - Rewrite code that update register live interval that's split.Evan Cheng2008-10-291-3/+24
| | | | | | | - Create and update spill slot live intervals. - Lots of bug fixes. llvm-svn: 58367
* Fix PR2634. Create new virtual registers from spills early so that weDavid Greene2008-10-271-8/+19
| | | | | | | can give it the same stack slot as the spilled interval if it is folded. This prevents the fold/unfold code from pointing to the wrong register. llvm-svn: 58255
* Avoid splitting an interval multiple times; avoid splitting ↵Evan Cheng2008-10-241-0/+9
| | | | | | re-materializable val# (for now). llvm-svn: 58068
* By min, I mean max.Evan Cheng2008-10-181-1/+1
| | | | llvm-svn: 57766
* When creating intervals, leave min(1, numdefs) holes after each instruction.Evan Cheng2008-10-181-5/+13
| | | | llvm-svn: 57765
* Add an option to enable StrongPHIElimination, for ease of testing.Owen Anderson2008-10-071-2/+7
| | | | llvm-svn: 57259
* Switch the MachineOperand accessors back to the short names likeDan Gohman2008-10-031-11/+11
| | | | | | isReg, etc., from isRegister, etc. llvm-svn: 57006
* Fix a simple error in renumbering kill markaers, that took an inordinant ↵Owen Anderson2008-09-301-1/+1
| | | | | | amount of time to track down. llvm-svn: 56889
* Re-apply 56835 along with header file changes.Evan Cheng2008-09-301-5/+15
| | | | llvm-svn: 56848
* Revert commit 56835 since it breaks the build.Duncan Sands2008-09-301-15/+5
| | | | | | | | | | "If a re-materializable instruction has a register operand, the spiller will change the register operand's spill weight to HUGE_VAL to avoid it being spilled. However, if the operand is already in the queue ready to be spilled, avoid re-materializing it". llvm-svn: 56837
* If a re-materializable instruction has a register operand, the spiller will ↵Evan Cheng2008-09-301-5/+15
| | | | | | change the register operand's spill weight to HUGE_VAL to avoid it being spilled. However, if the operand is already in the queue ready to be spilled, avoid re-materializing it. llvm-svn: 56835
* Next round of earlyclobber handling. Approach theDale Johannesen2008-09-241-13/+15
| | | | | | | | | | RA problem by expanding the live interval of an earlyclobber def back one slot. Remove overlap-earlyclobber throughout. Remove earlyclobber bits and their handling from live internals. llvm-svn: 56539
* Fetch the starting index of the block when assigning intervals. This gets ↵Owen Anderson2008-09-211-2/+2
| | | | | | | | live-in indices correct in the presence of things like EH labels. llvm-svn: 56410
* Remove AsmThatEarlyClobber etc. from LiveIntervalAnalysisDale Johannesen2008-09-191-71/+4
| | | | | | | and redo as linked list walk. Logic moved into RA. Per review feedback. llvm-svn: 56326
* Add a bit to mark operands of asm's that conflictDale Johannesen2008-09-171-2/+80
| | | | | | | | | with an earlyclobber operand elsewhere. Propagate this bit and the earlyclobber bit through SDISel. Change linear-scan RA not to allocate regs in a way that conflicts with an earlyclobber. See also comments. llvm-svn: 56290
* Live intervals for live-in registers should begin at the beginning of a ↵Owen Anderson2008-09-151-7/+11
| | | | | | | | | basic block, not at the first instruction. Also, their valno's should have an unknown def. This has no effect currently, but was causing issues when StrongPHIElimination was enabled. llvm-svn: 56231
* Remove isImm(), isReg(), and friends, in favor of Dan Gohman2008-09-131-3/+3
| | | | | | | | | isImmediate(), isRegister(), and friends, to avoid confusion about having two different names with the same meaning. I'm not attached to the longer names, and would be ok with changing to the shorter names if others prefer it. llvm-svn: 56189
* Allow the fast-path spilling code to attempt folding, but still leaving out ↵Owen Anderson2008-08-191-59/+68
| | | | | | remat and splitting. llvm-svn: 55012
* The fast-path still needs to set kill markers and spill/restore points as ↵Owen Anderson2008-08-191-0/+3
| | | | | | | | | appropriate. With this patch, all of MultiSource/Applications and all of SPEC2000/2006 pass with the SimpleSpiller and this fast-path enabled. llvm-svn: 55000
* Add a flag to enable the fast spilling path.Owen Anderson2008-08-191-0/+7
| | | | llvm-svn: 54958
* Fix a few more bugs:Owen Anderson2008-08-181-3/+8
| | | | | | | 1) Assign stack slots to new temporaries. 2) Don't insert an interval into the return vector more than once. llvm-svn: 54956
* Fix several bugs in the new fast-path:Owen Anderson2008-08-181-16/+16
| | | | | | | | 1) Remove an incorrect assertion. 2) Set the stack slot weight properly. 3) Resize the VirtRegMap when needed. llvm-svn: 54949
* Clients of addIntervalForSpills expect the added intervals to be returned ↵Owen Anderson2008-08-181-0/+9
| | | | | | sorted by starting index. llvm-svn: 54939
* Simplify the fast-patch interval spilling by using ↵Owen Anderson2008-08-181-72/+50
| | | | | | MachineRegisterInfo::reg_iterator. llvm-svn: 54930
* Resurrect some ancient code to add spill ranges without attempting folding, ↵Owen Anderson2008-08-181-0/+105
| | | | | | | | | remat, or splitting. This code has been updated to current APIs in so far as it compiles and, in theory, works, but does not take advantage of recent advancements. For instance, it could be improved by using MachineRegisterInfo::use_iterator. llvm-svn: 54924
* Expunge the last uses of std::map from LiveIntervals.Owen Anderson2008-08-131-13/+13
| | | | llvm-svn: 54766
* Move r2iMap_ over to DenseMap from std::map.Owen Anderson2008-08-131-1/+1
| | | | llvm-svn: 54765
* Make the allocation of LiveIntervals explicit, rather than holding them in ↵Owen Anderson2008-08-131-8/+13
| | | | | | | | the r2iMap_ by value. This will prevent references to them from being invalidated if the map is changed. llvm-svn: 54763
* Oops, didn't mean to commit this.Owen Anderson2008-08-061-0/+2
| | | | llvm-svn: 54425
* Only remap each VNInfo once when doing renumbering.Owen Anderson2008-08-061-13/+15
| | | | llvm-svn: 54420
* Value numbers whose def index is a special sentinel value should not be ↵Owen Anderson2008-07-301-11/+13
| | | | | | remapped. llvm-svn: 54218
* More fixes for corner cases when remapping live range indices.Owen Anderson2008-07-301-10/+10
| | | | llvm-svn: 54186
* Don't decrement the BB remap when we don't need to.Owen Anderson2008-07-291-8/+4
| | | | llvm-svn: 54173
* Fold the useful features of alist and alist_node into ilist, andDan Gohman2008-07-281-1/+1
| | | | | | | | | | | | | | | | a new ilist_node class, and remove them. Unlike alist_node, ilist_node doesn't attempt to manage storage itself, so it avoids the associated problems, including being opaque in gdb. Adjust the Recycler class so that it doesn't depend on alist_node. Also, change it to use explicit Size and Align parameters, allowing it to work when the largest-sized node doesn't have the greatest alignment requirement. Change MachineInstr's MachineMemOperand list from a pool-backed alist to a std::list for now. llvm-svn: 54146
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