summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen/LiveIntervalAnalysis.cpp
Commit message (Collapse)AuthorAgeFilesLines
* Simplify my (il)logic.Evan Cheng2007-11-071-11/+2
| | | | llvm-svn: 43819
* When the allocator rewrite a spill register with new virtual register, it ↵Evan Cheng2007-11-061-3/+12
| | | | | | | | replaces other operands of the same register. Watch out for situations where only some of the operands are sub-register uses. llvm-svn: 43776
* Fix a bug where a def use operand isn't being detected as a sub-register use.Evan Cheng2007-11-061-4/+7
| | | | llvm-svn: 43763
* Fix PR1187.Evan Cheng2007-11-051-1/+1
| | | | llvm-svn: 43692
* There are times when the coalescer would not coalesce away a copy but the copyEvan Cheng2007-11-031-0/+33
| | | | | | | | | | | | | | | | can be eliminated by the allocator is the destination and source targets the same register. The most common case is when the source and destination registers are in different class. For example, on x86 mov32to32_ targets GR32_ which contains a subset of the registers in GR32. The allocator can do 2 things: 1. Set the preferred allocation for the destination of a copy to that of its source. 2. After allocation is done, change the allocation of a copy destination (if legal) so the copy can be eliminated. This eliminates 443 extra moves from 403.gcc. llvm-svn: 43662
* Apply Chris' suggestions.Evan Cheng2007-10-171-1/+1
| | | | llvm-svn: 43069
* Clean up code that calculate MBB live-in's.Evan Cheng2007-10-171-0/+36
| | | | llvm-svn: 43060
* Did mean to leave this in. INSERT_SUBREG isn't being coalesced yet.Evan Cheng2007-10-121-2/+1
| | | | llvm-svn: 42916
* EXTRACT_SUBREG coalescing support. The coalescer now treats EXTRACT_SUBREG likeEvan Cheng2007-10-121-173/+127
| | | | | | | | | (almost) a register copy. However, it always coalesced to the register of the RHS (the super-register). All uses of the result of a EXTRACT_SUBREG are sub- register uses which adds subtle complications to load folding, spiller rewrite, etc. llvm-svn: 42899
* Kill cycle of an live range is always the last use index + 1.Evan Cheng2007-10-081-1/+1
| | | | llvm-svn: 42742
* Use empty() member functions when that's what's being tested for insteadDan Gohman2007-10-031-11/+9
| | | | | | of comparing begin() and end(). llvm-svn: 42585
* Remove isReg, isImm, and isMBB, and change all their users to use Dan Gohman2007-09-141-1/+1
| | | | | | | isRegister, isImmediate, and isMachineBasicBlock, which are equivalent, and more popular. llvm-svn: 41958
* Fix a memory leak.Evan Cheng2007-09-061-1/+2
| | | | llvm-svn: 41739
* Use pool allocator for all the VNInfo's to improve memory access locality. ↵Evan Cheng2007-09-051-21/+22
| | | | | | This reduces coalescing time on siod Mac OS X PPC by 35%. Also remove the back ptr from VNInfo to LiveInterval and other tweaks. llvm-svn: 41729
* Try fold re-materialized load instructions into its uses.Evan Cheng2007-08-301-11/+22
| | | | llvm-svn: 41598
* Change LiveRange so it keeps a pointer to the VNInfo rather than an index.Evan Cheng2007-08-291-51/+56
| | | | | | | Changes related modules so VNInfo's are not copied. This decrease copy coalescing time by 45% and overall compilation time by 10% on siod. llvm-svn: 41579
* Fix some kill info update bugs; add hidden option -disable-rematerialization ↵Evan Cheng2007-08-161-1/+10
| | | | | | to turn off remat for debugging. llvm-svn: 41118
* Re-implement trivial rematerialization. This allows def MIs whose live ↵Evan Cheng2007-08-131-113/+236
| | | | | | intervals that are coalesced to be rematerialized. llvm-svn: 41060
* Code to maintain kill information during register coalescing.Evan Cheng2007-08-111-4/+8
| | | | llvm-svn: 41016
* Adding kill info to val#.Evan Cheng2007-08-081-3/+10
| | | | llvm-svn: 40925
* - Each val# can have multiple kills.Evan Cheng2007-08-081-4/+5
| | | | | | | - Fix some minor bugs related to special markers on val# def. ~0U means undefined, ~1U means dead val#. llvm-svn: 40916
* - LiveInterval value#'s now have 3 components: def instruction #,Evan Cheng2007-08-071-7/+6
| | | | | | | | | | kill instruction #, and source register number (iff the value# is defined by a copy). - Now def instruction # is set for every value#, not just for copy defined ones. - Update some outdated code related inactive live ranges. - Kill info not yet set. That's next patch. llvm-svn: 40913
* If a livein is not used in the block. It's live through.Evan Cheng2007-06-271-5/+8
| | | | llvm-svn: 37764
* Fix an obvious bug. Old code only worked for the entry block.Evan Cheng2007-06-271-3/+4
| | | | llvm-svn: 37743
* Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoadDan Gohman2007-06-191-5/+4
| | | | | | | | | | with a general target hook to identify rematerializable instructions. Some instructions are only rematerializable with specific operands, such as loads from constant pools, while others are always rematerializable. This hook allows both to be identified as being rematerializable with the same mechanism. llvm-svn: 37644
* Add a target hook to allow loads from constant pools to be rematerialized, ↵Dan Gohman2007-06-141-2/+4
| | | | | | | | and an implementation for x86. llvm-svn: 37576
* Factor live variable analysis so it does not do register coalescingDavid Greene2007-06-081-1055/+3
| | | | | | | | | | simultaneously. Move that pass to SimpleRegisterCoalescing. This makes it easier to implement alternative register allocation and coalescing strategies while maintaining reuse of the existing live interval analysis. llvm-svn: 37520
* Only worry about intervening kill if there are more than one live ranges in ↵Evan Cheng2007-05-141-3/+5
| | | | | | the interval. llvm-svn: 37052
* Fix for PR1406:Evan Cheng2007-05-141-2/+35
| | | | | | | | | | | | | v1 = r2 = move v1 = op r2<kill> ... r2 = move v1 = op r2<kill> Clear the first r2 kill if v1 and r2 are joined. llvm-svn: 37050
* Drop 'const'Devang Patel2007-05-031-1/+1
| | | | llvm-svn: 36662
* Use 'static const char' instead of 'static const int'.Devang Patel2007-05-021-1/+1
| | | | | | | Due to darwin gcc bug, one version of darwin linker coalesces static const int, which defauts PassID based pass identification. llvm-svn: 36652
* Fix build error.Lauro Ramos Venancio2007-05-021-1/+1
| | | | llvm-svn: 36648
* Do not use typeinfo to identify pass in pass manager.Devang Patel2007-05-011-0/+1
| | | | llvm-svn: 36632
* Rename findRegisterUseOperand to findRegisterUseOperandIdx to avoid confusion.Evan Cheng2007-04-261-1/+1
| | | | llvm-svn: 36483
* Fix for PR1306.Evan Cheng2007-04-251-10/+48
| | | | | | | | | - A register def / use now implicitly affects sub-register liveness but does not affect liveness information of super-registers. - Def of a larger register (if followed by a use later) is treated as read/mod/write of a smaller register. llvm-svn: 36434
* VarInfo::UsedBlocks is no longer used. Remove.Evan Cheng2007-04-181-2/+1
| | | | llvm-svn: 36250
* Don't populate TryAgainList when coalescing only physical registers with ↵Evan Cheng2007-04-181-6/+6
| | | | | | virtual registers. llvm-svn: 36240
* Copy coalescing change to prevent a physical register from being pin to aEvan Cheng2007-04-171-77/+76
| | | | | | | | | | | | | long live interval that has low usage density. 1. Change order of coalescing to join physical registers with virtual registers first before virtual register intervals become too long. 2. Check size and usage density to determine if it's worthwhile to join. 3. If joining is aborted, assign virtual register live interval allocation preference field to the physical register. 4. Register allocator should try to allocate to the preferred register first (if available) to create identify moves that can be eliminated. llvm-svn: 36218
* Re-materialize all loads from fixed stack slots.Evan Cheng2007-04-041-5/+12
| | | | llvm-svn: 35660
* Trivially re-materializable instructions have spill weights that are half of ↵Evan Cheng2007-04-041-6/+6
| | | | | | what it would be otherwise. llvm-svn: 35658
* Ugh. Copy coalescer does not update register numbers.Evan Cheng2007-04-021-2/+15
| | | | llvm-svn: 35600
* Bug fix for PR1279. When isDead is propagate by copy coalescing, we keep lengthEvan Cheng2007-03-301-5/+10
| | | | | | | | of dead def live interval at 1 to avoid multiple def's targeting the same register. The previous patch missed a case where the source operand is live-in. In that case, remove the whole interval. llvm-svn: 35512
* Move rematerialization out of beta.Evan Cheng2007-03-281-7/+1
| | | | llvm-svn: 35419
* Fix for PR1279. Dead def has a live interval of length 1. Copy coalescing shouldEvan Cheng2007-03-281-3/+5
| | | | | | not violate that. llvm-svn: 35396
* Fix for PR1266. Don't mark a two address operand IsKill.Evan Cheng2007-03-261-3/+3
| | | | llvm-svn: 35365
* Fix for PR1257. Bug in live range shortening as a result of copy coalescingEvan Cheng2007-03-221-11/+9
| | | | | | where the destination is dead. llvm-svn: 35252
* First cut trivial re-materialization support.Evan Cheng2007-03-201-5/+26
| | | | llvm-svn: 35208
* Remove -reduce-joining-phys-regs options. Make it on by default.Evan Cheng2007-03-191-3/+1
| | | | llvm-svn: 35165
* Minor bug fix.Evan Cheng2007-03-191-1/+1
| | | | llvm-svn: 35153
* - Merge UsedBlocks info after two virtual registers are coalesced.Evan Cheng2007-03-181-23/+30
| | | | | | - Use distance to closest use to determine whether to abort coalescing. llvm-svn: 35141
OpenPOWER on IntegriCloud