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* Change errs() to dbgs().David Greene2010-01-041-2/+3
| | | | llvm-svn: 92528
* Added a new "splitting" spiller.Lang Hames2009-12-091-1/+1
| | | | | | | | | | | | | When a call is placed to spill an interval this spiller will first try to break the interval up into its component values. Single value intervals and intervals which have already been split (or are the result of previous splits) are spilled by the default spiller. Splitting intervals as described above may improve the performance of generated code in some circumstances. This work is experimental however, and it still miscompiles many benchmarks. It's not recommended for general use yet. llvm-svn: 90951
* The Indexes Patch.Lang Hames2009-11-031-58/+31
| | | | | | | | | | | | | | | | This introduces a new pass, SlotIndexes, which is responsible for numbering instructions for register allocation (and other clients). SlotIndexes numbering is designed to match the existing scheme, so this patch should not cause any changes in the generated code. For consistency, and to avoid naming confusion, LiveIndex has been renamed SlotIndex. The processImplicitDefs method of the LiveIntervals analysis has been moved into its own pass so that it can be run prior to SlotIndexes. This was necessary to match the existing numbering scheme. llvm-svn: 85979
* Oops. Renamed remaining MachineInstrIndex references.Lang Hames2009-10-031-3/+3
| | | | llvm-svn: 83255
* Renamed MachineInstrIndex to LiveIndex.Lang Hames2009-10-031-23/+23
| | | | llvm-svn: 83254
* Moved some more index operations over to LiveIntervals.Lang Hames2009-09-121-1/+1
| | | | llvm-svn: 81605
* Replaces uses of unsigned for indexes in LiveInterval and VNInfo withLang Hames2009-09-041-46/+64
| | | | | | | | a new class, MachineInstrIndex, which hides arithmetic details from most clients. This is a step towards allowing the register allocator to update/insert code during allocation. llvm-svn: 81040
* shoot a few more std::ostream print methods in the head.Chris Lattner2009-08-231-15/+1
| | | | llvm-svn: 79814
* Modified VNInfo. The "copy" member is now a union which holds the copy for a ↵Lang Hames2009-08-101-1/+1
| | | | | | register interval, or the defining register for a stack interval. Access is via getCopy/setCopy and getReg/setReg. llvm-svn: 78620
* More move to raw_ostream.Daniel Dunbar2009-07-241-4/+3
| | | | llvm-svn: 76966
* Move more to raw_ostream, provide support for writing MachineBasicBlock,Daniel Dunbar2009-07-241-0/+13
| | | | | | LiveInterval, etc to raw_ostream. llvm-svn: 76965
* Reorder if-else branches as suggested by Bill.David Greene2009-07-221-4/+4
| | | | llvm-svn: 76808
* Make some changes suggested by Bill and Evan.David Greene2009-07-221-17/+24
| | | | llvm-svn: 76775
* Add some support for iterative coalescers to calculate a joined liveDavid Greene2009-07-211-1/+17
| | | | | | | | | | range's weight properly. This is turned off right now in the sense that you'll get an assert if you get into a situation that can only be caused by an iterative coalescer. All other code paths operate exactly as before so there is no functional change with this patch. The asserts should be disabled if/when an iterative coalescer gets added to trunk. llvm-svn: 76680
* Improved tracking of value number kills. VN kills are now representedLang Hames2009-07-091-3/+6
| | | | | | | | | | | | as an (index,bool) pair. The bool flag records whether the kill is a PHI kill or not. This code will be used to enable splitting of live intervals containing PHI-kills. A slight change to live interval weights introduced an extra spill into lsr-code-insertion (outside the critical sections). The test condition has been updated to reflect this. llvm-svn: 75097
* Fixed a bug in LiveInterval scaling (failure to scale VNI defs correctly), ↵Lang Hames2009-06-241-1/+2
| | | | | | removed old TODO comments. llvm-svn: 74054
* VNInfo cleanup.Lang Hames2009-06-171-19/+17
| | | | llvm-svn: 73634
* Part 1.Evan Cheng2009-06-151-7/+5
| | | | | | | | | | | | | | | | | | | | | - Change register allocation hint to a pair of unsigned integers. The hint type is zero (which means prefer the register specified as second part of the pair) or entirely target dependent. - Allow targets to specify alternative register allocation orders based on allocation hint. Part 2. - Use the register allocation hint system to implement more aggressive load / store multiple formation. - Aggressively form LDRD / STRD. These are formed *before* register allocation. It has to be done this way to shorten live interval of base and offset registers. e.g. v1025 = LDR v1024, 0 v1026 = LDR v1024, 0 => v1025,v1026 = LDRD v1024, 0 If this transformation isn't done before allocation, v1024 will overlap v1025 which means it more difficult to allocate a register pair. - Even with the register allocation hint, it may not be possible to get the desired allocation. In that case, the post-allocation load / store multiple pass must fix the ldrd / strd instructions. They can either become ldm / stm instructions or back to a pair of ldr / str instructions. This is work in progress, not yet enabled. llvm-svn: 73381
* Move register allocation preference (or hint) from LiveInterval to ↵Evan Cheng2009-06-141-5/+21
| | | | | | MachineRegisterInfo. This allows more passes to set them. llvm-svn: 73346
* Update to in-place spilling framework. Includes live interval scaling and ↵Lang Hames2009-06-021-0/+23
| | | | | | trivial rewriter. llvm-svn: 72729
* Fix PR4034. Bug in LiveInterval::join when it's compacting new valno's.Evan Cheng2009-04-281-1/+1
| | | | llvm-svn: 70291
* Also delete last unused val#.Evan Cheng2009-04-271-0/+6
| | | | llvm-svn: 70212
* Reuse unused val#'s to avoid running out of memory in extreme cases.Evan Cheng2009-04-251-1/+5
| | | | llvm-svn: 70069
* Do not share a single unknown val# for all the live ranges merged into a ↵Evan Cheng2009-04-251-19/+13
| | | | | | physical sub-register live interval. When coalescer is merging in clobbered virtaul register live interval into a physical register live interval, give each virtual register val# a separate val# in the physical register live interval. Otherwise, the coalescer would have lost track of the definitions information it needs to make correct coalescing decisions. llvm-svn: 70026
* Add a new LiveInterval::overlaps(). It checks if the live interval overlaps ↵Evan Cheng2009-04-181-0/+16
| | | | | | a range specified by [Start, End). llvm-svn: 69434
* Implement support for using modeling implicit-zero-extension on x86-64Dan Gohman2009-04-081-16/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | with SUBREG_TO_REG, teach SimpleRegisterCoalescing to coalesce SUBREG_TO_REG instructions (which are similar to INSERT_SUBREG instructions), and teach the DAGCombiner to take advantage of this on targets which support it. This eliminates many redundant zero-extension operations on x86-64. This adds a new TargetLowering hook, isZExtFree. It's similar to isTruncateFree, except it only applies to actual definitions, and not no-op truncates which may not zero the high bits. Also, this adds a new optimization to SimplifyDemandedBits: transform operations like x+y into (zext (add (trunc x), (trunc y))) on targets where all the casts are no-ops. In contexts where the high part of the add is explicitly masked off, this allows the mask operation to be eliminated. Fix the DAGCombiner to avoid undoing these transformations to eliminate casts on targets where the casts are no-ops. Also, this adds a new two-address lowering heuristic. Since two-address lowering runs before coalescing, it helps to be able to look through copies when deciding whether commuting and/or three-address conversion are profitable. Also, fix a bug in LiveInterval::MergeInClobberRanges. It didn't handle the case that a clobber range extended both before and beyond an existing live range. In that case, multiple live ranges need to be added. This was exposed by the new subreg coalescing code. Remove 2008-05-06-SpillerBug.ll. It was bugpoint-reduced, and the spiller behavior it was looking for no longer occurrs with the new instruction selection. llvm-svn: 68576
* Two coalescer fixes in one.Evan Cheng2009-03-111-2/+41
| | | | | | | 1. Use the same value# to represent unknown values being merged into sub-registers. 2. When coalescer commute an instruction and the destination is a physical register, update its sub-registers by merging in the extended ranges. llvm-svn: 66610
* MergeValueInto is too smart: it might choose to do the merge the opposite ↵Owen Anderson2009-02-021-1/+3
| | | | | | | | | direction. Live interval reconstruction needs to account for this, and scour its maps to prevent dangling references. llvm-svn: 63558
* Exit with nice warnings when register allocator run out of registers.Evan Cheng2009-01-291-0/+10
| | | | llvm-svn: 63267
* Fix comment about removeRange.Evan Cheng2009-01-291-1/+1
| | | | llvm-svn: 63255
* Next round of earlyclobber handling. Approach theDale Johannesen2008-09-241-4/+0
| | | | | | | | | | RA problem by expanding the live interval of an earlyclobber def back one slot. Remove overlap-earlyclobber throughout. Remove earlyclobber bits and their handling from live internals. llvm-svn: 56539
* Remove AsmThatEarlyClobber etc. from LiveIntervalAnalysisDale Johannesen2008-09-191-0/+4
| | | | | | | and redo as linked list walk. Logic moved into RA. Per review feedback. llvm-svn: 56326
* Use empty() instead of begin() == end().Dan Gohman2008-08-141-1/+1
| | | | llvm-svn: 54780
* Instead of adding an isSS field to LiveInterval to denote stack slot. Use ↵Evan Cheng2008-06-231-2/+2
| | | | | | top bit of 'reg' instead. If the top bit is set, than the LiveInterval represents a stack slot live interval. llvm-svn: 52639
* Add a stack slot coloring pass. Not yet enabled.Evan Cheng2008-06-041-2/+18
| | | | llvm-svn: 51934
* Rename PrintableName to Name.Bill Wendling2008-02-261-1/+1
| | | | llvm-svn: 47629
* Change "Name" to "AsmName" in the target register info. Gee, a refactoring toolBill Wendling2008-02-261-1/+1
| | | | | | would have been a Godsend here! llvm-svn: 47625
* Update gcc 4.3 warnings fix patch with recent head changesAnton Korobeynikov2008-02-201-1/+2
| | | | llvm-svn: 47368
* - Removing the infamous r2rMap_ and rep() method. Now the coalescer will updateEvan Cheng2008-02-151-0/+21
| | | | | | | register defs and uses after each successful coalescing. - Also removed a number of hacks and fixed some subtle kill information bugs. llvm-svn: 47167
* - Added removeValNo() to remove all live ranges of a particular value#.Evan Cheng2008-02-131-7/+61
| | | | | | - removeRange() can now update value# information. llvm-svn: 47044
* Rename MRegisterInfo to TargetRegisterInfo.Dan Gohman2008-02-101-4/+5
| | | | llvm-svn: 46930
* Fixed a bug in MergeValueInAsValue() pointed out by David Greene. Replace ↵Evan Cheng2008-01-301-3/+3
| | | | | | val# with previous liverange's. llvm-svn: 46579
* remove dead #includeChris Lattner2008-01-141-1/+0
| | | | llvm-svn: 45971
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
| | | | llvm-svn: 45418
* Replace the odd kill# hack with something less fragile.Evan Cheng2007-11-291-1/+3
| | | | llvm-svn: 44434
* Kill info update bug.Evan Cheng2007-11-291-0/+3
| | | | llvm-svn: 44427
* Fix MergeValueInAsValue(). It allows overlapping live ranges but should replaceEvan Cheng2007-10-171-7/+57
| | | | | | their value numbers with the specified value number. llvm-svn: 43062
* When coalescing an EXTRACT_SUBREG and the dst register is a physical register,Evan Cheng2007-10-141-1/+1
| | | | | | | | the source register will be coalesced to the super register of the LHS. Properly merge in the live ranges of the resulting coalesced interval that were part of the original source interval to the live interval of the super-register. llvm-svn: 42961
* EXTRACT_SUBREG coalescing support. The coalescer now treats EXTRACT_SUBREG likeEvan Cheng2007-10-121-0/+37
| | | | | | | | | (almost) a register copy. However, it always coalesced to the register of the RHS (the super-register). All uses of the result of a EXTRACT_SUBREG are sub- register uses which adds subtle complications to load folding, spiller rewrite, etc. llvm-svn: 42899
* Constify to catch bugs.David Greene2007-09-061-2/+2
| | | | llvm-svn: 41751
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