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* Beginnings of MC-JIT code generation.Jim Grosbach2011-03-181-0/+26
| | | | | | | | | | | Proof-of-concept code that code-gens a module to an in-memory MachO object. This will be hooked up to a run-time dynamic linker library (see: llvm-rtdyld for similarly conceptual work for that part) which will take the compiled object and link it together with the rest of the system, providing back to the JIT a table of available symbols which will be used to respond to the getPointerTo*() queries. llvm-svn: 127916
* Some first rudimentary support for ARM EHABI: print exception table in "text ↵Anton Korobeynikov2011-03-051-0/+1
| | | | | | mode". llvm-svn: 127099
* Delete the GEPSplitter experiment.Dan Gohman2011-02-281-12/+0
| | | | llvm-svn: 126671
* Add support for the --noexecstack option.Rafael Espindola2011-01-231-1/+2
| | | | llvm-svn: 124077
* Add a possibility to switch between CFI directives- and table-based frame ↵Anton Korobeynikov2011-01-141-1/+2
| | | | | | description emission. Currently all the backends use table-based stuff. llvm-svn: 123476
* Pass a Banner argument to the machine code verifier both fromJakob Stoklund Olesen2010-12-181-1/+1
| | | | | | | | createMachineVerifierPass and MachineFunction::verify. The banner is printed before the machine code dump, just like the printer pass. llvm-svn: 122113
* MC: Make TargetAsmBackend available to the AsmStreamer.Daniel Dunbar2010-12-161-2/+5
| | | | | | - Treaty talks on the non-proliferation of MC objects broke down. llvm-svn: 121949
* Fixed version of 121434 with no new memory leaks.Rafael Espindola2010-12-101-22/+9
| | | | llvm-svn: 121471
* Revert my previous patch to make the valgrind bots happy.Rafael Espindola2010-12-101-9/+22
| | | | llvm-svn: 121461
* Initial support for the cfi directives. This is just enough to getRafael Espindola2010-12-091-22/+9
| | | | | | | | | | | f: .cfi_startproc nop .cfi_endproc assembled (on ELF). llvm-svn: 121434
* Change some methods in MCDwarf.cpp to be able to handle an arbitraryRafael Espindola2010-11-191-5/+23
| | | | | | | | | | | | MCStreamer instead of just MCObjectStreamer. Address changes cannot be as efficient as we have to use DW_LNE_set_addres, but at least most of the logic is shared. This will be used so that, with CodeGen still using EmitDwarfLocDirective, llvm-gcc is able to produce debug_line sections without needing an assembler that supports .loc. llvm-svn: 119777
* Oops, missed this file when remaing ExpandPseudos to ExpandISelPseudos.Dan Gohman2010-11-181-2/+2
| | | | llvm-svn: 119717
* Remove ARM isel hacks that fold large immediates into a pair of add, sub, and,Evan Cheng2010-11-171-1/+3
| | | | | | | | | | | | | | | | | | | | | and xor. The 32-bit move immediates can be hoisted out of loops by machine LICM but the isel hacks were preventing them. Instead, let peephole optimization pass recognize registers that are defined by immediates and the ARM target hook will fold the immediates in. Other changes include 1) do not fold and / xor into cmp to isel TST / TEQ instructions if there are multiple uses. This happens when the 'and' is live out, machine sink would have sinked the computation and that ends up pessimizing code. The peephole pass would recognize situations where the 'and' can be toggled to define CPSR and eliminate the comparison anyway. 2) Move peephole pass to after machine LICM, sink, and CSE to avoid blocking important optimizations. rdar://8663787, rdar://8241368 llvm-svn: 119548
* Split pseudo-instruction expansion into a separate pass, to make itDan Gohman2010-11-161-0/+3
| | | | | | | easier to debug, and to avoid complications when the CFG changes in the middle of the instruction selection process. llvm-svn: 119382
* Add registry hook for assembly text outputChe-Liang Chiou2010-11-081-4/+5
| | | | llvm-svn: 118394
* Add TypeBasedAliasAnalysis to the standard pass lists. Note that itDan Gohman2010-10-181-2/+2
| | | | | | is currently inert by default. llvm-svn: 116732
* Make BasicAliasAnalysis a normal AliasAnalysis implementation whichDan Gohman2010-10-181-0/+4
| | | | | | | | | | | | does normal initialization and normal chaining. Change the default AliasAnalysis implementation to NoAlias. Update StandardCompileOpts.h and friends to explicitly request BasicAliasAnalysis. Update tests to explicitly request -basicaa. llvm-svn: 116720
* Call InitSections in llc and clang so that the binaries produced by themRafael Espindola2010-10-081-0/+1
| | | | | | are easier to diff with those produced by llvm-mc. llvm-svn: 116095
* Stop using the dom frontier in DwarfEHPrepare by not promoting alloca'sDuncan Sands2010-08-311-1/+1
| | | | | | | | any more. I plan to reimplement alloca promotion using SSAUpdater later. It looks like Bill's URoR logic really always needs domtree, so the pass now always asks for domtree info. llvm-svn: 112597
* Move enabling the local stack allocation pass into the target where it belongs.Jim Grosbach2010-08-241-15/+3
| | | | | | | For now it's still a command line option, but the interface to the generic code doesn't need to know that. llvm-svn: 111942
* Add a local stack object block allocation pass. This is still anJim Grosbach2010-08-141-0/+16
| | | | | | | | | | | | | | | | | | experimental pass that allocates locals relative to one another before register allocation and then assigns them to actual stack slots as a block later in PEI. This will eventually allow targets with limited index offset range to allocate additional base registers (not just FP and SP) to more efficiently reference locals, as well as handle situations where locals cannot be referenced via SP or FP at all (dynamic stack realignment together with variable sized objects, for example). It's currently incomplete and almost certainly buggy. Work in progress. Disabled by default and gated via the -enable-local-stack-alloc command line option. rdar://8277890 llvm-svn: 111059
* tidy up whitespace a bitJim Grosbach2010-08-131-7/+6
| | | | llvm-svn: 111019
* Merge the OptimizeExts and OptimizeCmps passes into one PeepholeOptimizerBill Wendling2010-08-091-2/+1
| | | | | | | pass. This pass should expand with all of the small, fine-grained optimization passes to reduce compile time and increase happiment. llvm-svn: 110627
* Add the Optimize Compares pass (disabled by default).Bill Wendling2010-08-061-0/+1
| | | | | | | | | | | | | | | | This pass tries to remove comparison instructions when possible. For instance, if you have this code: sub r1, 1 cmp r1, 0 bz L1 and "sub" either sets the same flag as the "cmp" instruction or could be converted to set the same flag, then we can eliminate the "cmp" instruction all together. This is a important for ARM where the ALU instructions could set the CPSR flag, but need a special suffix ('s') to do so. llvm-svn: 110423
* Remove double-def checking from MachineVerifier, so a register does not have toJakob Stoklund Olesen2010-08-051-13/+7
| | | | | | | | | | be killed before being redefined. These checks are usually disabled, and usually fail when enabled. We de facto allow live registers to be redefined without a kill, the corresponding assertions in RegScavenger were removed long ago. llvm-svn: 110362
* The lower invoke pass needs to have unreachable code elimination run after itBill Wendling2010-08-041-2/+4
| | | | | | because it could create such things. This fixes a MingW buildbot test failure. llvm-svn: 110279
* The EH prepare passes really want to be the last passes run before code-gen.Bill Wendling2010-08-041-5/+5
| | | | llvm-svn: 110248
* Plug the remaining MC leaks by giving MCObjectStreamer/MCAsmStreamer ↵Benjamin Kramer2010-07-291-4/+0
| | | | | | ownership of the TargetAsmBackend and the MCCodeEmitter. llvm-svn: 109767
* Add hook to insert late LLVM=>LLVM passes just before iselAnton Korobeynikov2010-07-241-0/+2
| | | | llvm-svn: 109354
* Initial modifications to MCAssembler and TargetMachine for the MCJIT.Reid Kleckner2010-07-221-0/+18
| | | | | | Patch by Olivier Meurant! llvm-svn: 109080
* Reapply bottom-up fast-isel, with several fixes for x86-32:Dan Gohman2010-07-101-12/+8
| | | | | | | | | - Check getBytesToPopOnReturn(). - Eschew ST0 and ST1 for return values. - Fix the PIC base register initialization so that it doesn't ever fail to end up the top of the entry block. llvm-svn: 108039
* --- Reverse-merging r107947 into '.':Bob Wilson2010-07-091-8/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | U utils/TableGen/FastISelEmitter.cpp --- Reverse-merging r107943 into '.': U test/CodeGen/X86/fast-isel.ll U test/CodeGen/X86/fast-isel-loads.ll U include/llvm/Target/TargetLowering.h U include/llvm/Support/PassNameParser.h U include/llvm/CodeGen/FunctionLoweringInfo.h U include/llvm/CodeGen/CallingConvLower.h U include/llvm/CodeGen/FastISel.h U include/llvm/CodeGen/SelectionDAGISel.h U lib/CodeGen/LLVMTargetMachine.cpp U lib/CodeGen/CallingConvLower.cpp U lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp U lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp U lib/CodeGen/SelectionDAG/FastISel.cpp U lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp U lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp U lib/CodeGen/SelectionDAG/InstrEmitter.cpp U lib/CodeGen/SelectionDAG/TargetLowering.cpp U lib/Target/XCore/XCoreISelLowering.cpp U lib/Target/XCore/XCoreISelLowering.h U lib/Target/X86/X86ISelLowering.cpp U lib/Target/X86/X86FastISel.cpp U lib/Target/X86/X86ISelLowering.h llvm-svn: 107987
* Re-apply bottom-up fast-isel, with fixes. Be very careful to avoid emittingDan Gohman2010-07-091-12/+8
| | | | | | a DBG_VALUE after a terminator, or emitting any instructions before an EH_LABEL. llvm-svn: 107943
* Revert 107840 107839 107813 107804 107800 107797 107791.Dan Gohman2010-07-081-8/+12
| | | | | | Debug info intrinsics win for now. llvm-svn: 107850
* Implement bottom-up fast-isel. This has the advantage of not requiringDan Gohman2010-07-071-12/+8
| | | | | | a separate DCE pass over MachineInstrs. llvm-svn: 107804
* Temporarily disable on-demand fast-isel.Dan Gohman2010-07-011-8/+12
| | | | llvm-svn: 107393
* Fast isel no longer needs DeadMachineInstrElim to clean up after it.Dan Gohman2010-07-011-12/+8
| | | | llvm-svn: 107381
* Add some comments.Dan Gohman2010-06-241-0/+7
| | | | llvm-svn: 106809
* Add a -regalloc=default option that chooses a register allocator based on the -OJakob Stoklund Olesen2010-05-271-1/+1
| | | | | | | | | optimization level. This only really affects llc for now because both the llvm-gcc and clang front ends override the default register allocator. I intend to remove that code later. llvm-svn: 104904
* MC: Add TargetMachine support for setting the value of MCRelaxAll withDaniel Dunbar2010-05-261-2/+4
| | | | | | -filetype=obj. llvm-svn: 104747
* MC: Add an MCLoggingStreamer, for use in debugging integrated-as mismatches.Daniel Dunbar2010-05-231-1/+6
| | | | llvm-svn: 104463
* llc (et al): Add support for --show-encoding and --show-inst.Daniel Dunbar2010-05-181-1/+13
| | | | llvm-svn: 104029
* XFAIL the test I added with vg_leak, apparently it is the first and only llcDaniel Dunbar2010-05-141-0/+2
| | | | | | | -filetype=obj test, and -filetype=obj leaks a few objects. Added a FIXME, we need to sort out the ownership model for the various MC objects. llvm-svn: 103769
* Code that needs a TargetMachine should have access to one directly, ratherDan Gohman2010-04-191-2/+2
| | | | | | than just getting one through a TargetLowering. llvm-svn: 101802
* Fix codegen passes. -disable-ssc shouldn't disable postra machine licm.Evan Cheng2010-04-171-5/+11
| | | | llvm-svn: 101622
* Enable post regalloc machine licm by default.Evan Cheng2010-04-121-5/+1
| | | | llvm-svn: 101023
* Remove late ARM codegen optimization pass committed by accident.Anton Korobeynikov2010-04-071-2/+0
| | | | | | It is not ready for public yet. llvm-svn: 100673
* Add hook to insert late LLVM=>LLVM passes just before iselAnton Korobeynikov2010-04-071-0/+2
| | | | llvm-svn: 100640
* Post regalloc LICM. Work in progress.Evan Cheng2010-04-071-0/+7
| | | | llvm-svn: 100592
* Momentous day: remove the "O" member from AsmPrinter. Now all Chris Lattner2010-04-041-16/+1
| | | | | | | | | | "asm printering" happens through MCStreamer. This also Streamerizes PIC16 debug info, which escaped my attention. This removes a leak from LLVMTargetMachine of the 'legacy' output stream. llvm-svn: 100327
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