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* Revert my if-conversion cleanup since it caused a bunch of nightly testBob Wilson2010-06-261-37/+33
| | | | | | | | | | regressions. --- Reverse-merging r106939 into '.': U test/CodeGen/Thumb2/thumb2-ifcvt3.ll U lib/CodeGen/IfConversion.cpp llvm-svn: 106951
* Clean up some problems with extra CFG edges being introduced duringBob Wilson2010-06-261-33/+37
| | | | | | | | | | | | | | | if-conversion. The RemoveExtraEdges function doesn't work for blocks that end with unanalyzable branches, so in those cases, the "extra" edges must be explicitly removed. The CopyAndPredicateBlock and MergeBlocks methods can also avoid copying successor edges due to branches that have already been removed. The latter case is especially helpful when MergeBlocks is called for handling "diamond" if-conversions, where otherwise you can end up with some weird intermediate states in the CFG. Unfortunately I've been unable to find cases where this cleanup actually makes a significant difference in the code. There is one test where we manage to remove an empty block at the end of a function. Radar 6911268. llvm-svn: 106939
* make sure to handle dbg_value instructions in the middle of the block, notJim Grosbach2010-06-251-2/+10
| | | | | | just at the head, when doing diamond if-conversion. rdar://7797940 llvm-svn: 106907
* Change if-conversion block size limit checks to add some flexibility.Evan Cheng2010-06-251-12/+18
| | | | llvm-svn: 106901
* 80 column and typo fixJim Grosbach2010-06-251-2/+2
| | | | llvm-svn: 106894
* Use pre-increment instead of post-increment when the result is not used.Dan Gohman2010-06-221-9/+9
| | | | llvm-svn: 106542
* Tidy.Bob Wilson2010-06-191-5/+5
| | | | llvm-svn: 106383
* Allow ARM if-converter to be run after post allocation scheduling.Evan Cheng2010-06-181-0/+7
| | | | | | | | | | | | | | | | - This fixed a number of bugs in if-converter, tail merging, and post-allocation scheduler. If-converter now runs branch folding / tail merging first to maximize if-conversion opportunities. - Also changed the t2IT instruction slightly. It now defines the ITSTATE register which is read by instructions in the IT block. - Added Thumb2 specific hazard recognizer to ensure the scheduler doesn't change the instruction ordering in the IT block (since IT mask has been finalized). It also ensures no other instructions can be scheduled between instructions in the IT block. This is not yet enabled. llvm-svn: 106344
* Fix an inverted condition.Evan Cheng2010-06-181-1/+1
| | | | llvm-svn: 106330
* Teach iff-converter to properly count # of dups. It was not skipping over ↵Evan Cheng2010-06-181-1/+27
| | | | | | dbg_value's which resulted in non-duplicated instructions being deleted. rdar://8104384. llvm-svn: 106323
* Fix PR7372: Conditional branches (at least on ARM) are treated as predicated,Bob Wilson2010-06-181-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | so when IfConverter::CopyAndPredicateBlock checks to see if it should ignore an instruction because it is a branch, it should not check if the branch is predicated. This case (when IgnoreBr is true) is only relevant from IfConvertTriangle, where new branches are inserted after the block has been copied and predicated. If the original branch is not removed, we end up with multiple conditional branches (possibly conflicting) at the end of the block. Aside from any immediate errors resulting from that, this confuses the AnalyzeBranch functions so that the branches are not analyzable. That in turn causes the IfConverter to think that the "Simple" pattern can be applied, and things go downhill fast because the "Simple" pattern does _not_ apply if the block can fall through. This is pretty fragile. If there are other degenerate cases where AnalyzeBranch fails, but where the block may still fall through, the IfConverter should not perform its "Simple" if-conversion. But, I don't know how to do that with the current AnalyzeBranch interface, so for now, the best thing seems to be to avoid creating branches that AnalyzeBranch cannot handle. Evan, please review! llvm-svn: 106291
* Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). ThisStuart Hastings2010-06-171-3/+6
| | | | | | | | | | | | addresses a longstanding deficiency noted in many FIXMEs scattered across all the targets. This effectively moves the problem up one level, replacing eleven FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path through FastISel where we actually supply a DebugLoc, fixing Radar 7421831. llvm-svn: 106243
* Make post-ra scheduling, anti-dep breaking, and register scavenger ↵Evan Cheng2010-06-161-13/+115
| | | | | | (conservatively) aware of predicated instructions. This enables ARM to move if-conversion before post-ra scheduler. llvm-svn: 106091
* Fix 80col violations, remove trailing whitespace, and clarify a comment.Bob Wilson2010-06-151-14/+15
| | | | llvm-svn: 106057
* IfConversion's AnalyzeBlocks method always returns false; clean it up.Bob Wilson2010-06-151-9/+5
| | | | llvm-svn: 106027
* Fix a comment typo.Bob Wilson2010-06-151-1/+1
| | | | llvm-svn: 106015
* More dbg_value cleanup so the presence of debug info doesn't affect code-gen.Jim Grosbach2010-06-141-2/+21
| | | | | | | Make sure to skip the dbg_value instructions when moving dups out of the diamond. rdar://7797940 llvm-svn: 105965
* Cleanup. Process the dbg_values separatelyJim Grosbach2010-06-071-18/+16
| | | | llvm-svn: 105554
* Move exit check where it really belongs.Jim Grosbach2010-06-071-4/+4
| | | | llvm-svn: 105541
* Make if-conversion ignore dbg_value instructions in its analysis. rdar://7797940Jim Grosbach2010-06-041-4/+23
| | | | llvm-svn: 105498
* Change errs() to dbgs().David Greene2010-01-041-14/+14
| | | | llvm-svn: 92520
* Allow target to disable if-converting predicable instructions. e.g. NEON ↵Evan Cheng2009-11-211-1/+1
| | | | | | instructions under ARM mode. llvm-svn: 89541
* Revert r85346 change to control tail merging by CodeGenOpt::Level.Bob Wilson2009-10-281-7/+6
| | | | | | I'm going to redo this using the OptimizeForSize function attribute. llvm-svn: 85426
* Record CodeGen optimization level in the BranchFolding pass so that we canBob Wilson2009-10-271-6/+7
| | | | | | | | | | | | | | | | use it to control tail merging when there is a tradeoff between performance and code size. When there is only 1 instruction in the common tail, we have been merging. That can be good for code size but is a definite loss for performance. Now we will avoid tail merging in that case when the optimization level is "Aggressive", i.e., "-O3". Radar 7338114. Since the IfConversion pass invokes BranchFolding, it too needs to know the optimization level. Note that I removed the RegisterPass instantiation for IfConversion because it required a default constructor. If someone wants to keep that for some reason, we can add a default constructor with a hard-wired optimization level. llvm-svn: 85346
* Remove VISIBILITY_HIDDEN from class/struct found inside anonymous namespaces.Nick Lewycky2009-10-251-1/+1
| | | | | | | Chris claims we should never have visibility_hidden inside any .cpp file but that's still not true even after this commit. llvm-svn: 85042
* Run branch folding if if-converter make some transformations.Evan Cheng2009-09-041-0/+8
| | | | llvm-svn: 80994
* remove various std::ostream version of printing methods fromChris Lattner2009-08-231-2/+2
| | | | | | | | MachineInstr and MachineOperand. This required eliminating a bunch of stuff that was using DOUT, I hope that bill doesn't mind me stealing his fun. ;-) llvm-svn: 79813
* Convert DOUT to DEBUG(errs()...).Bill Wendling2009-08-221-20/+20
| | | | llvm-svn: 79751
* More migration to raw_ostream, the water has dried up around the iostream hole.Daniel Dunbar2009-07-251-2/+2
| | | | | | | | | | - Some clients which used DOUT have moved to DEBUG. We are deprecating the "magic" DOUT behavior which avoided calling printing functions when the statement was disabled. In addition to being unnecessary magic, it had the downside of leaving code in -Asserts builds, and of hiding potentially unnecessary computations. llvm-svn: 77019
* llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.Torok Edwin2009-07-141-2/+2
| | | | | | | | | This adds location info for all llvm_unreachable calls (which is a macro now) in !NDEBUG builds. In NDEBUG builds location info and the message is off (it only prints "UREACHABLE executed"). llvm-svn: 75640
* Fix assert(0) conversion, as suggested by Chris.Torok Edwin2009-07-121-8/+8
| | | | llvm-svn: 75423
* Convert more assert(0)+abort() -> LLVM_UNREACHABLE,Torok Edwin2009-07-111-4/+10
| | | | | | and abort()/exit() -> llvm_report_error(). llvm-svn: 75363
* Fewer static variables, part 3 of many.Owen Anderson2009-06-241-2/+2
| | | | llvm-svn: 74140
* ifcvt should ignore cfg where true and false successors are the same.Evan Cheng2009-06-151-1/+12
| | | | llvm-svn: 73423
* Revert r71744. I must not have understood this correctly, because theBob Wilson2009-05-141-4/+9
| | | | | | assertion is failing for some tests. llvm-svn: 71779
* The IfConverter::MergeBlocks method appears to be used only to merge a basicBob Wilson2009-05-131-9/+4
| | | | | | | | block with its unique predecessor. Change the code to assert if that is not the case, instead of trying to handle situations where the block has multiple predecessors. llvm-svn: 71744
* Revert a portion of Dan's change r71018 that I'm convinced is wrong.Bob Wilson2009-05-131-1/+1
| | | | | | | | | | | | | | | | | | | Dan was trying to catch the case where a basic block ends with a conditional branch to the fall-through block. In this case, all the instructions have been moved out of FromBBI, leaving it empty. It cannot end with a conditional branch. As the existing comment indicates, it will always fall through to the next block. If the block already had the next block (NBB) listed as a successor, the preceding loop has a check for that and does not remove it. Thus, we need to check and add the successor only when it is not already listed. With Dan's change, the empty block often ends up with the fall-through successor listed twice. This exposed the problem in pr4195, where CodePlacementOpt did not handle the same predecessor listed more than once. It is also at least partially responsible for pr4202 and probably a similar issue with Thumb branches being out of range. llvm-svn: 71742
* Merge adjacent conditional.Bob Wilson2009-05-131-2/+0
| | | | llvm-svn: 71741
* Remove an unused variable.Bob Wilson2009-05-131-3/+0
| | | | llvm-svn: 71740
* Fix some typos and spelling and grammar, mostly in comments, but also oneBob Wilson2009-05-131-21/+20
| | | | | | field name. No functional changes. llvm-svn: 71739
* If a MachineBasicBlock has multiple ways of reaching another block,Dan Gohman2009-05-051-5/+3
| | | | | | | | allow it to have multiple CFG edges to that block. This is needed to allow MachineBasicBlock::isOnlyReachableByFallthrough to work correctly. This fixes PR4126. llvm-svn: 71018
* Fix typo. Patch by nlewycky.Duncan Sands2008-11-041-1/+1
| | | | llvm-svn: 58709
* fix leakage of IfcvtTokensNuno Lopes2008-11-041-1/+5
| | | | llvm-svn: 58690
* Optimized FCMP_OEQ and FCMP_UNE for x86.Dan Gohman2008-10-211-15/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Where previously LLVM might emit code like this: ucomisd %xmm1, %xmm0 setne %al setp %cl orb %al, %cl jne .LBB4_2 it now emits this: ucomisd %xmm1, %xmm0 jne .LBB4_2 jp .LBB4_2 It has fewer instructions and uses fewer registers, but it does have more branches. And in the case that this code is followed by a non-fallthrough edge, it may be followed by a jmp instruction, resulting in three branch instructions in sequence. Some effort is made to avoid this situation. To achieve this, X86ISelLowering.cpp now recognizes FCMP_OEQ and FCMP_UNE in lowered form, and replace them with code that emits two branches, except in the case where it would require converting a fall-through edge to an explicit branch. Also, X86InstrInfo.cpp's branch analysis and transform code now knows now to handle blocks with multiple conditional branches. It uses loops instead of having fixed checks for up to two instructions. It can now analyze and transform code generated from FCMP_OEQ and FCMP_UNE. llvm-svn: 57873
* Tidy up several unbeseeming casts from pointer to intptr_t.Dan Gohman2008-09-041-1/+1
| | | | llvm-svn: 55779
* Fix SmallVector's size calculation so that a size of 0 isDan Gohman2008-08-221-1/+1
| | | | | | | handled correctly, and change a few SmallVector uses to use size 0 to more clearly reflect their intent. llvm-svn: 55181
* Convert uses of std::vector in TargetInstrInfo to SmallVector. This change ↵Owen Anderson2008-08-141-19/+20
| | | | | | had to be propoagated down into all the targets and up into all clients of this API. llvm-svn: 54802
* Pool-allocation for MachineInstrs, MachineBasicBlocks, andDan Gohman2008-07-071-1/+3
| | | | | | | | | | | MachineMemOperands. The pools are owned by MachineFunctions. This drastically reduces the number of calls to malloc/free made during the "Emit" phase of scheduling, as well as later phases in CodeGen. Combined with other changes, this speeds up the "instruction selection" phase of CodeGen by 10% in some cases. llvm-svn: 53212
* Register if-converter pass for -debug-pass.Evan Cheng2008-06-041-1/+4
| | | | llvm-svn: 51931
* Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to ↵Evan Cheng2008-02-281-1/+1
| | | | | | 16-byte boundaries. llvm-svn: 47703
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