summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen/GlobalISel
Commit message (Collapse)AuthorAgeFilesLines
* Fix -Wunused-variable in non-asserts build.Eric Liu2016-04-221-0/+1
| | | | llvm-svn: 267128
* Fix more -Wunused-variable in non-asserts build.David Blaikie2016-04-211-3/+2
| | | | llvm-svn: 267077
* Fix some -Wunused-variable warnings in non-asserts builds.David Blaikie2016-04-211-5/+6
| | | | llvm-svn: 267073
* [RegisterBankInfo] Change the API for the verify methods.Quentin Colombet2016-04-213-10/+15
| | | | | | | Return bool instead of void so that it is natural to put the calls into asserts. llvm-svn: 267033
* [RegisterBankInfo] Change the representation of the partial mappings.Quentin Colombet2016-04-212-33/+26
| | | | | | | | | Instead of holding a mask, hold two value: the start index and the length of the mapping. This is a more compact representation, although less powerful. That being said, arbitrary masks would not have worked for the generic so do not allow them in the first place. llvm-svn: 267025
* [GlobalISel] Coding style and whitespace fixesTom Stellard2016-04-141-2/+2
| | | | | | | | | | Reviewers: qcolombet Subscribers: joker.eph, llvm-commits, vkalintiris Differential Revision: http://reviews.llvm.org/D19119 llvm-svn: 266342
* [RegBankSelect] Teach the repairing code how to handle physicalQuentin Colombet2016-04-121-2/+6
| | | | | | registers. llvm-svn: 266029
* [RegisterBankInfo] Do not provide a default mapping for non-reg of phiQuentin Colombet2016-04-121-0/+7
| | | | | | operations. llvm-svn: 266027
* [RegBankSelect] Teach how to repair definitions.Quentin Colombet2016-04-121-13/+112
| | | | | | | | | Although repairing definitions is not mandatory for correctness (only phis would be impacted because of the RPO traversal), not repairing might go against the cost model. Therefore, just repair when it is possible. llvm-svn: 266025
* [RegBankSelect] Use reverse post order traversal.Quentin Colombet2016-04-081-2/+12
| | | | | | | | When assigning the register banks of an instruction, it is best to know all the constraints of the input to have a good idea of how this will impact the cost of the whole function. llvm-svn: 265812
* [RegisterBankInfo] Change the implementation for the default mapping.Quentin Colombet2016-04-081-1/+14
| | | | | | | | | | Do not give that much importance to the current register bank of an operand. This is likely just a side effect of the current execution and it is properly wise to prefer a register bank that can be extracted from the information available statically (like encoding constraints and type). llvm-svn: 265810
* [RegBankSelect] Improve debug output.Quentin Colombet2016-04-081-1/+10
| | | | | | | | Add verbose information when checking if the current and the desired register banks match. Detail what happens when we assign a register bank. llvm-svn: 265804
* [RegisterBankInfo] Make the debug output more compact.Quentin Colombet2016-04-081-1/+1
| | | | | | | Print the mask of the partial mapping as an hexadecimal instead of a binary value. llvm-svn: 265754
* [RegBankSelect] Add a few debug statements.Quentin Colombet2016-04-071-0/+9
| | | | llvm-svn: 265749
* [RegisterBankInfo] Add print and dump method to the InstructionMappingQuentin Colombet2016-04-071-0/+16
| | | | | | helper class. llvm-svn: 265747
* [RegisterBankInfo] Add print and dump method to the ValueMapping helperQuentin Colombet2016-04-071-0/+16
| | | | | | class. llvm-svn: 265746
* [RegisterBankInfo] Strengthen getInstrMappingImpl.Quentin Colombet2016-04-071-14/+21
| | | | | | | Teach the target independent code how to take advantage of type information to get the mapping of an instruction. llvm-svn: 265739
* [RegisterBankInfo] Add a way to record what register bank covers aQuentin Colombet2016-04-071-1/+10
| | | | | | | | | | | | specific type. This will be used to find the default mapping of the instruction. Also, this information is recorded, instead of computed, because it is expensive from a type to know which register bank maps it. Indeed, we need to iterate through all the register classes of all the register banks to find the one that maps the given type. llvm-svn: 265736
* [RegisterBankInfo] Introduce getRegBankFromConstraints as an helperQuentin Colombet2016-04-071-20/+34
| | | | | | | | | | | method. NFC. The refactoring intends to make the code more readable and expose more features to potential derived classes. llvm-svn: 265735
* [RegisterBankInfo] Refactor the code to use BitMaskClassIterator.Quentin Colombet2016-04-071-55/+24
| | | | llvm-svn: 265733
* [RegBankSelect] Reuse RegisterBankInfo logic to get to the register bankQuentin Colombet2016-04-071-12/+2
| | | | | | | | | from a register. On top of duplicating the logic, it was buggy! It would assert on physical registers, since MachineRegisterInfo does not have any information regarding register classes/banks for them. llvm-svn: 265727
* [RegBankSelect] Initial implementation for non-optimized output.Quentin Colombet2016-04-071-3/+105
| | | | | | | | The pass walk through the machine function and assign the register banks using the default mapping. In other words, there is no attempt to reduce cross register copies. llvm-svn: 265707
* [RegisterBankInfo] Provide a target independent helper function to guessQuentin Colombet2016-04-071-41/+108
| | | | | | | | | | | | | the mapping of an instruction on register bank. For most instructions, it is possible to guess the mapping of the instruciton by using the encoding constraints. It remains instructions without encoding constraints. For copy-like instructions, we try to propagate the information we get from the other operands. Otherwise, the target has to give this information. llvm-svn: 265703
* [RegisterBankInfo] Change the signature of getSizeInBits to factor outQuentin Colombet2016-04-071-14/+23
| | | | | | the access to MRI and TRI. llvm-svn: 265701
* [RegisterBankInfo] Provide a default constructor for InstructionMappingQuentin Colombet2016-04-071-0/+1
| | | | | | | | | helper class. The default constructor creates invalid (isValid() == false) instances and may be used to communicate that a mapping was not found. llvm-svn: 265699
* [RegisterBank] Rename RegisterBank::contains into RegisterBank::covers.Quentin Colombet2016-04-072-7/+7
| | | | llvm-svn: 265695
* [RegisterBankInfo] Implement a target independent version ofQuentin Colombet2016-04-071-1/+40
| | | | | | | | | | | getInstrMapping. This implementation requires that the target implemented getRegBankFromRegClass. Indeed, the implementation uses the register classes for the encoding constraints for the instructions to deduce the mapping of a value. llvm-svn: 265624
* [RegisterBankInfo] Add an helper function to get the size of a register.Quentin Colombet2016-04-061-8/+34
| | | | | | | The previous method to get the size was too simple and could fail for physical registers. llvm-svn: 265620
* [RegisterBankInfo] Add methods to get the possible mapping of an instruction ↵Quentin Colombet2016-04-061-0/+33
| | | | | | | | | | | | | | | | | | | | | | | on a register bank. This will be used by the register bank select pass to assign register banks for generic virtual registers. This was originally committed as r265573 but broke at least one windows bot. The problem with the windows bot was that it was using a copy constructor for the InstructionMappings class and could not synthesize it. Actually, the fact that this class is not copy constructable is expected and the compiler should use the move assignment constructor. Marking the problematic assignment explicitly as using the move constructor has its own problems. Indeed, with recent clang we get a warning that we may prevent the elision of the copy by the compiler. A proper fix for both compilers would be to change the API of getPossibleInstrMapping to take a InstructionMappings as input/output parameter. This does not feel natural and since GISel is not used on windows yet, I chose to workaround the problem by not compiling the problematic code on windows. llvm-svn: 265604
* Revert "[RegisterBankInfo] Add methods to get the possible mapping of anQuentin Colombet2016-04-061-46/+8
| | | | | | | | | | | instruction on a register bank. This will be used by the register bank select pass to assign register banks for generic virtual registers." and the follow-on commits while I find out a way to fix the win7 bot: http://lab.llvm.org:8011/builders/sanitizer-windows/builds/19882 This reverts commit r265578, r265581, r265584, and r265585. llvm-svn: 265587
* [RegisterBankInfo] Provide a default constructor for InstructionMappingQuentin Colombet2016-04-061-0/+1
| | | | | | | | | helper class. The default constructor creates invalid (isValid() == false) instances and may be used to communicate that a mapping was not found. llvm-svn: 265581
* [RegisterBankInfo] Add an helper function to get the size of a register.Quentin Colombet2016-04-061-8/+34
| | | | | | | The previous method to get the size was too simple and could fail for physical registers. llvm-svn: 265578
* [RegisterBankInfo] Add methods to get the possible mapping of an instruction ↵Quentin Colombet2016-04-061-0/+11
| | | | | | | | | on a register bank. This will be used by the register bank select pass to assign register banks for generic virtual registers. llvm-svn: 265573
* [RegisterBankInfo] Implement the verify method of the InstructionMapping ↵Quentin Colombet2016-04-061-0/+25
| | | | | | | | helper class. This checks that all the register operands get a proper mapping. llvm-svn: 265563
* [RegisterBankInfo] Implement the verify method for the ValueMapping helper ↵Quentin Colombet2016-04-061-4/+16
| | | | | | | | | class. The method checks that the value is fully defined accross the different partial mappings and that the partial mappings are compatible between each other. llvm-svn: 265556
* [RegisterBankInfo] Add a verify method for the PartialMapping helper class.Quentin Colombet2016-04-061-0/+19
| | | | | | | This verifies that the PartialMapping can be accomadated into the related register bank. llvm-svn: 265555
* [RegisterBankInfo] Add a couple of helper classes for the future cost model.Quentin Colombet2016-04-061-0/+31
| | | | llvm-svn: 265553
* [RegisterBankInfo] Inline the destructor to avoid link-time error when ↵Quentin Colombet2016-04-061-2/+0
| | | | | | GlobalISel is not built. llvm-svn: 265548
* [RegisterBankInfo] Simplify the API for build a register bank.Quentin Colombet2016-04-051-5/+4
| | | | | | | | | As part of the TRI argument of addRegBankCoverage we already have access to the TargetRegisterClass through the ID of that register class. Therefore, there is no point in needing a TargetRegisterClass instance, the ID is enough to get to it. llvm-svn: 265487
* [RegisterBank] Implement the verify method to check for the obvious mistakes.Quentin Colombet2016-04-051-4/+27
| | | | llvm-svn: 265479
* [RegisterBankInfo] Add debug print to check how the initialization is going.Quentin Colombet2016-04-051-0/+11
| | | | llvm-svn: 265475
* [RegisterBank] Add printable capabilities for future debugging.Quentin Colombet2016-04-051-0/+34
| | | | llvm-svn: 265473
* [RegisterBankInfo] Make addRegBankCoverage more capable to easeQuentin Colombet2016-04-051-4/+67
| | | | | | | | targeting jobs. Now, addRegBankCoverage also adds the subreg-classes not just the sub-classes of the given register class. llvm-svn: 265469
* [RegisterBankInfo] Implement the methods to create register banks.Quentin Colombet2016-04-051-4/+77
| | | | llvm-svn: 265464
* [RegisterBank] Provide a way to check if a register bank is valid.Quentin Colombet2016-04-051-1/+12
| | | | | | | | Change the default constructor to create invalid object. The target will have to properly initialize the register banks before using them. llvm-svn: 265460
* [GlobalISel] Add the RegisterBankInfo class for the handling of register banks.Quentin Colombet2016-04-052-0/+29
| | | | llvm-svn: 265449
* [GlobalISel] Add a class, RegisterBank, to represent register banks.Quentin Colombet2016-04-052-0/+40
| | | | llvm-svn: 265445
* [GlobalISel] Add the skeleton of the RegBankSelect pass.Quentin Colombet2016-04-053-0/+34
| | | | | | | This pass is reponsible for assigning the generic virtual registers to register banks. llvm-svn: 265440
* [IRTranslator] Translate unconditional branches.Quentin Colombet2016-03-112-0/+26
| | | | llvm-svn: 263265
* [MachineIRBuilder] Rework buildInstr API to maximize code reuse.Quentin Colombet2016-03-111-22/+24
| | | | llvm-svn: 263264
OpenPOWER on IntegriCloud