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* Revert r315863: [globalisel][tablegen] Import ComplexPattern when used as an ↵Daniel Sanders2017-10-151-1/+1
| | | | | | | | operator A large number of bots are failing on an ambiguous constructor call. llvm-svn: 315866
* [globalisel][tablegen] Import ComplexPattern when used as an operatorDaniel Sanders2017-10-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | Summary: It's possible for a ComplexPattern to be used as an operator in a match pattern. This is used by the load/store patterns in AArch64 to name the suboperands returned by ComplexPattern predicate so that they can be broken apart and referenced independently in the result pattern. This patch adds support for this in order to enable the import of load/store patterns. Depends on D37445 Reviewers: ab, qcolombet, t.p.northover, rovka, aditya_nandakumar Reviewed By: qcolombet Subscribers: aemerson, javed.absar, igorb, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D37456 llvm-svn: 315863
* Reverting r315590; it did not include changes for llvm-tblgen, which is ↵Aaron Ballman2017-10-153-6/+6
| | | | | | | | causing link errors for several people. Error LNK2019 unresolved external symbol "public: void __cdecl `anonymous namespace'::MatchableInfo::dump(void)const " (?dump@MatchableInfo@?A0xf4f1c304@@QEBAXXZ) referenced in function "public: void __cdecl `anonymous namespace'::AsmMatcherEmitter::run(class llvm::raw_ostream &)" (?run@AsmMatcherEmitter@?A0xf4f1c304@@QEAAXAEAVraw_ostream@llvm@@@Z) llvm-tblgen D:\llvm\2017\utils\TableGen\AsmMatcherEmitter.obj 1 llvm-svn: 315854
* [RegisterBankInfo] Cache the getMinimalPhysRegClass informationQuentin Colombet2017-10-132-8/+21
| | | | | | | | | | | | | | | TargetRegisterInfo::getMinimalPhysRegClass is actually pretty expensive because it has to iterate over all the register classes. Cache this information as we need and get it so that we limit its usage. Right now, we heavily rely on it, because this is how we get the mapping for vregs defined by copies from physreg (i.e., the one that are ABI related). Improve compile time by up to 10% for that pass. NFC llvm-svn: 315759
* [Legalizer] Use SmallSetVector instead of SetVector.Quentin Colombet2017-10-131-1/+1
| | | | | | NFC llvm-svn: 315758
* [LegalizerInfo] Don't evaluate end boundary every time through the loopQuentin Colombet2017-10-131-3/+4
| | | | | | | | Match the LLVM coding standard for loop conditions. NFC. llvm-svn: 315757
* [Legalizer] Only allocate the SetVectors once per function.Quentin Colombet2017-10-131-3/+5
| | | | | | | | | | | | Prior to this patch we used to create SetVectors in temporaries that were created and destroyed for each instruction. Now, instead we create and destroyed them only once, but clear the content for each instruction. This speeds up the pass by ~25%. NFC. llvm-svn: 315756
* [dump] Remove NDEBUG from test to enable dump methods [NFC]Don Hinton2017-10-123-6/+6
| | | | | | | | | | | | | | | Summary: Add LLVM_FORCE_ENABLE_DUMP cmake option, and use it along with LLVM_ENABLE_ASSERTIONS to set LLVM_ENABLE_DUMP. Remove NDEBUG and only use LLVM_ENABLE_DUMP to enable dump methods. Move definition of LLVM_ENABLE_DUMP from config.h to llvm-config.h so it'll be picked up by public headers. Differential Revision: https://reviews.llvm.org/D38406 llvm-svn: 315590
* CodeGen: Minor cleanups to use MachineInstr::getMF. NFCJustin Bogner2017-10-101-5/+5
| | | | | | | Since r315388 we have a shorter way to say this, so we'll replace MI->getParent()->getParent() with MI->getMF() in a few places. llvm-svn: 315390
* Rename OptimizationDiagnosticInfo.* to OptimizationRemarkEmitter.*Adam Nemet2017-10-091-1/+1
| | | | | | | Sync it up with the name of the class actually defined here. This has been bothering me for a while... llvm-svn: 315249
* [GISel]: Fix generation of illegal COPYs during CallLoweringAditya Nandakumar2017-10-091-3/+4
| | | | | | | | | | | We end up creating COPY's that are either truncating/extending and this should be illegal. https://reviews.llvm.org/D37640 Patch for X86 and ARM by igorb, rovka llvm-svn: 315240
* [Legalizer] Add support for G_OR NarrowScalar.Quentin Colombet2017-10-032-0/+45
| | | | | | | | | | | | | | Legalize bitwise OR: A = BinOp<Ty> B, C into: B1, ..., BN = G_UNMERGE_VALUES B C1, ..., CN = G_UNMERGE_VALUES C A1 = BinOp<Ty/N> B1, C2 ... AN = BinOp<Ty/N> BN, CN A = G_MERGE_VALUES A1, ..., AN llvm-svn: 314760
* [CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use ↵Eugene Zelenko2017-09-291-4/+2
| | | | | | warnings; other minor fixes (NFC). llvm-svn: 314559
* [GlobalISel] Only build expensive remarks if they're enabled. NFC.Ahmed Bougacha2017-09-182-7/+14
| | | | | | | | r313390 taught 'allowExtraAnalysis' to check whether remarks are enabled at all. Use that to only do the expensive instruction printing if they are. llvm-svn: 313552
* [GISel]: Add a clean up combiner during legalization.Aditya Nandakumar2017-08-301-101/+60
| | | | | | | | | | | Added a combiner which can clean up truncs/extends that are created in order to make the types work during legalization. Also moved the combineMerges to the LegalizeCombiner. https://reviews.llvm.org/D36880 llvm-svn: 312158
* Fix unused-lambda-capture warning by using default capture-by-refDavid Blaikie2017-08-251-2/+1
| | | | | | | | Since the lambda isn't escaped (via a std::function or similar) it's fine/better to use default capture-by-ref to provide semantics similar to language-level nested scopes (if/for/while/etc). llvm-svn: 311782
* Fix buildbot breakage from r311763. Remove unused lambda capture.Matt Morehouse2017-08-251-2/+1
| | | | llvm-svn: 311781
* [GISel]: Implement widenScalar for Legalizing G_PHIAditya Nandakumar2017-08-252-14/+47
| | | | | | https://reviews.llvm.org/D37018 llvm-svn: 311763
* [GISEl]: Translate phi into G_PHIAditya Nandakumar2017-08-231-1/+1
| | | | | | | | | | G_PHI has the same semantics as PHI but also has types. This lets us verify that the types in the G_PHI are consistent. This also allows specifying legalization actions for G_PHIs. https://reviews.llvm.org/D36990 llvm-svn: 311596
* [GlobalISel] Remove a stall comment in CMake.Quentin Colombet2017-08-041-3/+0
| | | | | | | | Thanks to Diana Picus <diana.picus@linaro.org> for noticing. NFC llvm-svn: 310114
* [GlobalISel] Make GlobalISel a non-optional library.Quentin Colombet2017-08-032-34/+13
| | | | | | | | With this change, the GlobalISel library gets always built. In particular, this is not possible to opt GlobalISel out of the build using the LLVM_BUILD_GLOBAL_ISEL variable any more. llvm-svn: 309990
* Use helper function instead of manually constructing DBG_VALUEs (NFC)Adrian Prantl2017-08-011-12/+7
| | | | | | rdar://problem/33580047 llvm-svn: 309757
* [GISel]: Support Widening G_ICMP's destination operand.Aditya Nandakumar2017-07-311-9/+45
| | | | | | | | | Updated AArch64 to widen destination to s32. https://reviews.llvm.org/D35737 Reviewed by Tim llvm-svn: 309579
* Remove the unused DBG_VALUE offset parameter from GlobalISel (NFC)Adrian Prantl2017-07-282-9/+7
| | | | | | | Followup to r309426. rdar://problem/33580047 llvm-svn: 309449
* Remove the obsolete offset parameter from @llvm.dbg.valueAdrian Prantl2017-07-281-8/+3
| | | | | | | | | | | | There is no situation where this rarely-used argument cannot be substituted with a DIExpression and removing it allows us to simplify the DWARF backend. Note that this patch does not yet remove any of the newly dead code. rdar://problem/33580047 Differential Revision: https://reviews.llvm.org/D35951 llvm-svn: 309426
* GlobalISel: stop localizer putting constants before EH_LABELsTim Northover2017-07-201-1/+2
| | | | | | | | If the localizer pass puts one of its constants before the label that tells the unwinder "jump here to handle your exception" then control-flow will skip it, leaving uninitialized registers at runtime. That's bad. llvm-svn: 308687
* GlobalISel: Support G_(S|U)REM widening in LegalizerHelperDiana Picus2017-07-181-0/+3
| | | | | | | | Treat widening G_SREM and G_UREM the same as G_SDIV and G_UDIV. This is going to be used in the ARM backend (and that's when the test will come too). llvm-svn: 308278
* Enhance synchscope representationKonstantin Zhuravlyov2017-07-111-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | OpenCL 2.0 introduces the notion of memory scopes in atomic operations to global and local memory. These scopes restrict how synchronization is achieved, which can result in improved performance. This change extends existing notion of synchronization scopes in LLVM to support arbitrary scopes expressed as target-specific strings, in addition to the already defined scopes (single thread, system). The LLVM IR and MIR syntax for expressing synchronization scopes has changed to use *syncscope("<scope>")*, where <scope> can be "singlethread" (this replaces *singlethread* keyword), or a target-specific name. As before, if the scope is not specified, it defaults to CrossThread/System scope. Implementation details: - Mapping from synchronization scope name/string to synchronization scope id is stored in LLVM context; - CrossThread/System and SingleThread scopes are pre-defined to efficiently check for known scopes without comparing strings; - Synchronization scope names are stored in SYNC_SCOPE_NAMES_BLOCK in the bitcode. Differential Revision: https://reviews.llvm.org/D21723 llvm-svn: 307722
* [ARM] GlobalISel: Legalize G_FCMP for s32Diana Picus2017-07-061-0/+2
| | | | | | | | | | | | | | | | | | | | | This covers both hard and soft float. Hard float is easy, since it's just Legal. Soft float is more involved, because there are several different ways to handle it based on the predicate: one and ueq need not only one, but two libcalls to get a result. Furthermore, we have large differences between the values returned by the AEABI and GNU functions. AEABI functions return a nice 1 or 0 representing true and respectively false. GNU functions generally return a value that needs to be compared against 0 (e.g. for ogt, the value returned by the libcall is > 0 for true). We could introduce redundant comparisons for AEABI as well, but they don't seem easy to remove afterwards, so we do different processing based on whether or not the result really needs to be compared against something (and just truncate if it doesn't). llvm-svn: 307243
* [globalisel][tablegen] Finish fixing compile-time regressions by merging the ↵Daniel Sanders2017-07-051-149/+0
| | | | | | | | | | | | | | | | | | | | | | | matcher and emitter state machines. Summary: Also, made a few minor tweaks to shave off a little more cumulative memory consumption: * All rules share a single NewMIs instead of constructing their own. Only one will end up using it. * Use MIs.resize(1) instead of MIs.clear();MIs.push_back(I) and prevent GIM_RecordInsn from changing MIs[0]. Depends on D33764 Reviewers: rovka, vitalybuka, ab, t.p.northover, qcolombet, aditya_nandakumar Reviewed By: ab Subscribers: kristof.beyls, igorb, llvm-commits Differential Revision: https://reviews.llvm.org/D33766 llvm-svn: 307159
* [GlobalISel] Refactor Legalizer helpers for libcallsDiana Picus2017-07-051-16/+20
| | | | | | | | | | We used to have a helper that replaced an instruction with a libcall. That turns out to be too aggressive, since sometimes we need to replace the instruction with at least two libcalls. Therefore, change our existing helper to only create the libcall and leave the instruction removal as a separate step. Also rename the helper accordingly. llvm-svn: 307149
* [MachineIRBuilder] Fix formatting. NFC.Diana Picus2017-07-051-1/+1
| | | | llvm-svn: 307144
* [MachineIRBuilder] Add buildOr helper. NFC.Diana Picus2017-07-051-0/+4
| | | | | | This isn't used anywhere yet, but I need it for a future commit. llvm-svn: 307141
* [MachineIRBuilder] Add buildBinaryOp helper. NFCDiana Picus2017-07-051-29/+11
| | | | | | | Add a helper for building simple binary ops like add, mul, sub, and. This can be used in the future for quickly adding support for or, xor. llvm-svn: 307139
* [globalisel][tablegen] Fix an unused variable warning in release builds ↵Daniel Sanders2017-07-051-1/+1
| | | | | | after r307133 llvm-svn: 307138
* [globalisel][tablegen] Added instruction emission to the state-machine-based ↵Daniel Sanders2017-07-051-0/+153
| | | | | | | | | | | | | | | | | | | | | | | matcher. Summary: This further improves the compile-time regressions that will be caused by a re-commit of r303259. Also added included preliminary work in preparation for the multi-insn emitter since I needed to change the relevant part of the API for this patch anyway. Depends on D33758 Reviewers: rovka, vitalybuka, ab, t.p.northover, qcolombet, aditya_nandakumar Reviewed By: ab Subscribers: kristof.beyls, igorb, llvm-commits Differential Revision: https://reviews.llvm.org/D33764 llvm-svn: 307133
* [globalisel][tablegen] Partially fix compile-time regressions by converting ↵Daniel Sanders2017-07-041-0/+3
| | | | | | | | | | | | | | | | | | | | | | matcher to state-machine(s) Summary: Replace the matcher if-statements for each rule with a state-machine. This significantly reduces compile time, memory allocations, and cumulative memory allocation when compiling AArch64InstructionSelector.cpp.o after r303259 is recommitted. The following patches will expand on this further to fully fix the regressions. Reviewers: rovka, ab, t.p.northover, qcolombet, aditya_nandakumar Reviewed By: ab Subscribers: vitalybuka, aemerson, javed.absar, igorb, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D33758 llvm-svn: 307079
* GlobalISel: add G_IMPLICIT_DEF instruction.Tim Northover2017-06-303-1/+17
| | | | | | | | | It looks like there are two target-independent but not GISel instructions that need legalization, IMPLICIT_DEF and PHI. These are already anomalies since their operands have important LLTs attached, so to make things more uniform it seems like a good idea to add generic variants. Starting with G_IMPLICIT_DEF. llvm-svn: 306875
* [GlobalISel] Make multi-step legalization work.Kristof Beyls2017-06-301-11/+15
| | | | | | | | | | | | | | | | In r301116, a custom lowering needed to be introduced to be able to legalize 8 and 16-bit divisions on ARM targets without a division instruction, since 2-step legalization (WidenScalar from 8 bit to 32 bit, then Libcall the 32-bit division) doesn't work. This fixes this and makes this kind of multi-step legalization, where first the size of the type needs to be changed and then some action is needed that doesn't require changing the size of the type, straighforward to specify. Differential Revision: https://reviews.llvm.org/D32529 llvm-svn: 306806
* [GISel]: New Opcode G_FLOG/G_FLOG2Aditya Nandakumar2017-06-291-0/+10
| | | | | | https://reviews.llvm.org/D34837 llvm-svn: 306766
* GlobalISel: add some more sanity-checking to MachineInstrBuilder. NFC.Tim Northover2017-06-271-1/+15
| | | | llvm-svn: 306481
* [GISel]: Add G_FEXP, G_FEXP2 opcodesAditya Nandakumar2017-06-271-0/+10
| | | | | | | Also add IRTranslator support. https://reviews.llvm.org/D34710 llvm-svn: 306475
* GlobalISel: verify that a COPY is trivial when created.Tim Northover2017-06-272-5/+10
| | | | | | | | | | | | Without this check, COPY instructions can actually be one of the generic casts in disguise. That's confusing and bad. At some point during ISel this restriction has to be relaxed since the fully selected instructions will usually use COPY for those purposes. Right now I think it's possible that relaxation occurs during RegBankSelect (hence the change there). I'm not convinced that's where it belongs long-term though. llvm-svn: 306470
* [CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use ↵Eugene Zelenko2017-06-264-44/+99
| | | | | | warnings; other minor fixes (NFC). llvm-svn: 306341
* AArch64: legalize G_EXTRACT operations.Tim Northover2017-06-263-3/+58
| | | | | | | This is the dual problem to legalizing G_INSERTs so most of the code and testing was cribbed from there. llvm-svn: 306328
* GlobalISel: remove G_SEQUENCE instruction.Tim Northover2017-06-232-72/+1
| | | | | | | | It was trying to do too many things. The basic lumping together of values for legalization purposes is now handled by G_MERGE_VALUES. More complex things involving gaps and odd sizes are handled by G_INSERT sequences. llvm-svn: 306120
* GlobalISel: convert buildSequence to use non-deprecated instructions.Tim Northover2017-06-232-10/+26
| | | | | | | | G_SEQUENCE is going away soon so as a first step the MachineIRBuilder needs to be taught how to emulate it with alternatives. We use G_MERGE_VALUES where possible, and a sequence of G_INSERTs if not. llvm-svn: 306119
* [GISel]: Add G_FMA opcode for fused multiply addsAditya Nandakumar2017-06-201-0/+7
| | | | | | | | https://reviews.llvm.org/D34372 Reviewed by dsanders llvm-svn: 305824
* [globalisel][tablegen] Add support for COPY_TO_REGCLASS.Daniel Sanders2017-06-202-10/+30
| | | | | | | | | | | | | | | | | | | | | | Summary: As part of this * Emitted instructions now have named MachineInstr variables associated with them. This isn't particularly important yet but it's a small step towards multiple-insn emission. * constrainSelectedInstRegOperands() is no longer hardcoded. It's now added as the ConstrainOperandsToDefinitionAction() action. COPY_TO_REGCLASS uses an alternate constraint mechanism ConstrainOperandToRegClassAction() which supports arbitrary constraints such as that defined by COPY_TO_REGCLASS. Reviewers: ab, qcolombet, t.p.northover, rovka, kristof.beyls, aditya_nandakumar Reviewed By: ab Subscribers: javed.absar, igorb, llvm-commits Differential Revision: https://reviews.llvm.org/D33590 llvm-svn: 305791
* [GlobalISel] combine not symmetric merge/unmerge nodes.Igor Breger2017-06-201-13/+58
| | | | | | | | | | | | | | | | Summary: In some cases legalization ends up with not symmetric merge/unmerge nodes. Transform it to merge/unmerge nodes. Reviewers: t.p.northover, qcolombet, zvi Reviewed By: t.p.northover Subscribers: rovka, kristof.beyls, guyblank, llvm-commits Differential Revision: https://reviews.llvm.org/D33626 llvm-svn: 305783
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