| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | GlobalISel: move type information to MachineRegisterInfo. | Tim Northover | 2016-09-09 | 1 | -3/+7 |
| | | | | | | | | | | | | | | | | | | We want each register to have a canonical type, which means the best place to store this is in MachineRegisterInfo rather than on every MachineInstr that happens to use or define that register. Most changes following from this are pretty simple (you need an MRI anyway if you're going to be doing any transformations, so just check the type there). But legalization doesn't really want to check redundant operands (when, for example, a G_ADD only ever has one type) so I've made use of MCInstrDesc's operand type field to encode these constraints and limit legalization's work. As an added bonus, more validation is possible, both in MachineVerifier and MachineIRBuilder (coming soon). llvm-svn: 281035 | ||||
| * | GlobalISel: combine extracts & sequences created for legalization | Tim Northover | 2016-08-30 | 1 | -0/+79 |
| | | | | | | | | | Legalization ends up creating many G_SEQUENCE/G_EXTRACT pairs which leads to inefficient codegen (even for -O0), so add a quick pass over the function to remove them again. llvm-svn: 280155 | ||||
| * | [MachineLegalize] Do not abort when the target wants to fall back. | Quentin Colombet | 2016-08-27 | 1 | -4/+20 |
| | | | | | llvm-svn: 279904 | ||||
| * | [GlobalISel] Teach the core pipeline not to run if ISel failed. | Quentin Colombet | 2016-08-27 | 1 | -0/+4 |
| | | | | | llvm-svn: 279889 | ||||
| * | [GlobalISel] Don't legalize non-generic instructions. | Ahmed Bougacha | 2016-08-02 | 1 | -0/+6 |
| | | | | | | | They don't have types and should be legal. llvm-svn: 277446 | ||||
| * | GlobalISel: remove redundant ';'s. NFC | Tim Northover | 2016-07-26 | 1 | -1/+1 |
| | | | | | llvm-svn: 276723 | ||||
| * | GlobalISel: implement legalization pass, with just one transformation. | Tim Northover | 2016-07-22 | 1 | -0/+72 |
| This adds the actual MachineLegalizeHelper to do the work and a trivial pass wrapper that legalizes all instructions in a MachineFunction. Currently the only transformation supported is splitting up a vector G_ADD into one acting on smaller vectors. llvm-svn: 276461 | |||||
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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