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* SymbolRecord - fix more uninitialized variable warnings. NFCI.Simon Pilgrim2019-11-031-14/+14
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* Fix uninitialized variable warnings. NFCI.Simon Pilgrim2019-11-032-3/+7
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* Fix line_iterator uninitialized variable warnings. NFCI.Simon Pilgrim2019-11-031-5/+5
| | | | Allows us to auto define the default constructor as well.
* CodeGen/DIE.h: prefer the default member initializer to the member ↵Fangrui Song2019-11-021-2/+2
| | | | initializers in the constructor. NFC
* isConditionalBranch/isUnconditionalBranch - use boolean operators. NFCI.Simon Pilgrim2019-11-022-4/+4
| | | | Stop static analyzer warnings about using bitwise operators on booleans.
* [Attributor][NFCI] Distinguish optional and required dependencesJohannes Doerfert2019-11-021-10/+33
| | | | | | | | | | | | | | | | | | Dependences between two abstract attributes SRC and TRG come naturally in two flavors: Either (1) "some" information of SRC is *required* for TRG to derive information, or (2) SRC is just an *optional* way for TRG to derive information. While it is not strictly necessary to distinguish these types explicitly, it can help us to converge faster, in terms of iterations, and also cut down the number of `AbstractAttribute::update` calls. As far as I can tell, we only use optional dependences for liveness so far but that might change in the future. With this change the Attributor can be informed about the "dependence class" and it will perform appropriate actions when an Attribute is set to an invalid state, thus one that cannot be used by others to derive information from.
* Fix -Wreorder warnings. NFCI.Simon Pilgrim2019-11-021-1/+1
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* llvm.coverage.FunctionRecord - fix uninitialized variable warning. NFCI.Simon Pilgrim2019-11-021-1/+1
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* DIEAbbrev - fix uninitialized variable warning. NFCI.Simon Pilgrim2019-11-021-1/+1
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* CustomTypeNode/SpecialTableSymbolNode - fix uninitialized variable warnings. ↵Simon Pilgrim2019-11-021-2/+2
| | | | NFCI.
* [IR] Avoid use of PointerType::getElementType() in one of the CallBrInst ↵Craig Topper2019-11-021-7/+3
| | | | | | | | constructors. We already have the FunctionType we can call getReturnType on. I think this was due to a bad rebase of the CallBr patch while it was in development when CallInst and InvokeInst were updated.
* [AbstractCallSite][FIX] Correct faulty assertionJohannes Doerfert2019-11-021-1/+1
| | | | | | When the Attributor run on the IPConstantProp test case for multiple callbacks it triggered a faulty assertion in the AbstractCallSite implementation. The callee can well be at argument position 0.
* [WebAssembly] Add experimental SIMD dot product instructionThomas Lively2019-11-011-0/+4
| | | | | | | | | | | | | | | | | | | Summary: This instruction is not merged to the spec proposal, but we need it to be implemented in the toolchain to experiment with it. It is available only on an opt-in basis through a clang builtin. Defined in https://github.com/WebAssembly/simd/pull/127. Depends on D69696. Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D69697
* [Object] Remove extra space in error messageJames Henderson2019-11-011-1/+1
| | | | Previously this message had a double space in it.
* [AArch64][SVE] Implement several floating-point arithmetic intrinsicsKerry McLaughlin2019-11-011-0/+32
| | | | | | | | | | | | | | | | | | | Summary: Adds intrinsics for the following: - fabd, fadd, fsub & fsubr - fmul, fmulx, fdiv & fdivr - fmax, fmaxnm, fmin & fminnm - fscale & ftsmul Reviewers: huntergr, sdesmalen, dancgr Reviewed By: sdesmalen Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, cameron.mcinally, cfe-commits, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69657
* DAG: Add DAG argument to isFPExtFoldableMatt Arsenault2019-10-311-1/+2
| | | | | For AMDGPU this is dependent on the FP mode, which should eventually not be a property of the subtarget.
* [WebAssembly] SIMD integer min and max instructionsThomas Lively2019-10-311-0/+20
| | | | | | | | | | | | | | | | | | | | | | Summary: Introduces a clang builtins and LLVM intrinsics representing integer min/max instructions. These instructions have not been merged to the SIMD spec proposal yet, so they are currently opt-in only via builtins and not produced by general pattern matching. If these instructions are accepted into the spec proposal the builtins and intrinsics will be replaced with normal pattern matching. Defined in https://github.com/WebAssembly/simd/pull/27. Reviewers: aheejin Reviewed By: aheejin Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D69696
* [profile] Add a mode to continuously sync counter updates to a fileVedant Kumar2019-10-311-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for continuously syncing profile counter updates to a file. The motivation for this is that programs do not always exit cleanly. On iOS, for example, programs are usually killed via a signal from the OS. Running atexit() handlers after catching a signal is unreliable, so some method for progressively writing out profile data is necessary. The approach taken here is to mmap() the `__llvm_prf_cnts` section onto a raw profile. To do this, the linker must page-align the counter and data sections, and the runtime must ensure that counters are mapped to a page-aligned offset within a raw profile. Continuous mode is (for the moment) incompatible with the online merging mode. This limitation is lifted in https://reviews.llvm.org/D69586. Continuous mode is also (for the moment) incompatible with value profiling, as I'm not sure whether there is interest in this and the implementation may be tricky. As I have not been able to test extensively on non-Darwin platforms, only Darwin support is included for the moment. However, continuous mode may "just work" without modification on Linux and some UNIX-likes. AIUI the default value for the GNU linker's `--section-alignment` flag is set to the page size on many systems. This appears to be true for LLD as well, as its `no_nmagic` option is on by default. Continuous mode will not "just work" on Fuchsia or Windows, as it's not possible to mmap() a section on these platforms. There is a proposal to add a layer of indirection to the profile instrumentation to support these platforms. rdar://54210980 Differential Revision: https://reviews.llvm.org/D68351
* [Remarks] Add support for linking remarksFrancis Visoiu Mistrih2019-10-313-0/+135
| | | | | | | | | | | | | | | | | Remarks are usually emitted per-TU, and for generating a standalone remark file that can be shipped with the linked binary we need some kind of tool to merge everything together. The remarks::RemarkLinker class takes care of this and: * Deduplicates remarks * Filters remarks with no debug location * Merges string tables from all the entries As an output, it provides an iterator range that can be used to serialize the remarks to a file. Differential Revision: https://reviews.llvm.org/D69141
* [PGO][PGSO] Fix -DBUILD_SHARED_LIBS=on builds after ↵Fangrui Song2019-10-311-21/+2
| | | | | | | | | | | D69580/llvmorg-10-init-8797-g0d987e411ac Move TargetLoweringBase::isSuitableForJumpTable from llvm/CodeGen/TargetLowering.h to .cpp, to avoid the undefined reference from all LLVM${Target}ISelLowering.cpp. Another fix is to add a dependency on TransformUtils to all lib/Target/$Target/LLVMBuild.txt, but that is too disruptive.
* [PGO][PGSO] TargetLowering/TargetTransformationInfo/SwitchLoweringUtils part.Hiroshi Yamauchi2019-10-315-11/+31
| | | | | | | | | | | | | | | | Summary: (Split of off D67120) TargetLowering/TargetTransformationInfo/SwitchLoweringUtils changes for profile guided size optimization. Reviewers: davidxl Subscribers: eraman, hiraditya, haicheng, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69580
* [Attributor] Make AANonNull perform context sensitive queriesJohannes Doerfert2019-10-311-0/+6
| | | | | | | | | | | | | | | | | Summary: In order to get context sensitivity from isKnownNonZero we need to provide a context instruction *and* a dominator tree. The latter is passed now to which actually allows to remove some initialization code. Tests taken from PR43833. Reviewers: uenoku, sstefan1 Subscribers: hiraditya, bollu, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69595
* Revert rG57ee0435bd47f23f3939f402914c231b4f65ca5e - [TII] Use optional ↵Simon Pilgrim2019-10-311-25/+25
| | | | | | destination and source pair as a return value; NFC This is breaking MSVC builds: http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win/builds/20375
* DAG: Add new control for ISD::FMAD formationMatt Arsenault2019-10-311-0/+8
| | | | | | | | | For AMDGPU this depends on whether denormals are enabled in the default FP mode for the function. Currently this is treated as a subtarget feature, so FMAD is selectively legal based on that. I want to move this out of the subtarget features so this can be controlled with a denormal mode attribute. Additionally, this will allow folding based on a future ftz fast math flag.
* [TII] Use optional destination and source pair as a return value; NFCDjordje Todorovic2019-10-311-25/+25
| | | | | | | | | | Refactor usage of isCopyInstrImpl, isCopyInstr and isAddImmediate methods to return optional machine operand pair of destination and source registers. Patch by Nikola Prica Differential Revision: https://reviews.llvm.org/D69622
* [PatternMatch] Add m_WithOverflowInst and m_ExtractValue matchersDavid Green2019-10-311-0/+22
| | | | | | Used in D69245, these add pattern matchers for the WithOverflowInst (capturing the result) and the ExtractValue instructions taking a template parameter specifying the element being extracted.
* [LICM] Invalidate SCEV upon instruction hoistingSerguei Katkov2019-10-311-1/+1
| | | | | | | | | | | Since SCEV can cache information about location of an instruction, it should be invalidated when the instruction is moved. There should be similar bug in code sinking part of LICM, it will be fixed in a follow-up change. Patch Author: Daniil Suchkov Reviewers: asbirlea, mkazantsev, reames Reviewed By: asbirlea Subscribers: hiraditya, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D69370
* minidump: Add an "arm64" constantPavel Labath2019-10-311-0/+1
| | | | | | This is the "official" constant for arm64. We also have another constant for arm64 (called BP_ARM64), which was used by breakpad while there was no official constant for arm64 available.
* [cfi] Add flag to always generate .debug_frameDavid Candler2019-10-313-1/+13
| | | | | | | | | This adds a flag to LLVM and clang to always generate a .debug_frame section, even if other debug information is not being generated. In situations where .eh_frame would normally be emitted, both .debug_frame and .eh_frame will be used. Differential Revision: https://reviews.llvm.org/D67216
* [yaml2obj/obj2yaml] - Add support for SHT_GNU_HASH section.georgerim2019-10-311-0/+38
| | | | | | | This adds parsing and dumping support for GNU hash sections. They are described nicely here: https://blogs.oracle.com/solaris/gnu-hash-elf-sections-v2 Differential revision: https://reviews.llvm.org/D69399
* [Attributor][NFCI] Improve the usage of IntegerStatesJohannes Doerfert2019-10-311-29/+39
| | | | | Setting the upper bound directly in the state can be beneficial and simplifies the logic. This also exposed more copy&paste type errors.
* [Attributor] Liveness for valuesJohannes Doerfert2019-10-311-2/+31
| | | | | | | | | | | | | | | | | | | | | | | Summary: This patch introduces liveness (AAIsDead) for all positions, thus for all kinds of values. For now, we say an instruction is dead if it would be removed assuming all users are dead. A call site return is different as we just look at the users. If all call site returns have been eliminated, the return values can return undef instead of their original value, eliminating uses. We try to recursively delete dead instructions now and we introduce a simple check interface for use-traversal. This is the idea tried out in D68626 but implemented in the right way. Reviewers: uenoku, sstefan1 Subscribers: hiraditya, bollu, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D68925
* [MustExecute] Forward iterate over conditional branchesJohannes Doerfert2019-10-311-2/+29
| | | | | | | | | | | | | | | | | | | Summary: If a conditional branch is encountered we can try to find a join block where the execution is known to continue. This means finding a suitable block, e.g., the immediate post dominator of the conditional branch, and proofing control will always reach that block. This patch implements different techniques that work with and without provided analysis. Reviewers: uenoku, sstefan1, hfinkel Subscribers: hiraditya, bollu, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D68933
* [Attributor] Add "free"-based heap2stack deductionJohannes Doerfert2019-10-301-0/+24
| | | | | | | | | | | | | | | Summary: If there is a unique free of the allocated that has to be reached from the malloc, we can apply the heap-2-stack transformation even if the pointer escapes. Reviewers: hfinkel, sstefan1, uenoku Subscribers: hiraditya, bollu, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D68958
* [AArch64][SVE] Add patterns for some integer vector instructionsEhsan Amiri2019-10-301-0/+13
| | | | | | | | | | | | Add pattern matching for SVE vector instructions: -- add, sub, and, or, xor instructions -- sqadd, uqadd, sqsub, uqsub target-independent intrinsics -- bic intrinsics -- predicated add, sub, subr intrinsics Patch Review: https://reviews.llvm.org/D69128 Patch authored by: dancgr (Danilo Carvalho Grael)
* [Attributor][NFC] Eagerly mark attributes as fixed.Johannes Doerfert2019-10-301-0/+3
| | | | | | If an attribute did not query any optimistic (=non-fixed) information to justify its state, we know the attribute state will not change anymore. Thus, we can indicate an optimistic fixpoint.
* [Attributor][NFC] Do not record dependences on fixed attributesJohannes Doerfert2019-10-301-5/+3
| | | | | Since fixed values cannot change, we do not need to wait for it to happen, we will never notify the dependent attribute anyway.
* [Attributor][NFC] Simplify the IRPosition interfaceJohannes Doerfert2019-10-301-64/+10
| | | | | | | We pretended IRPosition came either as mutable or immutable objects while they are basically always immutable, with a single (existing) unfortunate exceptions. This patch cleans up the uses to deal with the immutable version.
* [Attributor] Automatically deal with undef values for IRAttributesJohannes Doerfert2019-10-301-2/+4
| | | | | | For (almost) all IRAttribute we can derive whatever we want for undef values so it makes sense to provide this functionality in the base class. At the same time, we probably do not want to annotate them.
* [JITLink] Move block ownership from LinkGraph to Section.Lang Hames2019-10-301-37/+95
| | | | This enables easy iteration over blocks in a specific section.
* Revert "[CodeView] Add option to disable inline line tables."Amy Huang2019-10-301-1/+0
| | | | | | because it breaks compiler-rt tests. This reverts commit 6d03890384517919a3ba7fe4c35535425f278f89.
* [CodeView] Add option to disable inline line tables.Amy Huang2019-10-301-0/+1
| | | | | | | | | | | | | | | | | Summary: This adds a clang option to disable inline line tables. When it is used, the inliner uses the call site as the location of the inlined function instead of marking it as an inline location with the function location. See https://bugs.llvm.org/show_bug.cgi?id=42344 Reviewers: rnk Subscribers: hiraditya, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D67723
* [clang][llvm] Obsolete Exynos M1 and M2Evandro Menezes2019-10-302-6/+0
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* [JITLink] Add a utility for splitting blocks at a given index.Lang Hames2019-10-301-0/+53
| | | | | | | | LinkGraph::splitBlock will split a block at a given index, returning a new block covering the range [ 0, index ) and modifying the original block to cover the range [ index, original-block-size ). Block addresses, content, edges and symbols will be updated as necessary. This utility will be used in upcoming improvements to JITLink's eh-frame support.
* [LegacyPassManager] Delete BasicBlockPass/Manager.Alina Sbirlea2019-10-308-70/+2
| | | | | | | | | | | | | | | | Summary: Delete the BasicBlockPass and BasicBlockManager, all its dependencies and update documentation. The BasicBlockManager was improperly tested and found to be potentially broken, and was deprecated as of rL373254. In light of the switch to the new pass manager coming before the next release, this patch is a first cleanup of the LegacyPassManager. Reviewers: chandlerc, echristo Subscribers: mehdi_amini, sanjoy.google, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69121
* [ObjectYAML] - Redefine LLVM_YAML_IS_SEQUENCE_VECTOR(llvm::yaml::Hex*) as ↵Georgii Rymar2019-10-302-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | LLVM_YAML_IS_FLOW_SEQUENCE_VECTOR. I am using it in https://reviews.llvm.org/D69399. This change changes how obj2yaml dumps arrays of `llvm::yaml::Hex8/llvm::yaml::Hex16/llvm::yaml::Hex32` from: ``` PayloadBytes: - 0x01 - 0x02 ... ``` To ``` PayloadBytes: [ 0x01, 0x02, ... ] ``` The latter way is shorter and looks better for arrays. Differential revision: https://reviews.llvm.org/D69558
* [IR] Allow fast math flags on calls with floating point array type.Jay Foad2019-10-301-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | Summary: This extends the rules for when a call instruction is deemed to be an FPMathOperator, which is based on the type of the call (i.e. the return type of the function being called). Previously we only allowed floating-point and vector-of-floating-point types. Now we also allow arrays (nested to any depth) of floating-point and vector-of-floating-point types. This was motivated by llpc, the pipeline compiler for AMD GPUs (https://github.com/GPUOpen-Drivers/llpc). llpc has many math library functions that operate on vectors, typically represented as <4 x float>, and some that operate on matrices, typically represented as [4 x <4 x float>], and it's useful to be able to decorate calls to all of them with fast math flags. Reviewers: spatel, wristow, arsenm, hfinkel, aemerson, efriedma, cameron.mcinally, mcberg2017, jmolloy Subscribers: wdng, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69161
* LiveIntervals: Split live intervals on multiple dead defsKrzysztof Parzyszek2019-10-301-1/+1
| | | | | | | | | | This is a follow-up to D67448. Split live intervals with multiple dead defs during the initial execution of the live interval analysis, but do it outside of the function createAndComputeVirtRegInterval. Differential Revision: https://reviews.llvm.org/D68666
* minidump: Rename some architecture constantsPavel Labath2019-10-301-15/+15
| | | | | | | | | | | | | | | | | | | | | The architecture enum contains two kinds of contstants: the "official" ones defined by Microsoft, and unofficial constants added by breakpad to cover the architectures not described by the first ones. Up until now, there was no big need to differentiate between the two. However, now that Microsoft has defined https://docs.microsoft.com/en-us/windows/win32/api/sysinfoapi/ns-sysinfoapi-system_info a constant for ARM64, we have a name clash. This patch renames all breakpad-defined constants with to include the prefix "BP_". This frees up the name "ARM64", which I'll re-introduce with the new "official" value in a follow-up patch. Reviewers: amccarth, clayborg Subscribers: lldb-commits, llvm-commits Differential Revision: https://reviews.llvm.org/D69285
* [ARM][AArch64][DebugInfo] Improve call site instruction interpretationDjordje Todorovic2019-10-301-0/+11
| | | | | | | | | | | | | Extend the describeLoadedValue() with support for target specific ARM and AArch64 instructions interpretation. The patch provides specialization for ADD and SUB operations that include a register and an immediate/offset operand. Some of the instructions can operate with global string addresses or constant pool indexes but such cases are omitted since we currently lack flexible support for processing such operands at DWARF production stage. Patch by Nikola Prica Differential Revision: https://reviews.llvm.org/D67556
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