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* TableGen: Produce CoveredBySubRegs summary for register classesMatthias Braun2016-04-281-0/+3
| | | | | | This will be used in the upcoming "DetectDeadLanes" pass. llvm-svn: 267850
* TargetRegisterInfo: Introduce reverseComposeSubRegIndexLaneMask()Matthias Braun2016-04-281-0/+19
| | | | | | | | | This function performs the reverse computation of composeSubRegIndexLaneMask(). It will be used in the upcoming "DetectDeadLanes" pass. llvm-svn: 267849
* TableGen: Support lanemasks for classes without subregistersMatthias Braun2016-04-281-1/+1
| | | | | | | | | | | | | Previously using lanemasks on registers without any subregisters was not well defined. This commit extends TargetRegisterInfo/tablegen to: - Report a lanemask of 1 for regclasses without subregisters - Do the right thing when mapping a 0/1 lanemask from a class without subregisters into a class with subregisters in TargetRegisterInfo::composeSubRegIndexLaneMasks(). This will be used in the upcoming "DetectDeadLanes" patch. llvm-svn: 267848
* Fix bogus documentation for StringRef::slice in the End < Start case.Richard Smith2016-04-281-3/+4
| | | | llvm-svn: 267831
* Parse module information from DBI stream.Zachary Turner2016-04-272-0/+67
| | | | | | | | | | | | This gets more data out of the DBI strema of the PDB. In particular it extracts the metadata for the list of modules (compilands) that this PDB contains info about, and adds support for dumping these fields to llvm-pdbdump. Differential Revision: http://reviews.llvm.org/D19570 Reviewed By: ruiu llvm-svn: 267818
* [PGO] Promote indirect calls to conditional direct calls with value-profileRong Xu2016-04-273-0/+3
| | | | | | | | | | This patch implements the transformation that promotes indirect calls to conditional direct calls when the indirect-call value profile meta-data is available. Differential Revision: http://reviews.llvm.org/D17864 llvm-svn: 267815
* [MCAssembler] Allow backend to finalize layout post-relaxation.Colin LeMahieu2016-04-271-0/+4
| | | | | | Differential revision: http://reviews.llvm.org/D19429 llvm-svn: 267796
* [RuntimeDyld] Plumb Error/Expected through the internals of RuntimeDyld.Lang Hames2016-04-271-0/+13
| | | | | | | | | | | | | Also replaces a number of calls to report_fatal_error with Error returns. The plumbing will make it easier to return errors originating in libObject. Replacing report_fatal_errors with Error returns will give JIT clients the opportunity to recover gracefully when the JIT is unable to produce/relocate code, as well as providing meaningful error messages that can be used to file bug reports. llvm-svn: 267776
* Add TargetMachine::addEarlyAsPossiblePasses, and call it from opt.Justin Lebar2016-04-271-0/+5
| | | | | | | | | | | | | | Summary: This is a hook to allow TargetMachine to install passes at the EP_EarlyAsPossible PassManagerBuilder extension point. Reviewers: chandlerc Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D18614 llvm-svn: 267763
* [TLI] Unify LibFunc attribute inference. NFCI.Ahmed Bougacha2016-04-271-0/+7
| | | | | | | | | | | | | Now the pass is just a tiny wrapper around the util. This lets us reuse the logic elsewhere (done here for BuildLibCalls) instead of duplicating it. The next step is to have something like getOrInsertLibFunc that also sets the attributes. Differential Revision: http://reviews.llvm.org/D19470 llvm-svn: 267759
* [TLI] Unify LibFunc signature checking. NFCI.Ahmed Bougacha2016-04-271-0/+16
| | | | | | | | | I tried to be as close as possible to the strongest check that existed before; cleaning these up properly is left for future work. Differential Revision: http://reviews.llvm.org/D19469 llvm-svn: 267758
* [DAGCombiner] Follow coding convention for function name (NFC)Gerolf Hoflehner2016-04-271-1/+1
| | | | llvm-svn: 267745
* AMDGPU/SI: Add llvm.amdgcn.s.waitcnt.all intrinsicNicolai Haehnle2016-04-271-0/+2
| | | | | | | | | | | | | | | | | Summary: So it appears that to guarantee some of the ordering requirements of a GLSL memoryBarrier() executed in the shader, we need to emit an s_waitcnt. (We can't use an s_barrier, because memoryBarrier() may appear anywhere in the shader, in particular it may appear in non-uniform control flow.) Reviewers: arsenm, mareko, tstellarAMD Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D19203 llvm-svn: 267729
* [TTI] Add hook for vector extract with extensionMatthew Simpson2016-04-273-0/+24
| | | | | | | | | | | | | | | This change adds a new hook for estimating the cost of vector extracts followed by zero- and sign-extensions. The motivating example for this change is the SMOV and UMOV instructions on AArch64. These instructions move data from vector to general purpose registers while performing the corresponding extension (sign-extend for SMOV and zero-extend for UMOV) at the same time. For these operations, TargetTransformInfo can assume the extensions are free and only report the cost of the vector extract. The SLP vectorizer has been updated to make use of the new hook. Differential Revision: http://reviews.llvm.org/D18523 llvm-svn: 267725
* [ThinLTO] Use valueid instead of bitcode offsets in combined index fileTeresa Johnson2016-04-272-6/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: With the removal of support for lazy parsing of combined index summary records (e.g. r267344), we no longer need to include the summary record bitcode offset in the VST entries for definitions. Change the combined index format to be similar to the per-module index format in using value ids to cross-reference from the summary record to the VST entry (rather than the summary record bitcode offset to cross-reference in the other direction). The visible changes are: 1) Add the value id to the combined summary records 2) Remove the summary offset from the combined VST records, which has the following effects: - No longer need the VST_CODE_COMBINED_GVDEFENTRY record, as all combined index VST entries now only contain the value id and corresponding GUID. - No longer have duplicate VST entries in the case where there are multiple definitions of a symbol (e.g. weak/linkonce), as they all have the same value id and GUID. An implication of #2 above is that in order to hook up an alias to the correct aliasee based on the value id of the aliasee recorded in the combined index alias record, we need to scan the entries in the index for that GUID to find the one from the same module (i.e. the case where there are multiple entries for the aliasee). But the reader no longer has to maintain a special map to hook up the alias/aliasee. Reviewers: joker.eph Subscribers: joker.eph, llvm-commits Differential Revision: http://reviews.llvm.org/D19481 llvm-svn: 267712
* NFC. Introduce Value::getPointerDerferecnceableBytesArtur Pilipenko2016-04-271-0/+7
| | | | | | | | | | Extract a part of isDereferenceableAndAlignedPointer functionality to Value::getPointerDerferecnceableBytes. Currently it's a NFC, but in future I'm going to accumulate all the logic about value dereferenceability in this function similarly to Value::getPointerAlignment function (D16144). Reviewed By: reames Differential Revision: http://reviews.llvm.org/D17572 llvm-svn: 267708
* isSafeToLoadUnconditionally support queries without a contextArtur Pilipenko2016-04-271-2/+4
| | | | | | | | | | This is required to use this function from isSafeToSpeculativelyExecute Reviewed By: hfinkel Differential Revision: http://reviews.llvm.org/D16231 llvm-svn: 267692
* [LoopDist] Add llvm.loop.distribute.enable loop metadataAdam Nemet2016-04-271-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: D19403 adds a new pragma for loop distribution. This change adds support for the corresponding metadata that the pragma is translated to by the FE. As part of this I had to rethink the flag -enable-loop-distribute. My goal was to be backward compatible with the existing behavior: A1. pass is off by default from the optimization pipeline unless -enable-loop-distribute is specified A2. pass is on when invoked directly from opt (e.g. for unit-testing) The new pragma/metadata overrides these defaults so the new behavior is: B1. A1 + enable distribution for individual loop with the pragma/metadata B2. A2 + disable distribution for individual loop with the pragma/metadata The default value whether the pass is on or off comes from the initiator of the pass. From the PassManagerBuilder the default is off, from opt it's on. I moved -enable-loop-distribute under the pass. If the flag is specified it overrides the default from above. Then the pragma/metadata can further modifies this per loop. As a side-effect, we can now also use -enable-loop-distribute=0 from opt to emulate the default from the optimization pipeline. So to be precise this is the new behavior: C1. pass is off by default from the optimization pipeline unless -enable-loop-distribute or the pragma/metadata enables it C2. pass is on when invoked directly from opt unless -enable-loop-distribute=0 or the pragma/metadata disables it Reviewers: hfinkel Subscribers: joker.eph, mzolotukhin, llvm-commits Differential Revision: http://reviews.llvm.org/D19431 llvm-svn: 267672
* [Cloning] cloneLoopWithPreheader(): add assert to ensure no sub-loopsVaivaswatha Nagaraj2016-04-271-0/+1
| | | | | | | | | | | | | | Summary: cloneLoopWithPreheader() does not update LoopInfo for sub-loop of the original loop being cloned. Add assert to ensure no sub-loops for loop being cloned. Reviewers: anemet, ashutosh.nema, hfinkel Subscribers: mzolotukhin, llvm-commits Differential Revision: http://reviews.llvm.org/D15922 llvm-svn: 267671
* Revert "Support "preserving" the summary information when using setModule() ↵Mehdi Amini2016-04-271-1/+0
| | | | | | | | | | API in LTOCodeGenerator" This reverts commit r267665. ASAN shows that there is a use of undefined value. From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 267668
* Support "preserving" the summary information when using setModule() API in ↵Mehdi Amini2016-04-271-0/+1
| | | | | | | | | LTOCodeGenerator Another attempt at r267655... From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 267665
* Revert "Support "preserving" the summary information when using setModule() ↵Mehdi Amini2016-04-271-1/+0
| | | | | | | | | | API in LTOCodeGenerator" This reverts commit r267657, r267656, and r267655. The test does not pass on multiple bots, I'm unsure why yet but let's unbreak them. From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 267664
* Support "preserving" the summary information when using setModule() API in ↵Mehdi Amini2016-04-271-0/+1
| | | | | | | LTOCodeGenerator From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 267655
* ThinLTO: do not promote GlobalVariable that have a specific section.Mehdi Amini2016-04-271-0/+4
| | | | | | | Differential Revision: http://reviews.llvm.org/D18298 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 267646
* [MachineInstrBundle] Update the comment for PhysRegInfo::DeadDef.Quentin Colombet2016-04-261-2/+4
| | | | | | | | I missed read the comment when I commited r267621 and thought the comment did not need update. Matthias kindly proved me wrong. Fixing that. llvm-svn: 267638
* PM: Port Reassociate to the new pass managerJustin Bogner2016-04-262-1/+102
| | | | llvm-svn: 267631
* [MachineInstrBundle] Improvement the recognition of dead definitions.Quentin Colombet2016-04-261-0/+4
| | | | | | | Now, it is possible to know that partial definitions are dead definitions and recognize that clobbered registers are also dead. llvm-svn: 267621
* [CodeGen] Add getBuildVector and getSplatBuildVector helpers. NFCI.Ahmed Bougacha2016-04-261-0/+32
| | | | | | Differential Revision: http://reviews.llvm.org/D17176 llvm-svn: 267606
* PM: Port Internalize to the new pass managerJustin Bogner2016-04-262-5/+58
| | | | llvm-svn: 267596
* Fix warnings and -Werror build on clang.Zachary Turner2016-04-261-1/+1
| | | | llvm-svn: 267589
* Parse and dump PDB DBI Stream Header InformationZachary Turner2016-04-264-12/+77
| | | | | | | | | | | | | | | | | | The DBI stream contains a lot of bookkeeping information for other streams. In particular it contains information about section contributions and linked modules. This patch is a first attempt at parsing some of the information out of the DBI stream. It currently only parses and dumps the headers of the DBI stream, so none of the module data or section contribution data is pulled out. This is just a proof of concept that we understand the basic properties of the DBI stream's metadata, and followup patches will try to extract more detailed information out. Differential Revision: http://reviews.llvm.org/D19500 Reviewed By: majnemer, ruiu llvm-svn: 267585
* [Tail duplication] Handle source registers with subregistersKrzysztof Parzyszek2016-04-261-3/+8
| | | | | | | | | | | | | | When a block is tail-duplicated, the PHI nodes from that block are replaced with appropriate COPY instructions. When those PHI nodes contained use operands with subregisters, the subregisters were dropped from the COPY instructions, resulting in incorrect code. Keep track of the subregister information and use this information when remapping instructions from the duplicated block. Differential Revision: http://reviews.llvm.org/D19337 llvm-svn: 267583
* Internalize: More consistent file header and include guards. NFCJustin Bogner2016-04-261-4/+4
| | | | | | Match the style here to the other headers in Transforms/IPO. llvm-svn: 267581
* [CodeGenPrepare] use branch weight metadata to decide if a select should be ↵Sanjay Patel2016-04-263-5/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | turned into a branch This is part of solving PR27344: https://llvm.org/bugs/show_bug.cgi?id=27344 CGP should undo the SimplifyCFG transform for the same reason that earlier patches have used this same mechanism: it's possible that passes between SimplifyCFG and CGP may be able to optimize the IR further with a select in place. For the TLI hook default, >99% taken or not taken is chosen as the default threshold for a highly predictable branch. Even the most limited HW branch predictors will be correct on this branch almost all the time, so even a massive mispredict penalty perf loss would be overcome by the win from all the times the branch was predicted correctly. As a follow-up, we could make the default target hook less conservative by using the SchedMachineModel's MispredictPenalty. Or we could just let targets override the default by implementing the hook with that and other target-specific options. Note that trying to statically determine mispredict rates for close-to-balanced profile weight data is generally impossible if the HW is sufficiently advanced. Ie, 50/50 taken/not-taken might still be 100% predictable. Finally, note that this patch as-is will not solve PR27344 because the current __builtin_unpredictable() branch weight default values are 4 and 64. A proposal to change that is in D19435. Differential Revision: http://reviews.llvm.org/D19488 llvm-svn: 267572
* Fix build broken due to order of initialization problem.Zachary Turner2016-04-261-2/+4
| | | | llvm-svn: 267571
* Refactor some more PDB reading code into DebugInfoPDB.Zachary Turner2016-04-264-0/+130
| | | | | | | Differential Revision: http://reviews.llvm.org/D19445 Reviewed By: David Majnemer llvm-svn: 267564
* [ORC] Try to work around a GCC 4.7 bug triggered by r267457.Lang Hames2016-04-261-4/+9
| | | | llvm-svn: 267510
* Remove MinLatency in SchedMachineModel. NFC.Junmo Park2016-04-261-2/+0
| | | | | | | | | | | Summary: We don't use MinLatency any more since r184032. Reviewers: atrick, hfinkel, mcrosier Differential Revision: http://reviews.llvm.org/D19474 llvm-svn: 267502
* PM: Port GlobalOpt to the new pass managerJustin Bogner2016-04-262-1/+33
| | | | llvm-svn: 267499
* Add check for "branch_weights" with prof metadataSanjay Patel2016-04-251-3/+4
| | | | | | | While we're here, fix the comment and variable names to make it clear that these are raw weights, not percentages. llvm-svn: 267491
* [CMake] If set we should pass LLVM_VERSION_INFO into config.hChris Bieneman2016-04-251-0/+3
| | | | | | | | Autoconf used to support setting LLVM_VERSION_INFO and there is some code filtered around llvm in Support/CommandLine.cpp and LTO/LTOCodeGenerator.cpp that uses it if it is set. We also shouldn't be explicitly setting it as a define on llvm-shlib. It is pointless there because there is no code using it in llvm-shlib, and it is better to have it as part of the generated config.h so that it is available everywhere. llvm-svn: 267490
* Comment formating. NFCAmaury Sechet2016-04-251-2/+1
| | | | llvm-svn: 267483
* [ORC] clang-format code that was touched in r267457. NFC.Lang Hames2016-04-254-99/+80
| | | | | | | Commit r267457 made a lot of type-substitutions threw off code formatting and alignment. This patch should tidy those changes up. llvm-svn: 267475
* ARM: put extern __thread stubs in a special section.Tim Northover2016-04-252-0/+17
| | | | | | | The linker needs to know that the symbols are thread-local to do its job properly. llvm-svn: 267473
* [ThinLTO] Introduce typedef for commonly-used map type (NFC)Teresa Johnson2016-04-252-8/+9
| | | | | | | | Add a typedef for the std::map<GlobalValue::GUID, GlobalValueSummary *> map that is passed around to identify summaries for values defined in a particular module. This shortens up declarations in a variety of places. llvm-svn: 267471
* [ORC] Thread Error/Expected through the RPC library.Lang Hames2016-04-259-456/+505
| | | | | | | | | | This replaces use of std::error_code and ErrorOr in the ORC RPC support library with Error and Expected. This required updating the OrcRemoteTarget API, Client, and server code, as well as updating the Orc C API. This patch also fixes several instances where Errors were dropped. llvm-svn: 267457
* AMDGPU: Add queue ptr intrinsicMatt Arsenault2016-04-251-0/+4
| | | | llvm-svn: 267451
* Add useful helpers to AddrSpaceCastInstMatt Arsenault2016-04-251-0/+25
| | | | llvm-svn: 267450
* [Support] Fix latent bugs in Expected and ExitOnError that were preventing themLang Hames2016-04-251-3/+10
| | | | | | from working with reference types. llvm-svn: 267448
* Resubmit "Refactor raw pdb dumper into library"Zachary Turner2016-04-255-32/+183
| | | | | | | This fixes a number of endianness issues as well as an ODR violation that hopefully causes everything to be happy. llvm-svn: 267431
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