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* Remove doesSectionRequireSymbols.Rafael Espindola2014-12-304-19/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | In an assembly expression like bar: .long L0 + 1 the intended semantics is that bar will contain a pointer one byte past L0. In sections that are merged by content (strings, 4 byte constants, etc), a single position in the section doesn't give the linker enough information. For example, it would not be able to tell a relocation must point to the end of a string, since that would look just like the start of the next. The solution used in ELF to use relocation with symbols if there is a non-zero addend. In MachO before this patch we would just keep all symbols in some sections. This would miss some cases (only cstrings on x86_64 were implemented) and was inefficient since most relocations have an addend of 0 and can be represented without the symbol. This patch implements the non-zero addend logic for MachO too. llvm-svn: 224985
* Add IRBuilder routines for gc.statepoints, gc.results, and gc.relocatesPhilip Reames2014-12-301-0/+22
| | | | | | | | | | Nothing particularly interesting, just adding infrastructure for use by in tree users and out of tree users. Note: These were extracted out of a working frontend, but they have not been well tested in isolation. Differential Revision: http://reviews.llvm.org/D6807 llvm-svn: 224981
* Carry facts about nullness and undef across GC relocationPhilip Reames2014-12-291-2/+2
| | | | | | | | | | | | | | | This change implements four basic optimizations: If a relocated value isn't used, it doesn't need to be relocated. If the value being relocated is null, relocation doesn't change that. (Technically, this might be collector specific. I don't know of one which it doesn't work for though.) If the value being relocated is undef, the relocation is meaningless. If the value being relocated was known nonnull, the relocated pointer also isn't null. (Since it points to the same source language object.) I outlined other planned work in comments. Differential Revision: http://reviews.llvm.org/D6600 llvm-svn: 224968
* Add segmented stack support for DragonFlyBSD.Rafael Espindola2014-12-291-0/+2
| | | | | | Patch by Michael Neumann. llvm-svn: 224936
* Refactor duplicated code.Rafael Espindola2014-12-295-17/+7
| | | | | | No intended functionality change. llvm-svn: 224935
* [multilib] Add support to the autoconf build to substituteChandler Carruth2014-12-291-0/+3
| | | | | | | | | | | | a CLANG_LIBDIR_SUFFIX variable. This is necessary before I can add support for using that variable to CMake and the C++ code in Clang, and the autoconf build system does all substitutions in the LLVM tree. As mentioned before, I'm not planning to add actual multilib support to the autoconf build, just enough stubs for it to keep playing nicely with the CMake build once that one has support. llvm-svn: 224922
* [CodeGenPrepare] Teach when it is profitable to speculate calls to ↵Andrea Di Biagio2014-12-281-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | @llvm.cttz/ctlz. If the control flow is modelling an if-statement where the only instruction in the 'then' basic block (excluding the terminator) is a call to cttz/ctlz, CodeGenPrepare can try to speculate the cttz/ctlz call and simplify the control flow graph. Example: \code entry: %cmp = icmp eq i64 %val, 0 br i1 %cmp, label %end.bb, label %then.bb then.bb: %c = tail call i64 @llvm.cttz.i64(i64 %val, i1 true) br label %end.bb end.bb: %cond = phi i64 [ %c, %then.bb ], [ 64, %entry] \code In this example, basic block %then.bb is taken if value %val is not zero. Also, the phi node in %end.bb would propagate the size-of in bits of %val only if %val is equal to zero. With this patch, CodeGenPrepare will try to hoist the call to cttz from %then.bb into basic block %entry only if cttz is cheap to speculate for the target. Added two new hooks in TargetLowering.h to let targets customize the behavior (i.e. decide whether it is cheap or not to speculate calls to cttz/ctlz). The two new methods are 'isCheapToSpeculateCtlz' and 'isCheapToSpeculateCttz'. By default, both methods return 'false'. On X86, method 'isCheapToSpeculateCtlz' returns true only if the target has LZCNT. Method 'isCheapToSpeculateCttz' only returns true if the target has BMI. Differential Revision: http://reviews.llvm.org/D6728 llvm-svn: 224899
* Masked Load/Store - Changed the order of parameters in intrinsics.Elena Demikhovsky2014-12-252-6/+7
| | | | | | | No functional changes. The documentation is coming. llvm-svn: 224829
* MC: Label definitions are permitted after .set directivesDavid Majnemer2014-12-241-1/+17
| | | | | | | | | .set directives may be overridden by other .set directives as well as label definitions. This fixes PR22019. llvm-svn: 224811
* LiveInterval: Introduce createMainRangeFromSubranges().Matthias Braun2014-12-241-0/+8
| | | | | | | | | | | | | | | | | | | | This function constructs the main liverange by merging all subranges if subregister liveness tracking is available. This should be slightly faster to compute instead of performing the liveness calculation again for the main range. More importantly it avoids cases where the main liverange would cover positions where no subrange was live. These cases happened for partial definitions where the actual defined part was dead and only the undefined parts used later. The register coalescing requires that every part covered by the main live range has at least one subrange live. I also expect this function to become usefull later for places where the subranges are modified in a way that it is hard to correctly fix the main liverange in the machine scheduler, we can simply reconstruct it from subranges then. llvm-svn: 224806
* Another attempt to fix the LLVM Windows build bot lld-x86_64-win7, one last ↵Kevin Enderby2014-12-241-17/+17
| | | | | | place to fix I think. llvm-svn: 224794
* Attempt to fix the LLVM Windows build bot lld-x86_64-win7.Kevin Enderby2014-12-231-9/+9
| | | | llvm-svn: 224793
* Add printing the LC_THREAD load commands with llvm-objdump’s -private-headers.Kevin Enderby2014-12-232-0/+263
| | | | llvm-svn: 224792
* Finish removing DestroySource.Rafael Espindola2014-12-231-8/+1
| | | | | | Fixes pr21901. llvm-svn: 224782
* DIBuilder: Similar to createPointerType, make createMemberPointerType takeAdrian Prantl2014-12-231-1/+5
| | | | | | | | | a size and alignment. Several assertions in DwarfDebug rely on all variable types to report back a size, or to be derived from a type with a size. Tested in CFE. llvm-svn: 224780
* AVX-512: Added FMA instructions, intrinsics an tests for KNL and SKX targetsElena Demikhovsky2014-12-231-0/+120
| | | | | | | | by Asaf Badouh http://reviews.llvm.org/D6456 llvm-svn: 224764
* Fix UBSan bootstrap: don't bind reference to nullptr.Alexey Samsonov2014-12-231-2/+4
| | | | llvm-svn: 224751
* Make musttail more robust for vector types on x86Reid Kleckner2014-12-221-0/+23
| | | | | | | | | | | | | | | | Previously I tried to plug musttail into the existing vararg lowering code. That turned out to be a mistake, because non-vararg calls use significantly different register lowering, even on x86. For example, AVX vectors are usually passed in registers to normal functions and memory to vararg functions. Now musttail uses a completely separate lowering. Hopefully this can be used as the basis for non-x86 perfect forwarding. Reviewers: majnemer Differential Revision: http://reviews.llvm.org/D6156 llvm-svn: 224745
* [LCSSA] Handle PHI insertion in disjoint loopsBruno Cardoso Lopes2014-12-221-2/+3
| | | | | | | | | | | | | | | | | | | | Take two disjoint Loops L1 and L2. LoopSimplify fails to simplify some loops (e.g. when indirect branches are involved). In such situations, it can happen that an exit for L1 is the header of L2. Thus, when we create PHIs in one of such exits we are also inserting PHIs in L2 header. This could break LCSSA form for L2 because these inserted PHIs can also have uses in L2 exits, which are never handled in the current implementation. Provide a fix for this corner case and test that we don't assert/crash on that. Differential Revision: http://reviews.llvm.org/D6624 rdar://problem/19166231 llvm-svn: 224740
* Add a C++ marker to this header file.Adrian Prantl2014-12-221-1/+1
| | | | llvm-svn: 224721
* [C API] Expose LLVMGetGlobalValueAddress and LLVMGetFunctionAddress.Peter Zotov2014-12-221-0/+4
| | | | | | Patch by Ramkumar Ramachandra <artagnon@gmail.com> llvm-svn: 224720
* AVX-512: Added all forms of BLENDM instructions,Elena Demikhovsky2014-12-221-0/+58
| | | | | | intrinsics, encoding tests for AVX-512F and skx instructions. llvm-svn: 224707
* The leak detector is dead, long live asan and valgrind.Rafael Espindola2014-12-221-95/+0
| | | | | | | In resent times asan and valgrind have found way more memory management bugs in llvm than the special purpose leak detector. llvm-svn: 224703
* InstSimplify: Optimize away pointless comparisonsDavid Majnemer2014-12-201-0/+7
| | | | | | | | | (X & INT_MIN) ? X & INT_MAX : X into X & INT_MAX (X & INT_MIN) ? X : X & INT_MAX into X (X & INT_MIN) ? X | INT_MIN : X into X (X & INT_MIN) ? X : X | INT_MIN into X | INT_MIN llvm-svn: 224669
* Add printing the LC_ROUTINES load commands with llvm-objdump’s ↵Kevin Enderby2014-12-192-0/+30
| | | | | | -private-headers. llvm-svn: 224627
* Add the ExceptionHandling::MSVC enumerationReid Kleckner2014-12-191-0/+6
| | | | | | | | | | | | | | | It is intended to be used for a family of personality functions that have similar IR preparation requirements. Typically when interoperating with MSVC personality functions, bits of functionality need to be outlined from the main function into helper functions. There is also usually more than one landing pad per invoke, which does not match the LLVM IR landingpad representation. None of this is implemented yet. This change just adds a new enum that is active for *-windows-msvc and delegates to the EH removal preparation pass. No functionality change for other targets. llvm-svn: 224625
* Update SmallPtrSet::insert's doc comment to match the new return typeDavid Blaikie2014-12-191-2/+4
| | | | llvm-svn: 224619
* Add printing the LC_SUB_CLIENT load command with llvm-objdump’s ↵Kevin Enderby2014-12-192-0/+8
| | | | | | -private-headers. llvm-svn: 224616
* CodeGen: do not attempt to invalidate virtual registers for zero-sized phis.Peter Collingbourne2014-12-191-0/+3
| | | | llvm-svn: 224615
* Add printing the LC_SUB_LIBRARY load command with llvm-objdump’s ↵Kevin Enderby2014-12-192-0/+8
| | | | | | -private-headers. llvm-svn: 224607
* [DebugInfo] Move all DWARF headers to the public include directory.Frederic Riss2014-12-1916-0/+1582
| | | | | | | | | | dsymutil needs access to DWARF specific inforamtion, the small DIContext wrapper isn't sufficient. Other DWARF consumers might want to use it too (I'm looking at you lldb). Differential Revision: http://reviews.llvm.org/D6694 llvm-svn: 224594
* Rename MapValue(Metadata*) to MapMetadata()Duncan P. N. Exon Smith2014-12-191-10/+10
| | | | | | | | Instead of reusing the name `MapValue()` when mapping `Metadata`, use `MapMetadata()`. The old name doesn't make much sense after the `Metadata`/`Value` split. llvm-svn: 224566
* Remove an extra ';' on line 1120 include/llvm/Support/MachO.h .Kevin Enderby2014-12-181-1/+1
| | | | | | Caught by Mike Edwards! llvm-svn: 224551
* Add printing the LC_SUB_UMBRELLA load command with llvm-objdump’s ↵Kevin Enderby2014-12-182-0/+8
| | | | | | -private-headers. llvm-svn: 224548
* [NFC] Removing extra semicolon. Colin LeMahieu2014-12-181-1/+1
| | | | llvm-svn: 224539
* LiveIntervalAnalysis: Cleanup computeDeadValuesMatthias Braun2014-12-182-11/+15
| | | | | | | | | - This also fixes a bug introduced in r223880 where values were not correctly marked as Dead anymore. - Cleanup computeDeadValues(): split up SubRange code variant, simplify arguments. llvm-svn: 224538
* Add printing the LC_SUB_FRAMEWORK load command with llvm-objdump’s ↵Kevin Enderby2014-12-182-0/+8
| | | | | | -private-headers. llvm-svn: 224534
* Modernize the getStreamedBitcodeModule interface a bit. NFC.Rafael Espindola2014-12-182-11/+7
| | | | llvm-svn: 224499
* Add a new string member to the TargetOptions struct for the nameEric Christopher2014-12-182-1/+14
| | | | | | | | | | | | | of the abi we should be using. For targets that don't use the option there's no change, otherwise this allows external users to set the ABI via string and avoid some of the -backend-option pain in clang. Use this option to move the ABI for the ARM port from the Subtarget to the TargetMachine and update the testcases accordingly since it's no longer valid to set via -mattr. llvm-svn: 224492
* IR: Make DICompositeType mutators privateDuncan P. N. Exon Smith2014-12-181-0/+8
| | | | | | | | | | | Make `DICompositeType` mutators private to prevent misuse. All calls to `setArrays()` and `setContainingType()` should go through `DIBuilder::replaceArrays()` and `DIBuilder::replaceVTableHolder()`. This is a follow-up to r224482 (now that clang has been updated in r224483). llvm-svn: 224486
* Add printing the LC_LINKER_OPTION load command with llvm-objdump’s ↵Kevin Enderby2014-12-182-5/+5
| | | | | | | | | | -private-headers. Also corrected the name of the load command to not end in an ’S’ as well as corrected the name of the MachO::linker_option_command struct and other places that had the word option as plural which did not match the Mac OS X headers. llvm-svn: 224485
* IR: Handle self-referencing DICompositeTypes in DIBuilderDuncan P. N. Exon Smith2014-12-181-0/+14
| | | | | | | | | | | | | | | | | | | | Add API to DIBuilder to handle self-referencing `DICompositeType`s. Self-references aren't expected in the debug info graph, and we take advantage of that by only calling `resolveCycles()` on nodes that were once forward declarations (otherwise, DIBuilder needs an expensive tracking reference to every unresolved node it creates, which in cyclic graphs is *all of them*). However, clang seems to create self-referencing `DICompositeType`s. Add API to manage this safely. The paired commit to clang will include the regression test. I'll make the `DICompositeType` API `private` in a follow-up to prevent misuse (I've separated that to prevent build failures from missing the clang commit). llvm-svn: 224482
* Random Number Generator Refactoring (removing from Module)JF Bastien2014-12-172-22/+29
| | | | | | | | | | This patch removes the RNG from Module. Passes should instead create a new RNG for their use as needed. Patch by Stephen Crane @rinon. Differential revision: http://reviews.llvm.org/D4377 llvm-svn: 224444
* [DAGCombine] Slightly improve lowering of BUILD_VECTOR into a shuffle.Michael Kuperstein2014-12-171-0/+9
| | | | | | | | | | This handles the case of a BUILD_VECTOR being constructed out of elements extracted from a vector twice the size of the result vector. Previously this was always scalarized. Now, we try to construct a shuffle node that feeds on extract_subvectors. This fixes PR15872 and provides a partial fix for PR21711. Differential Revision: http://reviews.llvm.org/D6678 llvm-svn: 224429
* [mips] Set GCC-compatible MIPS asssembler options before inline asm blocks.Toma Tabacu2014-12-171-0/+4
| | | | | | | | | | | | | | | | | | | | Summary: When generating MIPS assembly, LLVM always overrides the default assembler options by emitting the '.set noreorder', '.set nomacro' and '.set noat' directives, while GCC uses the default options if an assembly-level function contains inline assembly code. This becomes a problem when the code generated by LLVM is interleaved with inline assembly which assumes GCC-like assembler options (from Linux, for example). This patch fixes these conflicts by setting the appropriate assembler options at the beginning of an inline asm block and popping them at the end. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D6637 llvm-svn: 224425
* [CodeGenPrepare] Reapply r224351 with a fix for the assertion failure:Quentin Colombet2014-12-171-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The type promotion helper does not support vector type, so when make such it does not kick in in such cases. Original commit message: [CodeGenPrepare] Move sign/zero extensions near loads using type promotion. This patch extends the optimization in CodeGenPrepare that moves a sign/zero extension near a load when the target can combine them. The optimization may promote any operations between the extension and the load to make that possible. Although this optimization may be beneficial for all targets, in particular AArch64, this is enabled for X86 only as I have not benchmarked it for other targets yet. ** Context ** Most targets feature extended loads, i.e., loads that perform a zero or sign extension for free. In that context it is interesting to expose such pattern in CodeGenPrepare so that the instruction selection pass can form such loads. Sometimes, this pattern is blocked because of instructions between the load and the extension. When those instructions are promotable to the extended type, we can expose this pattern. ** Motivating Example ** Let us consider an example: define void @foo(i8* %addr1, i32* %addr2, i8 %a, i32 %b) { %ld = load i8* %addr1 %zextld = zext i8 %ld to i32 %ld2 = load i32* %addr2 %add = add nsw i32 %ld2, %zextld %sextadd = sext i32 %add to i64 %zexta = zext i8 %a to i32 %addza = add nsw i32 %zexta, %zextld %sextaddza = sext i32 %addza to i64 %addb = add nsw i32 %b, %zextld %sextaddb = sext i32 %addb to i64 call void @dummy(i64 %sextadd, i64 %sextaddza, i64 %sextaddb) ret void } As it is, this IR generates the following assembly on x86_64: [...] movzbl (%rdi), %eax # zero-extended load movl (%rsi), %es # plain load addl %eax, %esi # 32-bit add movslq %esi, %rdi # sign extend the result of add movzbl %dl, %edx # zero extend the first argument addl %eax, %edx # 32-bit add movslq %edx, %rsi # sign extend the result of add addl %eax, %ecx # 32-bit add movslq %ecx, %rdx # sign extend the result of add [...] The throughput of this sequence is 7.45 cycles on Ivy Bridge according to IACA. Now, by promoting the additions to form more extended loads we would generate: [...] movzbl (%rdi), %eax # zero-extended load movslq (%rsi), %rdi # sign-extended load addq %rax, %rdi # 64-bit add movzbl %dl, %esi # zero extend the first argument addq %rax, %rsi # 64-bit add movslq %ecx, %rdx # sign extend the second argument addq %rax, %rdx # 64-bit add [...] The throughput of this sequence is 6.15 cycles on Ivy Bridge according to IACA. This kind of sequences happen a lot on code using 32-bit indexes on 64-bit architectures. Note: The throughput numbers are similar on Sandy Bridge and Haswell. ** Proposed Solution ** To avoid the penalty of all these sign/zero extensions, we merge them in the loads at the beginning of the chain of computation by promoting all the chain of computation on the extended type. The promotion is done if and only if we do not introduce new extensions, i.e., if we do not degrade the code quality. To achieve this, we extend the existing “move ext to load” optimization with the promotion mechanism introduced to match larger patterns for addressing mode (r200947). The idea of this extension is to perform the following transformation: ext(promotableInst1(...(promotableInstN(load)))) => promotedInst1(...(promotedInstN(ext(load)))) The promotion mechanism in that optimization is enabled by a new TargetLowering switch, which is off by default. In other words, by default, the optimization performs the “move ext to load” optimization as it was before this patch. ** Performance ** Configuration: x86_64: Ivy Bridge fixed at 2900MHz running OS X 10.10. Tested Optimization Levels: O3/Os Tests: llvm-testsuite + externals. Results: - No regression beside noise. - Improvements: CINT2006/473.astar: ~2% Benchmarks/PAQ8p: ~2% Misc/perlin: ~3% The results are consistent for both O3 and Os. <rdar://problem/18310086> llvm-svn: 224402
* Add printing the LC_ENCRYPTION_INFO_64 load command with llvm-objdump’s ↵Kevin Enderby2014-12-172-1/+21
| | | | | | | | -private-headers and add tests for the two AArch64 binaries. llvm-svn: 224400
* Revert "[CodeGenPrepare] Move sign/zero extensions near loads using type ↵Reid Kleckner2014-12-171-8/+0
| | | | | | | | | promotion." This reverts commit r224351. It causes assertion failures when building ICU. llvm-svn: 224397
* Add printing the LC_ENCRYPTION_INFO load command with llvm-objdump’s ↵Kevin Enderby2014-12-162-0/+10
| | | | | | -private-headers. llvm-svn: 224390
* Move lowerConstant to AsmPrinterMatt Arsenault2014-12-161-0/+4
| | | | | | | This was a static function before, and NVPTX duplicated it because it wasn't exposed. llvm-svn: 224354
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