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* Provide an ARMCCState subclass of CCState so that ARM clients will always setCameron Zwarich2011-06-101-1/+4
| | | | | | CallOrPrologue correctly and eliminate the existing setter. llvm-svn: 132856
* Rename the ParmContext enum values to make a bit more sense and add a smallCameron Zwarich2011-06-101-1/+4
| | | | | | comment on their meaning. llvm-svn: 132854
* Remove tabs.Cameron Zwarich2011-06-101-2/+2
| | | | llvm-svn: 132853
* Fix example code in comment.Richard Osborne2011-06-101-2/+2
| | | | llvm-svn: 132844
* Fix emission of PPC64 assembler on non-darwin platforms by splittingRoman Divacky2011-06-091-2/+4
| | | | | | | | VK_PPC_{HA,LO}16 into darwin and gas variants. Darwin wants {ha,lo}16(symbol) while gnu as wants symbol@{ha,l}. llvm-svn: 132802
* Teach the CallGraph to ignore calls to intrinsics.John McCall2011-06-091-0/+3
| | | | llvm-svn: 132797
* Add a parameter to CCState so that it can access the MachineFunction.Eric Christopher2011-06-082-3/+8
| | | | | | | | No functional change. Part of PR6965 llvm-svn: 132763
* Switched to DenseMap for allowed sets in PBQP. Reduces total LLC time by 15% ↵Lang Hames2011-06-071-1/+1
| | | | | | on CINT2006 for x86-32. llvm-svn: 132707
* Basic support for macros with explicit arguments.Rafael Espindola2011-06-051-0/+1
| | | | | | | | | | | We still don't handle * default values * :req * :vararg * \() llvm-svn: 132656
* Cast unused parameter to void.Hans Wennborg2011-06-041-0/+1
| | | | llvm-svn: 132641
* New BranchProbabilityInfo analysis. Patch by Jakub Staszak!Andrew Trick2011-06-042-0/+69
| | | | | | | | | | | BranchProbabilityInfo provides an interface for IR passes to query the likelihood that control follows a CFG edge. This patch provides an initial implementation of static branch predication that will populate BranchProbabilityInfo for branches with no external profile information using very simple heuristics. It currently isn't hooked up to any external profile data, so static prediction does all the work. llvm-svn: 132613
* Fix BasicAA's recursion detection so that it doesn't pessimizeDan Gohman2011-06-041-0/+27
| | | | | | | | | queries in the case of a DAG, where a query reaches a node visited earlier, but it's not on a cycle. This avoids MayAlias results in cases where BasicAA is expected to return MustAlias or PartialAlias in order to protect TBAA. llvm-svn: 132609
* A typedef's context is not the same as type's context. It is the context of ↵Devang Patel2011-06-031-1/+2
| | | | | | typedef decl itself. Use extra parameter to communicate this to DIBuilder. llvm-svn: 132556
* Treat Win64 EH as a DWARF EH scheme. For GCC-style exceptions, the layout ofCharles Davis2011-06-031-1/+2
| | | | | | | the handler's data area is similar to a DWARF-format LSDA. (It is, in fact, a 32-bit pointer to the personality routine followed by the DWARF LSDA.) llvm-svn: 132532
* Have LowerOperandForConstraint handle multiple character constraints.Eric Christopher2011-06-021-1/+1
| | | | | | Part of rdar://9119939 llvm-svn: 132510
* Make it possible to have unallocatable register classes.Jakob Stoklund Olesen2011-06-022-2/+14
| | | | | | | | | | | | | | | Some register classes are only used for instruction operand constraints. They should never be used for virtual registers. Previously, those register classes were given an empty allocation order, but now you can say 'let isAllocatable=0' in the register class definition. TableGen calculates if a register is part of any allocatable register class, and makes that information available in TargetRegisterDesc::inAllocatableClass. The goal here is to eliminate use cases for overriding allocation_order_* methods. llvm-svn: 132508
* Remove dead code.Devang Patel2011-06-021-1/+0
| | | | llvm-svn: 132488
* Don't hardcode the %reg format in the streamer.Rafael Espindola2011-06-021-2/+2
| | | | llvm-svn: 132451
* Typos.Chad Rosier2011-06-012-2/+2
| | | | llvm-svn: 132437
* Initialize IssueWidth to zero.Benjamin Kramer2011-06-011-1/+2
| | | | | | Fixes valgrind errors in the CellSPU backend. llvm-svn: 132405
* Fix PR10059 and future variations by handling all register subclasses.Jakob Stoklund Olesen2011-06-011-0/+12
| | | | | | | | Add TargetRegisterInfo::hasSubClassEq and use it to check for compatible register classes instead of trying to list all register classes in X86's getLoadStoreRegOpcode. llvm-svn: 132398
* Add new -d option to tblgen. It writes a make(1)-style dependency file.Joerg Sonnenberger2011-06-011-1/+3
| | | | llvm-svn: 132395
* This patch is another step in the direction of adding vector select. In thisNadav Rotem2011-06-011-4/+56
| | | | | | | | | patch we add a flag to enable a new type legalization decision - to promote integer elements in vectors. Currently, the rest of the codegen does not support this kind of legalization. This flag will be removed when the transition is complete. llvm-svn: 132394
* FGETSIGN support for x86, using movmskps/pd. Will be enabled with aStuart Hastings2011-06-011-0/+1
| | | | | | patch to TargetLowering.cpp. rdar://problem/5660695 llvm-svn: 132388
* llvm.memcpy.* has two distinct associated address spaces; the source address ↵Eli Friedman2011-05-311-1/+5
| | | | | | space, and the destination address space. Fix up the interface on MemIntrinsic and MemTransferInst to make this clear, and fix InstructionDereferencesPointer in LazyValueInfo.cpp to use the interface properly. llvm-svn: 132356
* Fix 80 column violations.Richard Osborne2011-05-311-1/+3
| | | | llvm-svn: 132341
* Add XCore intrinsic for crc8.Richard Osborne2011-05-311-0/+3
| | | | llvm-svn: 132340
* Add XCore intrinsic for crc32.Richard Osborne2011-05-311-0/+1
| | | | llvm-svn: 132336
* Introduce PackedVector, useful for storing a vector of values using a ↵Argyrios Kyrtzidis2011-05-311-0/+158
| | | | | | | | | | | | specific number of bits for each value. Both signed and unsigned types can be used, e.g PackedVector<signed, 2> vec; will create a vector accepting values -2, -1, 0, 1. Any other value will hit an assertion. llvm-svn: 132325
* Use the dwarf->llvm mapping to print register names in the cfiRafael Espindola2011-05-302-0/+6
| | | | | | | | directives. Fixes PR9826. llvm-svn: 132317
* Introduce the DwarfRegAlias class for declaring that two registers have theRafael Espindola2011-05-301-0/+8
| | | | | | | | | | same dwarf number. This will be used for creating a dwarf number to register mapping. The only case that needs this so far is the XMM/YMM registers that unfortunately do have the same numbers. llvm-svn: 132314
* ...this is not a good commit day for me.John McCall2011-05-291-1/+0
| | | | llvm-svn: 132294
* On Darwin ARM, set the UNWIND_RESUME libcall to _Unwind_SjLj_Resume.John McCall2011-05-291-0/+1
| | | | | | | This is important for the correct lowering of unwind instructions (which doesn't matter at all) and llvm.eh.resume calls (which does). llvm-svn: 132291
* Refactor the type legalizer. Switch TargetLowering to a new enum - ↵Nadav Rotem2011-05-281-20/+36
| | | | | | | | | | | LegalizeTypeAction. This patch does not change the behavior of the type legalizer. The codegen produces the same code. This infrastructural change is needed in order to enable complex decisions for vector types (needed by the vector-select patch). llvm-svn: 132263
* Change how tblgen generates attributes for intrinsics to use a singleJohn McCall2011-05-281-0/+4
| | | | | | | | | switch. With this newfound organization, teach tblgen how not to give all intrinsics the 'nounwind' attribute. Introduce a new intrinsic, llvm.eh.resume, which does not have this attribute. Documentation and uses to follow. llvm-svn: 132252
* When generating code for Win64 EH, emit StartProc and EndProc directives.Charles Davis2011-05-281-0/+2
| | | | llvm-svn: 132250
* Add support for ARM ldrexd/strexd intrinsics. They both use i32 register pairsBruno Cardoso Lopes2011-05-281-0/+10
| | | | | | | | to load/store i64 values. Since there's no current support to explicitly declare such restrictions, implement it by using specific hardcoded register pairs during isel. llvm-svn: 132248
* Stub out support for Win64-style exceptions. Note that this is merely usingCharles Davis2011-05-271-3/+3
| | | | | | | the Win64 EH mechanism to implement GCC-style exceptions. LLVM supports hardly anything else at this point! llvm-svn: 132234
* Make size computation less brittle.Rafael Espindola2011-05-271-4/+0
| | | | llvm-svn: 132222
* Add the suffix to the Win64 EH data sections' names if given. Add a test forCharles Davis2011-05-271-6/+2
| | | | | | this. XFAIL'd, because the COFF AsmParser can't handle .section yet. llvm-svn: 132220
* Refactor getActionType and getTypeToTransformTo ; place all of the 'decision'Nadav Rotem2011-05-271-86/+78
| | | | | | code in one place. Re-apply 131534 and fix the multi-step promotion of integers. llvm-svn: 132217
* Add a parameter to the Win64 EH section getters to get a section with aCharles Davis2011-05-274-12/+20
| | | | | | | | | | suffix (e.g. .xdata$myfunc). The suffix part isn't implemented yet, but I'll get to it in the next patch. Fix up all callers of the affected functions. Make them pass said suffix to the function. llvm-svn: 132205
* Start keeping track of where the various unwind instructions are in the prolog.Charles Davis2011-05-271-10/+11
| | | | | | | Use them to calculate the offset inside the prolog. Emit this value when emitting the unwind codes. llvm-svn: 132177
* Renamed llvm.x86.sse42.crc32 intrinsics; crc64 doesn't exist. Chad Rosier2011-05-261-5/+5
| | | | | | | crc32.[8|16|32] have been renamed to .crc32.32.[8|16|32] and crc64.[8|16|32] have been renamed to .crc32.64.[8|64]. llvm-svn: 132163
* Comment cleanup.Eric Christopher2011-05-261-2/+2
| | | | llvm-svn: 132162
* Fix definitions of UOP_SaveXMM128, UOP_SaveXMM128Big, and UOP_PushMachFrameCharles Davis2011-05-261-1/+1
| | | | | | to match Microsoft's definitions. llvm-svn: 132112
* Test .seh_startchained and .seh_endchained parsing.Charles Davis2011-05-261-2/+2
| | | | | | | | | | | Rework how the MCWin64EHUnwindInfo instances are stored. Fix issues with chained unwind areas exposed by the test that were related to this. The ChainedParent field had the wrong address, because when the chained unwind info was added, the addresses shifted around. Now we store the pointers to the structures, which are now allocated from the MC heap. llvm-svn: 132106
* Add tests for .seh_setframe and .seh_handlerdata parsing. Fix issues withCharles Davis2011-05-251-0/+11
| | | | | | | | | | them. I had to add a special SwitchSectionNoChange method to MCStreamer just for .seh_handlerdata. If this isn't OK, please let me know, and I'll find some other way to fix .seh_handlerdata streaming. llvm-svn: 132084
* Fix some issues Duncan found in the previous commit.Rafael Espindola2011-05-252-4/+5
| | | | | | | | I kept the reference to the ABI since that is the common case. The -fno-asynchronous-unwind-tables option is a user controlled way of breaking the ABI. llvm-svn: 132053
* Fix warning in the CMake build about redefining LLVM_PATH_XDOT_PY by making ↵Frits van Bommel2011-05-251-1/+1
| | | | | | | | | | | | | | | | | | | sure both definitions are identical. This used to produce warnings like In file included from .../llvm/trunk/tools/lto/LTOCodeGenerator.cpp:45: In file included from .../llvm/trunk/include/llvm/Support/system_error.h:225: .../include/llvm/Config/config.h:591:9: warning: 'LLVM_PATH_XDOT_PY' macro redefined #define LLVM_PATH_XDOT_PY ".../bin/xdot.py" ^ .../include/llvm/Config/llvm-config.h:98:9: note: previous definition is here #define LLVM_PATH_XDOT_PY "" ^ 1 warning generated. (Paths edited for clarity) Note: This only affected people who had xdot.py installed. llvm-svn: 132050
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