| Commit message (Collapse) | Author | Age | Files | Lines |
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- Remove PTX 1.4 code generation
- Change type of intrinsics to .v4.i32 instead of .v4.i16
- Add and/or/xor integer instructions
llvm-svn: 127677
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nothing more than a bitcast.
- Teach tablegen to automatically infer "Bitcast" property.
llvm-svn: 127667
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doesn't return, so just go back to using the old runtime function instead
of trying to use abort() when __builtin_unreachable (or an equivalent) isn't
supported.
llvm-svn: 127629
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llvm-svn: 127620
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Use the opportunity to get rid of the trailing underscore variable names.
llvm-svn: 127618
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where none was before. Just don't declare it and hope it's declared
in every translation unit that needs it.
llvm-svn: 127612
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llvm-svn: 127610
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builds, which was the apparent consensus of PR8973 and llvmdev.
llvm-svn: 127608
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properties.
Added the self-wrap flag for SCEV::AddRecExpr.
A slew of temporary FIXMEs indicate the intention of the no-self-wrap flag
without changing behavior in this revision.
llvm-svn: 127590
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llvm-svn: 127576
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llvm-gcc-i386-linux-selfhost and llvm-x86_64-linux-checks buildbots.
The original log entry:
Remove optimization emitting a reference insted of label difference, since
it can create more relocations. Removed isBaseAddressKnownZero method,
because it is no longer used.
llvm-svn: 127540
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llvm-svn: 127496
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llvm-svn: 127495
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llvm-svn: 127493
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it can create more relocations. Removed isBaseAddressKnownZero method, because it is no longer used.
llvm-svn: 127478
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llvm-svn: 127417
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llvm-svn: 127413
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support for creating buffers that cover only a part of a file.
llvm-svn: 127409
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llvm-svn: 127397
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SmallVectors.
llvm-svn: 127388
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treating debugging information.
It generates output that lools like
8 times line number info lost by Scalar Replacement of Aggregates (SSAUp)
1 times line number info lost by Simplify well-known library calls
12 times variable info lost by Jump Threading
llvm-svn: 127381
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llvm-svn: 127380
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llvm-svn: 127376
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cross-regclass copies.
llvm-svn: 127371
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flexible.
If it returns a register class that's different from the input, then that's the
register class used for cross-register class copies.
If it returns a register class that's the same as the input, then no cross-
register class copies are needed (normal copies would do).
If it returns null, then it's not at all possible to copy registers of the
specified register class.
llvm-svn: 127368
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construction of non-standard ELFObjectWriters that can be used in MCJIT.
llvm-svn: 127346
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MCAssembler * argument.
llvm-svn: 127343
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llvm-svn: 127341
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llvm-svn: 127256
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llvm-svn: 127252
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llvm-svn: 127246
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llvm-svn: 127192
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llvm-svn: 127186
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llvm-svn: 127175
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about possibly swapped memset parameters. Avoid the warning.
llvm-svn: 127170
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llvm-svn: 127169
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type.
llvm-svn: 127163
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llvm-svn: 127153
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instead of a runtime check.
llvm-svn: 127145
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the value splatted into every element. Extend this to getTrue and getFalse which
by providing new overloads that take Types that are either i1 or <N x i1>. Use
it in InstCombine to add vector support to some code, fixing PR8469!
llvm-svn: 127116
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llvm-svn: 127110
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This is just very first approximation how the stuff should be done
(e.g. ARM-only for now). More to follow.
llvm-svn: 127101
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llvm-svn: 127100
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mode".
llvm-svn: 127099
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llvm-svn: 127098
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llvm-svn: 127097
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This makes lookup slightly more expensive but it's worth it, unused
DenseMaps are common in LLVM code apparently.
1% speedup on clang -O3 bzip2.c
4% speedup on clang -O3 oggenc.c (Release build of clang on i386/linux)
llvm-svn: 127088
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llvm-svn: 127084
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llvm-svn: 127070
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regs. This is the only change in this checkin that may affects the
default scheduler. With better register tracking and heuristics, it
doesn't make sense to artificially lower the register limit so much.
Added -sched-high-latency-cycles and X86InstrInfo::isHighLatencyDef to
give the scheduler a way to account for div and sqrt on targets that
don't have an itinerary. It is currently defaults to 10 (the actual
number doesn't matter much), but only takes effect on non-default
schedulers: list-hybrid and list-ilp.
Added several heuristics that can be individually disabled for the
non-default sched=list-ilp mode. This helps us determine how much
better we can do on a given benchmark than the default
scheduler. Certain compute intensive loops run much faster in this
mode with the right set of heuristics, and it doesn't seem to have
much negative impact elsewhere. Not all of the heuristics are needed,
but we still need to experiment to decide which should be disabled by
default for sched=list-ilp.
llvm-svn: 127067
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