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* [DWARF] - Refactoring: localize handling of relocations in a single place.George Rimar2017-04-211-0/+5
| | | | | | | | | | | This is splitted from D32228, currently DWARF parsers code has few places that applied relocations values manually. These places has similar duplicated code. Patch introduces separate method that can be used to obtain relocated value. That helps to reduce code and simplifies things. Differential revision: https://reviews.llvm.org/D32284 llvm-svn: 300956
* [BPI] Add multiplication by scalar operators to BranchProbabilitySerguei Katkov2017-04-211-0/+12
| | | | | | | | | | | | | | | This patch just adds two operators to BranchProbability class: (BP * scalar) and (BP *= scalar). Reviewers: junbuml, chandlerc, sanjoy, vsk Reviewed By: chandlerc Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D32334 llvm-svn: 300945
* [AsmWriter/APFloat] FP constant printing: Avoid usage of locale dependent ↵Serguei Katkov2017-04-211-4/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | snprinf This should fix the bug https://bugs.llvm.org/show_bug.cgi?id=12906 To print the FP constant AsmWriter does the following: 1) convert FP value to String (actually using snprintf function which is locale dependent). 2) Convert String back to FP Value 3) Compare original and got FP values. If they are not equal just dump as hex. The problem happens on the 2nd step when APFloat does not expect group delimiter or fraction delimiter other than period symbol and so on, which can be produced on the first step if LLVM library is used in an environment with corresponding locale set. To fix this issue the locale independent APFloat:toString function is used. However it prints FP values slightly differently than snprintf does. Specifically it suppress trailing zeros in significant, use capital E and so on. It results in 117 test failures during make check. To avoid this I've also updated APFloat.toString a bit to pass make check at least. Reviewers: sberg, bogner, majnemer, sanjoy, timshen, rnk Reviewed By: timshen, rnk Subscribers: rnk, llvm-commits Differential Revision: https://reviews.llvm.org/D32276 llvm-svn: 300943
* Revert r300932 and r300930.Akira Hatanaka2017-04-211-31/+22
| | | | | | | | | It seems that r300930 was creating an infinite loop in dag-combine when compling the following file: MultiSource/Benchmarks/MiBench/consumer-typeset/z21.c llvm-svn: 300940
* [AArch64] Improve code generation for logical instructions takingAkira Hatanaka2017-04-211-22/+31
| | | | | | | | | | | | | | | | | | | | immediate operands. This commit adds an AArch64 dag-combine that optimizes code generation for logical instructions taking immediate operands. The optimization uses demanded bits to change a logical instruction's immediate operand so that the immediate can be folded into the immediate field of the instruction. This recommits r300913, which broke bots because I didn't fix a call to ShrinkDemandedConstant in SIISelLowering.cpp after changing the APIs of TargetLoweringOpt and TargetLowering. rdar://problem/18231627 Differential Revision: https://reviews.llvm.org/D5591 llvm-svn: 300930
* Fix typo in commentSanjoy Das2017-04-201-1/+1
| | | | llvm-svn: 300918
* Revert "[AArch64] Improve code generation for logical instructions taking"Akira Hatanaka2017-04-201-31/+22
| | | | | | | | This reverts r300913. This broke bots. llvm-svn: 300916
* [AArch64] Improve code generation for logical instructions takingAkira Hatanaka2017-04-201-22/+31
| | | | | | | | | | | | | | | | immediate operands. This commit adds an AArch64 dag-combine that optimizes code generation for logical instructions taking immediate operands. The optimization uses demanded bits to change a logical instruction's immediate operand so that the immediate can be folded into the immediate field of the instruction. rdar://problem/18231627 Differential Revision: https://reviews.llvm.org/D5591 llvm-svn: 300913
* [Support] Make asan poisoning for recyclers more aggressive by also ↵Benjamin Kramer2017-04-202-6/+4
| | | | | | poisoning the 'next' pointer. llvm-svn: 300882
* Remove stray ^S. NFC.Benjamin Kramer2017-04-201-1/+1
| | | | llvm-svn: 300880
* [DWARF] Fix a couple of typosPaul Robinson2017-04-201-2/+2
| | | | llvm-svn: 300879
* VarStreamArrayIterator needed non-const operator* overload.Adrian McCarthy2017-04-201-0/+5
| | | | | | | | | Without this change, the operator-> provided by iterator_facade lost type qualifiers. Differential Revision: https://reviews.llvm.org/D32235 llvm-svn: 300877
* [DWARF] Versioning for DWARF constants; verify FORMsPaul Robinson2017-04-203-558/+600
| | | | | | | | | | | | | Associate the version-when-defined with definitions of standard DWARF constants. Identify the "vendor" for DWARF extensions. Use this information to verify FORMs in .debug_abbrev are defined as of the DWARF version specified in the associated unit. Removed two tests that had specified DWARF v1 (which essentially does not exist). Differential Revision: http://reviews.llvm.org/D30785 llvm-svn: 300875
* [CodeExtractor] Remove a bunch of unneeded constructors.Davide Italiano2017-04-201-16/+0
| | | | | | Differential Revision: https://reviews.llvm.org/D32305 llvm-svn: 300869
* [Recycler] Add asan/msan annotations.Benjamin Kramer2017-04-202-0/+8
| | | | | | | | | | This enables use after free and uninit memory checking for memory returned by a recycler. SelectionDAG currently relies on the opcode of a free'd node being ISD::DELETED_NODE, so poke a hole in the asan poison for SDNode opcodes. This means that we won't find some issues, but only in SDag. llvm-svn: 300868
* Fixing outdated comment [NFC]Artyom Skrobov2017-04-201-5/+1
| | | | | | | Since r32105 back in 2006, RegisterPass doesn't support passes without a default constructor. llvm-svn: 300866
* CodeGen: Let frame index value type match alloca addr spaceYaxun Liu2017-04-201-0/+6
| | | | | | | | | | | | | | | | | | | | | | Recently alloca address space has been added to data layout. Due to this change, pointer returned by alloca may have different size as pointer in address space 0. However, currently the value type of frame index is assumed to be of the same size as pointer in address space 0. This patch fixes that. Most targets assume alloca returning pointer in address space 0, which is the default alloca address space. Therefore it is NFC for them. AMDGCN target with amdgiz environment requires this change since it assumes alloca returning pointer to addr space 5 and its size is 32, which is different from the size of pointer in addr space 0 which is 64. Differential Revision: https://reviews.llvm.org/D32021 llvm-svn: 300864
* Resubmit "[BitVector] Add operator<<= and operator>>=."Zachary Turner2017-04-202-0/+165
| | | | | | | | | This was failing due to the use of assigning a Mask to an unsigned, rather than to a BitWord. But most systems do not have sizeof(unsigned) == sizeof(unsigned long), so the mask was getting truncated. llvm-svn: 300857
* [APInt] Rename getSignBit to getSignMaskCraig Topper2017-04-202-11/+11
| | | | | | | | getSignBit is a static function that creates an APInt with only the sign bit set. getSignMask seems like a better name to convey its functionality. In fact several places use it and then store in an APInt named SignMask. Differential Revision: https://reviews.llvm.org/D32108 llvm-svn: 300856
* Revert "[BitVector] Add operator<<= and operator>>=."Zachary Turner2017-04-202-165/+0
| | | | | | | This is causing test failures on Linux / BSD systems. Reverting while I investigate. llvm-svn: 300852
* [APInt] Add isSubsetOf method that can check if one APInt is a subset of ↵Craig Topper2017-04-201-0/+11
| | | | | | | | | | | | | | another without creating temporary APInts This question comes up in many places in SimplifyDemandedBits. This makes it easy to ask without allocating additional temporary APInts. The BitVector class provides a similar functionality through its (IMHO badly named) test(const BitVector&) method. Though its output polarity is reversed. I've provided one example use case in this patch. I plan to do more as a follow up. Differential Revision: https://reviews.llvm.org/D32258 llvm-svn: 300851
* [BitVector] Add operator<<= and operator>>=.Zachary Turner2017-04-202-0/+165
| | | | | | Differential Revision: https://reviews.llvm.org/D32244 llvm-svn: 300848
* Introduce LLVMDIBuilderRefAmaury Sechet2017-04-202-0/+10
| | | | | | | | | | | | | | | | | Summary: This patch adds a definition of `LLVMDIBuilderRef` that represents an `llvm::DIBuilder`. Authored by Harlan Haskins Reviewers: deadalnix, aprantl, probinson, dblaikie, echristo, whitequark Reviewed By: deadalnix, whitequark Subscribers: CodaFi, loladiro Differential Revision: https://reviews.llvm.org/D32122 llvm-svn: 300843
* [MVT][SVE] Scalable vector MVTs (3/3)Amara Emerson2017-04-202-10/+183
| | | | | | | | | | | | Adds MVT::ElementCount to represent the length of a vector which may be scalable, then adds helper functions that work with it. Patch by Graham Hunter. Differential Revision: https://reviews.llvm.org/D32019 llvm-svn: 300842
* [MVT][SVE] Scalable vector MVTs (2/3)Amara Emerson2017-04-203-207/+431
| | | | | | | | | | | Adds scalable vector machine value types, and updates the switch statements required for tablegen. Patch by Graham Hunter. Differential Revision: https://reviews.llvm.org/D32018 llvm-svn: 300840
* [MVT][SVE] Scalable vector MVTs (1/3)Amara Emerson2017-04-201-0/+11
| | | | | | | | | | | | | | | | This patch adds a few helper functions to obtain new vector value types based on existing ones without needing to care about whether they are scalable or not. I've confined their use to a few common locations right now, and targets that don't have scalable vectors should never need to care about these. Patch by Graham Hunter. Differential Revision: https://reviews.llvm.org/D32017 llvm-svn: 300838
* [ARM] Rename HW div feature to HW div Thumb. NFCI.Diana Picus2017-04-202-20/+20
| | | | | | | | | | | | | | | | The hardware div feature refers only to Thumb, but because of its name it is tempting to use it to check for hardware division in general, which may cause problems in ARM mode. See https://reviews.llvm.org/D32005. This patch adds "Thumb" to its name, to make its scope clear. One notable place where I haven't made the change is in the feature flag (used with -mattr), which is still hwdiv. Changing it would also require changes in a lot of tests, including clang tests, and it doesn't seem like it's worth the effort. Differential Revision: https://reviews.llvm.org/D32160 llvm-svn: 300827
* [APInt] In slt/sgt(uint64_t), only call getMinSignedBits if the APInt is not ↵Craig Topper2017-04-201-2/+4
| | | | | | a single word. llvm-svn: 300824
* [APInt] Call the slow case counting methods directly in ↵Craig Topper2017-04-201-6/+8
| | | | | | isMask/isShiftedMask. We already handled the single word case. NFC llvm-svn: 300823
* Recommit "[APInt] Add back the asserts that check that the APInt shift ↵Craig Topper2017-04-201-2/+4
| | | | | | | | methods aren't called with values larger than BitWidth." This includes a fix to clamp a right shift of larger than BitWidth in DAG combining. llvm-svn: 300816
* Revert r300811 "[APInt] Add back the asserts that check that the APInt shift ↵Craig Topper2017-04-201-4/+2
| | | | | | | | methods aren't called with values larger than BitWidth." This is failing a self host debug build. llvm-svn: 300813
* [APInt] Implement APInt::intersects without creating a temporary APInt in ↵Craig Topper2017-04-201-3/+7
| | | | | | | | | | | | | | | | the multiword case Summary: This is a simple question we should be able to answer without creating a temporary to hold the AND result. We can also get an early out as soon as we find a word that intersects. Reviewers: RKSimon, hans, spatel, davide Reviewed By: hans, davide Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D32253 llvm-svn: 300812
* [APInt] Add back the asserts that check that the APInt shift methods aren't ↵Craig Topper2017-04-201-2/+4
| | | | | | | | called with values larger than BitWidth. The underlying tcShiftRight/tcShiftLeft functions support the larger bit widths but the APInt interface shouldn't rely on that. llvm-svn: 300811
* [APInt] Implement operator==(uint64_t) similar to ugt/ult(uint64_t) to ↵Craig Topper2017-04-191-6/+1
| | | | | | remove one of the out of line EqualsSlowCase methods. llvm-svn: 300799
* [APInt] Don't call getActiveBits() in ult/ugt(uint64_t) if its a single word.Craig Topper2017-04-191-2/+4
| | | | | | | | The compiled code already needs to check single/multi word for the countLeadingZeros call inside of getActiveBits, but it isn't able to optimize out the leadingZeros call in the single word case that can't produce a value larger than 64. This shrank the opt binary by about 5-6k on my local x86-64 build. llvm-svn: 300798
* [APInt] Use ugt(uint64_t) for the compare in getLimitedValue(uint64_t) since ↵Craig Topper2017-04-191-2/+1
| | | | | | the code is identical to it. NFC llvm-svn: 300796
* [Object] Fix some Clang-tidy modernize and Include What You Use warnings; ↵Eugene Zelenko2017-04-195-94/+163
| | | | | | other minor fixes (NFC). llvm-svn: 300779
* [GISEL]: Move getConstantVReg to UtilsAditya Nandakumar2017-04-192-3/+3
| | | | | | NFCI llvm-svn: 300751
* [APInt] Use SignExtend64 instead of reinventing it. NFCCraig Topper2017-04-191-2/+1
| | | | llvm-svn: 300747
* Using address range map to speedup finding inline stack for address.Dehao Chen2017-04-192-9/+11
| | | | | | | | | | | | | | | | | | | | Summary: In the current implementation, to find inline stack for an address incurs expensive linear search in 2 places: * linear search for the top-level DIE * recursive linear traverse the DIE tree to find the path to the leaf DIE In this patch, a map is built from address to its corresponding leaf DIE. The inline stack is built by traversing from the leaf DIE up to the root DIE. This speeds up batch symbolization by ~10X without noticible memory overhead. Reviewers: dblaikie Reviewed By: dblaikie Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D32177 llvm-svn: 300742
* [tblgen] GCC/MS builtin to target intrisics map.Aditya Nandakumar2017-04-191-0/+2
| | | | | | | | | | | Patch by Ettore Speziale Allow TableGen to generate static functions to perform GCC/MS builtin name to target specific intrinsic ID mapping. https://reviews.llvm.org/D31150 llvm-svn: 300735
* Update comment to match r300252.Richard Smith2017-04-191-1/+1
| | | | llvm-svn: 300728
* IR: Remove some comments that are documenting the obvious. NFC.Peter Collingbourne2017-04-191-4/+0
| | | | llvm-svn: 300724
* [MathExtras] Fix undefined behavior (shift by bit width)Benjamin Kramer2017-04-191-1/+1
| | | | | | While there add some unit tests for uint64_t. Found by ubsan. llvm-svn: 300721
* Prefer addAttr(Attribute::AttrKind) over the AttributeList overloadReid Kleckner2017-04-191-7/+5
| | | | | | | | This should simplify the call sites, which typically want to tweak one attribute at a time. It should also avoid creating ephemeral AttributeLists that live forever. llvm-svn: 300718
* [APInt] Move the 'return *this' from the slow cases of assignment operators ↵Craig Topper2017-04-191-17/+18
| | | | | | | | inline. We should let the compiler see that the fast/slow cases both return *this. I don't think we chain assignments together very often so this shouldn't matter much. llvm-svn: 300715
* Add an #include for <climits> for CHAR_BIT.Zachary Turner2017-04-191-0/+1
| | | | llvm-svn: 300711
* [Support] Add some helpers to generate bitmasks.Zachary Turner2017-04-191-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | Frequently you you want a bitmask consisting of a specified number of 1s, either at the beginning or end of a word. The naive way to do this is to write template<typename T> T leadingBitMask(unsigned N) { return (T(1) << N) - 1; } but using this function you cannot produce a word with every bit set to 1 (i.e. leadingBitMask<uint8_t>(8)) because left shift is undefined when N is greater than or equal to the number of bits in the word. This patch provides an efficient, branch-free implementation that works for all values of N in [0, CHAR_BIT*sizeof(T)] Differential Revision: https://reviews.llvm.org/D32212 llvm-svn: 300710
* Revert r300697 which causes buildbot failure.Dehao Chen2017-04-192-11/+9
| | | | llvm-svn: 300708
* Using address range map to speedup finding inline stack for address.Dehao Chen2017-04-192-9/+11
| | | | | | | | | | | | | | | | | | | | Summary: In the current implementation, to find inline stack for an address incurs expensive linear search in 2 places: * linear search for the top-level DIE * recursive linear traverse the DIE tree to find the path to the leaf DIE In this patch, a map is built from address to its corresponding leaf DIE. The inline stack is built by traversing from the leaf DIE up to the root DIE. This speeds up batch symbolization by ~10X without noticible memory overhead. Reviewers: dblaikie Reviewed By: dblaikie Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D32177 llvm-svn: 300697
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