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* [MIR] Update MIRLangRef with documentation on bundled instructionsFrancis Visoiu Mistrih2018-01-101-1/+15
| | | | | | Differential Revision: https://reviews.llvm.org/D41872 llvm-svn: 322198
* [WebAssembly] Add COMDAT supportSam Clegg2018-01-091-2/+2
| | | | | | | | | | | | | | This adds COMDAT support to the Wasm object-file format. Spec: https://github.com/WebAssembly/tool-conventions/pull/31 Corresponding LLD change: https://bugs.llvm.org/show_bug.cgi?id=35533, and D40845 Patch by Nicholas Wilson Differential Revision: https://reviews.llvm.org/D40844 llvm-svn: 322135
* [MIR] Add support for the frame-destroy MachineInstr flagFrancis Visoiu Mistrih2018-01-091-1/+6
| | | | | | | | | We are printing / parsing the `frame-setup` MachineInstr flag but not the `frame-destroy` one. Differential Revision: https://reviews.llvm.org/D41509 llvm-svn: 322071
* remove unreferenced footnotesTim Hammerquist2018-01-051-1/+1
| | | | llvm-svn: 321840
* fix invalid footnote syntaxTim Hammerquist2018-01-051-3/+0
| | | | llvm-svn: 321839
* [llvm-cov] Refactor "export" command implementation and add support for SOURCES.Max Moroz2018-01-041-2/+3
| | | | | | | | | | | | | | Summary: Define an interface for Exporter + split JSON exporter into .h and .cpp. Reviewers: vsk, morehouse Reviewed By: vsk Subscribers: llvm-commits, Dor1s, kcc Differential Revision: https://reviews.llvm.org/D41600 llvm-svn: 321815
* [docs] Update Scudo documentationKostya Kortchinsky2018-01-041-9/+30
| | | | | | | | | | | | | | | | | | | Summary: The documentation has fallen a bit behind, update it with the latest evolution of the allocator: - clarify a couple of expectations regarding what is meant to be achieved; - update the header format; - document `-fsanitize=scudo`. Reviewers: alekseyshl, flowerhack Reviewed By: alekseyshl Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D41670 llvm-svn: 321811
* [Docs] Add Contributing page.Florian Hahn2018-01-043-0/+130
| | | | | | | | | | | | | | | | | | | | | | This new page acts as an entry point for (new) contributors to LLVM and provides information about * What to contribute * How to submit a patch * Where to start to learn more about LLVM's architecture and internals. This version of the page duplicates some information from the DeveloperPolicy and Phabricator pages. Subsequent changes should work towards moving information for new developers to this page, where it makes sense. Reviewers: reames, probinson, kristof.beyls, silvas, rengolin, asb Reviewed By: silvas Differential Revision: https://reviews.llvm.org/D41665 llvm-svn: 321804
* Clear release notes for 7.0.0Hans Wennborg2018-01-031-18/+4
| | | | llvm-svn: 321727
* The trunk version is now 7.0.0svnHans Wennborg2018-01-031-2/+2
| | | | llvm-svn: 321712
* [docs] Use dbgs() instead of errs() for DEBUG()Jonas Devlieghere2017-12-251-5/+5
| | | | | | | | | | | | The examples in llvm/Support/Debug.h use `DEBUG(dbgs() << ...)` instead of `errs()`, so the examples in the Programmer's Manual should match that. Patch by: Moritz Sichert <moritz.sichert@googlemail.com> Differential revision: https://reviews.llvm.org/D41170 llvm-svn: 321444
* PR35705: Fix Chapter 9 example code for API changes to DIBuilderDavid Blaikie2017-12-201-2/+3
| | | | llvm-svn: 321214
* [AArch64] Implement stack probing for windowsMartin Storsjo2017-12-201-0/+28
| | | | | | Differential Revision: https://reviews.llvm.org/D41131 llvm-svn: 321150
* [CodeGen] Move printing MO_IntrinsicID operands to MachineOperand::printFrancis Visoiu Mistrih2017-12-191-0/+12
| | | | | | | Work towards the unification of MIR and debug output by refactoring the interfaces. llvm-svn: 321112
* [CodeGen] Move printing MO_IntrinsicID operands to MachineOperand::printFrancis Visoiu Mistrih2017-12-191-0/+11
| | | | | | | | | | Work towards the unification of MIR and debug output by refactoring the interfaces. Also add support for printing with a null TargetIntrinsicInfo and no MachineFunction. llvm-svn: 321111
* [CodeGen] Move printing MO_CFIIndex operands to MachineOperand::printFrancis Visoiu Mistrih2017-12-191-1/+21
| | | | | | | | | | Work towards the unification of MIR and debug output by refactoring the interfaces. Before this patch we printed "<call frame instruction>" in the debug output. llvm-svn: 321084
* [YAML] Add support for non-printable charactersFrancis Visoiu Mistrih2017-12-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | LLVM IR function names which disable mangling start with '\01' (https://www.llvm.org/docs/LangRef.html#identifiers). When an identifier like "\01@abc@" gets dumped to MIR, it is quoted, but only with single quotes. http://www.yaml.org/spec/1.2/spec.html#id2770814: "The allowed character range explicitly excludes the C0 control block allowed), the surrogate block #xD800-#xDFFF, #xFFFE, and #xFFFF." http://www.yaml.org/spec/1.2/spec.html#id2776092: "All non-printable characters must be escaped. [...] Note that escape sequences are only interpreted in double-quoted scalars." This patch adds support for printing escaped non-printable characters between double quotes if needed. Should also fix PR31743. Differential Revision: https://reviews.llvm.org/D41290 llvm-svn: 320996
* [CodeGen] Print MCSymbol operands as <mcsymbol sym> in both MIR and debug outputFrancis Visoiu Mistrih2017-12-141-0/+13
| | | | | | | | | Work towards the unification of MIR and debug output by printing `<mcsymbol sym>` instead of `<MCSym=sym>`. Only debug syntax is affected. llvm-svn: 320685
* [CodeGen] Print external symbols as $symbol in both MIR and debug outputFrancis Visoiu Mistrih2017-12-141-2/+15
| | | | | | | | | Work towards the unification of MIR and debug output by printing `$symbol` instead of `<es:symbol>`. Only debug syntax is affected. llvm-svn: 320681
* [CodeGen] Print jump-table index operands as %jump-table.0 in both MIR and ↵Francis Visoiu Mistrih2017-12-131-2/+35
| | | | | | | | | | debug output Work towards the unification of MIR and debug output by printing `%jump-table.0` instead of `<jt#0>`. Only debug syntax is affected. llvm-svn: 320566
* [CodeGen] Print target index operands as target-index(target-specific) + 8 ↵Francis Visoiu Mistrih2017-12-131-1/+15
| | | | | | | | | | in both MIR and debug output Work towards the unification of MIR and debug output by printing `target-index(target-specific) + 8` instead of `<ti#0+8>` and `target-index(target-specific) + 8` instead of `<ti#0-8>`. Only debug syntax is affected. llvm-svn: 320565
* [CodeGen] Print constant pool index operands as %const.0 + 8 in both MIR and ↵Francis Visoiu Mistrih2017-12-131-2/+47
| | | | | | | | | | | | | | debug output Work towards the unification of MIR and debug output by printing `%const.0 + 8` instead of `<cp#0+8>` and `%const.0 - 8` instead of `<cp#0-8>`. Only debug syntax is affected. Differential Revision: https://reviews.llvm.org/D41116 llvm-svn: 320564
* [XRay][compiler-rt] Reduce XRay log spamDean Michael Berris2017-12-132-1/+4
| | | | | | | | | | | | This change makes XRay print the log file output only when the verbosity level is higher than 0. It reduces the log spam in the default case when we want XRay running silently, except when there are actual fatal/serious errors. We also update the documentation to show how to get the information after the change to the default behaviour. llvm-svn: 320550
* [MachineOperand][MIR] Add isRenamable to MachineOperand.Geoff Berry2017-12-121-0/+3
| | | | | | | | | | | | | | | | | | Summary: Add isRenamable() predicate to MachineOperand. This predicate can be used by machine passes after register allocation to determine whether it is safe to rename a given register operand. Register operands that aren't marked as renamable may be required to be assigned their current register to satisfy constraints that are not captured by the machine IR (e.g. ABI or ISA constraints). Reviewers: qcolombet, MatzeB, hfinkel Subscribers: nemanjai, mcrosier, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D39400 llvm-svn: 320503
* [AMDGPU] Rename Bonaire target to be gfx704; remove gfx800 and make Iceland ↵Tony Tye2017-12-121-11/+7
| | | | | | | | | | | | | | | | and Tonga both use gfx802; update target feature handling Correct committed version to match intended accepted review D40051 id=123417 - Rename Bonaire target to be gfx704. - Eliminate gfx800 and make Iceland and Tonga both use gfx802 as they use the same code. - List target features supported by each processor in the processor table together with the default value. - Add xnack flag to e_flags. - Remove xnack from kernel metadata and kernel descriptor since it is now a whole code object property. Differential Revision: https://reviews.llvm.org/D40051 llvm-svn: 320457
* [llvm-cov] Add an option for "export" command to emit only file summary data.Max Moroz2017-12-111-0/+7
| | | | | | | | | | | | | | Summary: That allows to get the same data as produced by "llvm-cov report", but in JSON format, which is better for further processing by end users. Reviewers: vsk Reviewed By: vsk Differential Revision: https://reviews.llvm.org/D41085 llvm-svn: 320435
* [AMDGPU] Rename Bonaire target to be gfx704; update target feature handlingTony Tye2017-12-111-139/+144
| | | | | | | | | | | | - Rename Bonaire target to be gfx704. - Eliminate gfx800 and make Iceland and Tonga both use gfx802 as they use the same code. - List target features supported by each processor in the processor table together with the default value. - Add xnack flag to e_flags. - Remove xnack from kernel metadata and kernel descriptor since it is now a whole code object property. Differential Revision: https://reviews.llvm.org/D40051 llvm-svn: 320378
* [Docs] Fix typo in scheduler model documentation. enumemation->enumerationCraig Topper2017-12-101-1/+1
| | | | llvm-svn: 320288
* Remove duplicate option from documentation.Adrian Prantl2017-12-091-5/+0
| | | | llvm-svn: 320258
* Hardware-assisted AddressSanitizer (llvm part).Evgeniy Stepanov2017-12-092-0/+5
| | | | | | | | | | | | | | | | | | | | | Summary: This is LLVM instrumentation for the new HWASan tool. It is basically a stripped down copy of ASan at this point, w/o stack or global support. Instrumenation adds a global constructor + runtime callbacks for every load and store. HWASan comes with its own IR attribute. A brief design document can be found in clang/docs/HardwareAssistedAddressSanitizerDesign.rst (submitted earlier). Reviewers: kcc, pcc, alekseyshl Subscribers: srhines, mehdi_amini, mgorny, javed.absar, eraman, llvm-commits, hiraditya Differential Revision: https://reviews.llvm.org/D40932 llvm-svn: 320217
* dwarfdump: Add support for the --diff option.Adrian Prantl2017-12-081-0/+5
| | | | | | | | | --diff Emit the output in a diff-friendly way by omitting offsets and addresses. <rdar://problem/34502625> llvm-svn: 320214
* [CodeGen] Move printing MO_Immediate operands to MachineOperand::printFrancis Visoiu Mistrih2017-12-081-0/+29
| | | | | | | | | | | | Work towards the unification of MIR and debug output by refactoring the interfaces. Add support for operand subreg index as an immediate to debug printing and use ::print in the MIRPrinter. Differential Review: https://reviews.llvm.org/D40965 llvm-svn: 320209
* [Debugify] Add a pass to test debug info preservationVedant Kumar2017-12-081-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Debugify pass synthesizes debug info for IR. It's paired with a CheckDebugify pass which determines how much of the original debug info is preserved. These passes make it easier to create targeted tests for debug info preservation. Here is the Debugify algorithm: NextLine = 1 for (Instruction &I : M) attach DebugLoc(NextLine++) to I NextVar = 1 for (Instruction &I : M) if (canAttachDebugValue(I)) attach dbg.value(NextVar++) to I The CheckDebugify pass expects contiguous ranges of DILocations and DILocalVariables. If it fails to find all of the expected debug info, it prints a specific error to stderr which can be FileChecked. This was discussed on llvm-dev in the thread: "Passes to add/validate synthetic debug info" Differential Revision: https://reviews.llvm.org/D40512 llvm-svn: 320202
* [CodeGen] Move printing MO_CImmediate operands to MachineOperand::printFrancis Visoiu Mistrih2017-12-081-1/+5
| | | | | | | Work towards the unification of MIR and debug output by refactoring the interfaces. llvm-svn: 320140
* [AMDGPU] Fix typo in Kernel Descriptor for GFX6-GFX9Mark Searles2017-12-071-1/+1
| | | | | | Differential Revision: https://reviews.llvm.org/D40981 llvm-svn: 320087
* Update BitCodeFormat.Evgeniy Stepanov2017-12-071-0/+2
| | | | | | | Add 2 recently added attributes to list of well-known attributes in BitCodeFormat.rst. llvm-svn: 319999
* [XRay][docs] Document xray_mode and log registration API.Dean Michael Berris2017-12-052-6/+24
| | | | | | | | This marks certain flags in XRay as deprecated (in particular, `xray_naive_log=` and `xray_fdr_log=`), and recommends the use of the `xray_mode=` flag. llvm-svn: 319763
* [CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih2017-12-042-6/+18
| | | | | | | | | | | | | | | | As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
* [libFuzzer] add a flag -malloc_limit_mbKostya Serebryany2017-12-011-0/+4
| | | | llvm-svn: 319590
* docs/GettingStarted.rst: Update the list of release versions and tagsHans Wennborg2017-11-301-26/+5
| | | | llvm-svn: 319502
* [LangRef] clarify semantics of the frem instructionSanjay Patel2017-11-301-4/+6
| | | | | | | | | | As noted in D40594, the frem instruction corresponds to fmod() except that it can't set errno. I modified the text that we currently use for intrinsics that map to libm functions and applied it to frem. Differential Revision: https://reviews.llvm.org/D40629 llvm-svn: 319437
* [MC] Function stack size section.Sean Eveson2017-11-302-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | Re applying after fixing issues in the diff, sorry for any painful conflicts/merges! Original RFC: http://lists.llvm.org/pipermail/llvm-dev/2017-August/117028.html This change adds a '.stack-size' section containing metadata on function stack sizes to output ELF files behind the new -stack-size-section flag. The section contains pairs of function symbol references (8 byte) and stack sizes (unsigned LEB128). The contents of this section can be used to measure changes to stack sizes between different versions of the compiler or a source base. The advantage of having a section is that we can extract this information when examining binaries that we didn't build, and it allows users and tools easy access to that information just by referencing the binary. There is a follow up change to add an option to clang. Thanks. Reviewers: hfinkel, MatzeB Reviewed By: MatzeB Subscribers: thegameg, asb, llvm-commits Differential Revision: https://reviews.llvm.org/D39788 llvm-svn: 319430
* Revert r319423: [MC] Function stack size section.Sean Eveson2017-11-302-2862/+2843
| | | | | | I messed up the diff. llvm-svn: 319429
* [MC] Function stack size section.Sean Eveson2017-11-302-2843/+2862
| | | | | | | | | | | | | | | | | | | | | | | | | Summary: Original RFC: http://lists.llvm.org/pipermail/llvm-dev/2017-August/117028.html I wasn't sure who to put as reviewers, so please add/remove people as appropriate. This change adds a '.stack-size' section containing metadata on function stack sizes to output ELF files behind the new -stack-size-section flag. The section contains pairs of function symbol references (8 byte) and stack sizes (unsigned LEB128). The contents of this section can be used to measure changes to stack sizes between different versions of the compiler or a source base. The advantage of having a section is that we can extract this information when examining binaries that we didn't build, and it allows users and tools easy access to that information just by referencing the binary. There is a follow up change to add an option to clang. Thanks. Reviewers: hfinkel, MatzeB Reviewed By: MatzeB Subscribers: thegameg, asb, llvm-commits Differential Revision: https://reviews.llvm.org/D39788 llvm-svn: 319423
* [XRay][docs] Update documentation on new default for xray_naive_log=Dean Michael Berris2017-11-302-4/+7
| | | | | | | | | We've recently changed the default for `xray_naive_log=` to be `false` instead of `true` to make it more consistent with the FDR mode logging implementation. This means we will now ask users to explicitly choose which version of the XRay logging is being used. llvm-svn: 319400
* [libFuzzer] mention one more trophie in the Linux KernelKostya Serebryany2017-11-301-0/+2
| | | | llvm-svn: 319397
* AMDGPU: Add num spilled s/vgprs to metadataKonstantin Zhuravlyov2017-11-281-0/+10
| | | | | | | | This was requested by tools. Differential Revision: https://reviews.llvm.org/D40321 llvm-svn: 319192
* Add release note about TargetRegistry change from r318352Daniel Sanders2017-11-271-0/+5
| | | | llvm-svn: 319093
* [XRay] Fix typo in docs. NFCFangrui Song2017-11-272-4/+4
| | | | | | | | Reviewers: dberris Differential Revision: https://reviews.llvm.org/D40461 llvm-svn: 319047
* [LV] Model masking in VPlan, introducing VPInstructionsGil Rapaport2017-11-201-2/+67
| | | | | | | | | | | | | | | This patch adds a new abstraction layer to VPlan and leverages it to model the planned instructions that manipulate masks (AND, OR, NOT), introduced during predication. The new VPValue and VPUser classes model how data flows into, through and out of a VPlan, forming the vertices of a planned Def-Use graph. The new VPInstruction class is a generic single-instruction Recipe that models a planned instruction along with its opcode, operands and users. See VectorizationPlan.rst for more details. Differential Revision: https://reviews.llvm.org/D38676 llvm-svn: 318645
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