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* Add missing include to RegisterInfoInterface.hTamas Berghammer2015-08-131-0/+2
| | | | llvm-svn: 244881
* Set orig_eax to -1 for Linux x86 platformsRavitheja Addepally2015-08-135-2/+51
| | | | | | | | | | | | | | | | | Summary: For Linux x86 based environments the orig_eax/orig_rax register should be set to -1 to prevent the instruction pointer to be decremented, which was the cause for the SIGILL exception. Fix for Bug 23659 Reviewers: zturner, ashok.thirumurthi, mikesart, jingham, clayborg Subscribers: clayborg, labath Differential Revision: http://reviews.llvm.org/D11411 llvm-svn: 244875
* ClangASTType is now CompilerType.Greg Clayton2015-08-111-3/+3
| | | | | | This is more preparation for multiple different kinds of types from different compilers (clang, Pascal, Go, RenderScript, Swift, etc). llvm-svn: 244689
* Revert r244308 since it's introducing test regressions on Linux:Oleksiy Vyalov2015-08-1011-772/+217
| | | | | | | | - TestLldbGdbServer.py both clang & gcc, i386 and x86_64 - TestConstVariables.py gcc, i386 and x86_64 - 112 failures clang, i386 llvm-svn: 244514
* [LLDB][MIPS] Fix offsets of all register sets and add MSA regset and FRE=1 ↵Sagar Thakur2015-08-0711-217/+772
| | | | | | | | | | | | | | | | | | mode support This change : - Fixes offsets of all register sets for Mips. - Adds MSA register set and FRE=1 mode support for FP register set. - Separates lldb register numbers and register infos of freebsd/mips64 from linux/mips64. - Re-orders the register numbers of all kinds for mips to be consistent with freebsd order of register numbers. - Eliminates ENABLE_128_BIT_SUPPORT and union ValueData from Scalar.cpp and uses llvm::APInt and llvm::APFloat for all integer and floating point types. Reviewers : emaste, jaydeep, clayborg Subscribers : emaste, mohit.bhakkad, nitesh.jain, bhushan Differential : http://reviews.llvm.org/D10919 llvm-svn: 244308
* [Makefiles] One more library rename to align with CMakeKeno Fischer2015-07-151-3/+3
| | | | | | | | This one I accidentally missed last time because I confused it with the lldbUtility library. After this, all makefile libraries should have the same names as their CMake counterparts. llvm-svn: 242344
* Refactor Unix signals.Chaoren Lin2015-07-149-31/+99
| | | | | | | | | | | | | | | | | | Summary: - Consolidate Unix signals selection in UnixSignals. - Make Unix signals available from platform. - Add jSignalsInfo packet to retrieve Unix signals from remote platform. - Get a copy of the platform signal for each remote process. - Update SB API for signals. - Update signal utility in test suite. Reviewers: ovyalov, clayborg Subscribers: chaoren, jingham, labath, emaste, tberghammer, lldb-commits Differential Revision: http://reviews.llvm.org/D11094 llvm-svn: 242101
* Improve UnwindLLDB with better detection for unwinding failuresTamas Berghammer2015-07-062-72/+116
| | | | | | | | | | | | | | | | | | | Previously we accepted a frame as correct result if the PC pointed into an executable section of code. The isse with that approac is that if we calculated PC correctly but messed up the value of CFA then unwinding from the next fram will most likely fail. With this change I modify the logic with keeping the requirement for PC to point to an executable section and also check that we can continue the unwind from the frame we calculated. If continuing from the frame calculated with the primary unwind plan isn't working then fall back to the fallback plan with the hope for a better frame (if the fallback plan won't help then we acceot the frame from the primary plan). Differential revision: http://reviews.llvm.org/D10932 llvm-svn: 241434
* Enable usage of eh_frame based unwind plan as a fallbackTamas Berghammer2015-07-031-12/+39
| | | | | | | | | | | Previously if the instruction emulation based unwind plan failed then we fall back to the arch default unwind plan. Change it to fall back to the eh_frame based one even on non call sites if we have eh_frame as that one tend to be more reliable. Differential revision: http://reviews.llvm.org/D10902 llvm-svn: 241334
* [LLDB][MIPS] Getting correct flags for MIPSMohit K. Bhakkad2015-06-301-1/+2
| | | | | | | | | | Patch by Nitesh Jain Reviewers: clayborg, ovyalov, emaste. Subscribers: jaydeep, bhushan, dsanders, mohit.bhakkad, sagar, labath, tberghammer, lldb-commits. Differential Revision: http://reviews.llvm.org/D10685 llvm-svn: 241045
* Improve instruction emulation based stack unwinding on ARMTamas Berghammer2015-06-241-11/+8
| | | | | | | | | | | | | | | | | | | | | | | * Add and fix the emulation of several instruction. * Disable frame pointer usage on Android. * Specify return address register for the unwind plan instead of explict tracking the value of RA. * Replace prologue detection heuristics (unreliable in several cases) with a logic to follow the branch instructions and restore the CFI value based on them. The target address for a branch should have the same CFI as the source address (if they are in the same function). * Handle symbols in ELF files where the symbol size is not specified with calcualting their size based on the next symbol (already done in MachO files). * Fix architecture in FuncUnwinders with filling up the inforamtion missing from the object file with the architecture of the target. * Add code to read register wehn the value is set to "IsSame" as it meanse the value of a register in the parent frame is the same as the value in the current frame. Differential revision: http://reviews.llvm.org/D10447 llvm-svn: 240533
* [MIPS64] Correct generic register number of argument registers in reginfoSagar Thakur2015-06-181-4/+4
| | | | llvm-svn: 240005
* [lldb-server][MIPS64] Assigning generic register numbers in register info ↵Sagar Thakur2015-06-091-7/+7
| | | | | | | | for mips64 Use generic register numbers for argument registers, fp, ra and flag register in register info. llvm-svn: 239394
* Removed unused private fields in RegisterContextLinux_mipsEd Maste2015-06-051-4/+0
| | | | llvm-svn: 239181
* [lldb-server][MIPS] Read/Write FP registers in FR0 modeSagar Thakur2015-06-052-4/+17
| | | | | | | | | | Adding support for read/write FP registers in FR0 mode of mips. Reviewers: clayborg, tberghammer, jaydeep Subscribers: emaste, nitesh.jain, bhushan, mohit.bhakkad, lldb-commits Differential Revision: http://reviews.llvm.org/D10242 llvm-svn: 239132
* [MIPS][lldb-server] Add 32-bit register context and read/write FP registers ↵Sagar Thakur2015-06-039-133/+798
| | | | | | | | | | | | | on mips64 - Added support for read/write FP registers in FR1 mode. - Added 32 bit register context for mips32. Reviewers: clayborg, tberghammer, jaydeep Subscribers: emaste, nitesh.jain, bhushan, mohit.bhakkad, lldb-commits Differential Revision: http://reviews.llvm.org/D10029 llvm-svn: 238914
* Don't #include "lldb-python.h" from anywhere.Zachary Turner2015-05-291-2/+0
| | | | | | | | | | | | | Since interaction with the python interpreter is moving towards being more isolated, we won't be able to include this header from normal files anymore, all includes of it should be localized to the python library which will live under source/bindings/API/Python after a future patch. None of the files that were including this header actually depended on it anyway, so it was just a dead include in every single instance. llvm-svn: 238581
* Add real time signals support to FreeBSDSignalsEd Maste2015-05-271-4/+66
| | | | | | | | Apply r238009 to FreeBSD as well. Differential Revision: http://reviews.llvm.org/D10037 llvm-svn: 238316
* Added XML to the host layer.Greg Clayton2015-05-262-17/+112
| | | | | | | | | | | | We know have on API we should use for all XML within LLDB in XML.h. This API will be easy back the XML parsing by different libraries in case libxml2 doesn't work on all platforms. It also allows the only place for #ifdef ...XML... to be in XML.h and XML.cpp. The API is designed so it will still compile with or without XML support and there is a static function "bool XMLDocument::XMLEnabled()" that can be called to see if XML is currently supported. All APIs will return errors, false, or nothing when XML isn't enabled. Converted all locations that used XML over to using the host XML implementation. Added target.xml support to debugserver. Extended the XML register format to work for LLDB by including extra attributes and elements where needed. This allows the target.xml to replace the qRegisterInfo packets and allows us to fetch all register info in a single packet. <rdar://problem/21090173> llvm-svn: 238224
* Move register reading form NativeProcessLinux to NativeRegisterContextLinux*Tamas Berghammer2015-05-262-0/+7
| | | | | | | | | | | | | | | | | This change reorganize the register read/write code inside lldb-server on Linux with moving the architecture independent code into a new class called NativeRegisterContextLinux and all of the architecture dependent code into the appropriate NativeRegisterContextLinux_* class. As part of it the compilation of the architecture specific register contexts are only compiled on the specific architecture because they can't be used in other cases. The purpose of this change is to remove a lot of duplicated code from the different register contexts and to remove the architecture dependent codes from the global NativeProcessLinux class. Differential revision: http://reviews.llvm.org/D9935 llvm-svn: 238196
* Add real time signals support to LinuxSignalsPavel Labath2015-05-222-68/+134
| | | | | | | | | | | | | | Summary: This enables correct handling of real time signals by lldb. Test Plan: Added a test that verifies handling of SIGRTMIN Reviewers: tberghammer, ovyalov Subscribers: lldb-commits Differential Revision: http://reviews.llvm.org/D9911 llvm-svn: 238009
* Convert mmap options for target in InferiorCallMmap.Robert Flack2015-05-092-11/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Converts the MAP_PRIVATE and MAP_ANON options to the target platform constants (on which the call runs) rather than using those of the compiled host. Test Plan: Run test suite, the following tests requiring memory allocation / JIT support begin passing when running mac -> linux: Test11588.py TestAnonymous.py TestBreakpointConditions.py TestCPPStaticMethods.py TestCStrings.py TestCallStdStringFunction.py TestDataFormatterCpp.py TestDataFormatterStdList.py TestExprDoesntBlock.py TestExprHelpExamples.py TestFunctionTypes.py TestPrintfAfterUp.py TestSBValuePersist.py TestSetValues.py Differential Revision: http://reviews.llvm.org/D9511 llvm-svn: 236933
* Same issue as in D8685 but for i386.Chaoren Lin2015-04-214-7/+19
| | | | llvm-svn: 235454
* FreeBSD/arm core file supportEd Maste2015-04-203-0/+164
| | | | | | | Patch by Andrew Turner, with minor edits. XCode changes are mine; please update if necessary. llvm-svn: 235305
* Correct machine type for 32-bit armEd Maste2015-04-191-1/+1
| | | | | | Reported by Andrew Turner. llvm-svn: 235275
* Adds Register Context Linux/POSIX for ARM Architecture Omair Javaid2015-04-147-0/+1029
| | | | | | | | This patch is major step towards supporting lldb on ARM. This adds all the required bits to support register manipulation on Linux Arm. Also adds utility enumerations, definitions and register context classes for arm. llvm-svn: 234870
* [LLDB][MIPS] Add LinuxSignals for mips64 and change trap opcode for mips64el.Mohit K. Bhakkad2015-04-093-0/+100
| | | | | | | | | | | | | | | Patch by Sagar Thakur - Added LinuxSignals for MIPS64. - Changed software trap opcode for mips64el. Reviewers: clayborg, tberghammer. Subscribers: emaste, jaydeep, bhushan, mohit.bhakkad, llvm-commits. Differential Revision: http://reviews.llvm.org/D8856 llvm-svn: 234469
* Fix stepping a virtual thread when the python operating system was enabled.Greg Clayton2015-04-072-3/+6
| | | | | | | | | | | | The OperatingSystem plug-ins allow code to detect threads in memory and then say "memory thread 0x11111" is backed by the actual thread 1. You can then single step these virtual threads. A problem arose when thread specific breakpoints were used during thread plans where we would say "set a breakpoint on thread 0x11111" and we would hit the breakpoint on the real thread 1 and the thread IDs wouldn't match and we would get rid of the "stopped at breakpoint" stop info due to this mismatch. Code was added to ensure these events get forwarded and thus allow single stepping a memory thread to work correctly. Added a test case for this as well. <rdar://problem/19211770> llvm-svn: 234364
* Fix printing of function names during unwind logging.Zachary Turner2015-04-061-6/+15
| | | | llvm-svn: 234172
* Fix FreeBSD crash after r233837Ed Maste2015-04-033-4/+8
| | | | | | | | | | | | The FreeBSD debug register access is a little usual, but in any case different from Linux. As it stands it's not possible to share an implementation of DR_OFFSET, so revert that part of r233837 and provide a separate FreeBSD and Linux implementation. We'll still want a better fix, but this should restore basic functionality (and the buildbot). llvm-svn: 234048
* Fix issue where GPR and FPR registers have overlapping byte offsets.Chaoren Lin2015-04-013-22/+34
| | | | | | | | | | | | | | | | | | | | Summary: The implementation of GDBRemoteRegisterContext relies on byte offsets to cache register values. GPR, FPR, etc. should start on different offsets. This is correctly done in debugserver (in DNBArchImplX86_64.cpp), but not on Linux or FreeBSD (in RegisterInfos_x86_64.h). Test Plan: `register read st0` no longer overwrites `rbp` on Linux with LLGS. Reviewers: sivachandra, jingham, emaste, ovyalov, clayborg Reviewed By: clayborg Subscribers: emaste, lldb-commits Differential Revision: http://reviews.llvm.org/D8685 llvm-svn: 233837
* Move several plugin to its own namespaceTamas Berghammer2015-03-313-5/+8
| | | | | | | | | | | | | Affected paths: * Plugins/Platform/Android/* * Plugins/Platform/Linux/* * Plugins/Platform/gdb-server/* * Plugins/Process/Linux/* * Plugins/Process/gdb-remote/* Differential revision: http://reviews.llvm.org/D8654 llvm-svn: 233679
* Specify LLDB_REGNUM_GENERIC_ARG* registers for arm64Tamas Berghammer2015-03-271-8/+8
| | | | llvm-svn: 233369
* Handle FreeBSD/arm64 core filesEd Maste2015-03-263-0/+165
| | | | | | | | This is derived from FreeBSD/mips64 and Darwin and Linux arm64 support. Differential Revision: http://reviews.llvm.org/D7835 llvm-svn: 233273
* Remove ScriptInterpreterObject.Zachary Turner2015-03-172-299/+255
| | | | | | | | | | | | | | | | | | | | | | | | | This removes ScriptInterpreterObject from the codebase completely. Places that used to rely on ScriptInterpreterObject now use StructuredData::Object and its derived classes. To support this, a new type of StructuredData object is introduced, called StructuredData::Generic, which stores a void*. Internally within the python library, StructuredPythonObject subclasses this StructuredData::Generic class so that it can addref and decref the python object on construction and destruction. Additionally, all of the classes in PythonDataObjects.h such as PythonList, PythonDictionary, etc now provide a method to create an instance of the corresponding StructuredData type. For example, there is PythonDictionary::CreateStructuredDictionary. To eliminate dependencies on PythonDataObjects for external callers, all ScriptInterpreter methods now return only StructuredData classes The rest of the changes in this CL are focused on fixing up users of PythonDataObjects classes to use the new StructuredData classes. llvm-svn: 232534
* Fix the clang -Werror build by suppressing -Wextended-offsetofDavid Blaikie2015-03-171-2/+2
| | | | llvm-svn: 232507
* [MIPS] - Register Context for MIPS64Mohit K. Bhakkad2015-03-173-0/+188
| | | | | | | | | | | | | | | | Patch by Jaydeep Patil Summery: 1. Add MIPS variants by parsing e_flags of the ELF 2. Create RegisterInfoInterface and RegisterContext for MIPS64 and MIPS64EL Reviewers: clayborg Subscribers: tberghammer, bhushan, mohit.bhakkad, sagar Differential Revision: http://reviews.llvm.org/D8166 llvm-svn: 232467
* Create NativeRegisterContext for android-arm64Tamas Berghammer2015-03-133-156/+178
| | | | | | Differential revision: http://reviews.llvm.org/D8058 llvm-svn: 232160
* Reduce header footprint of Target.hZachary Turner2015-03-031-0/+1
| | | | | | | | | | | | This continues the effort to reduce header footprint and improve build speed by removing clang and other unnecessary headers from Target.h. In one case, some headers were included solely for the purpose of declaring a nested class in Target, which was not needed by anybody outside the class. In this case the definition and implementation of the nested class were isolated in the .cpp file so the header could be removed. llvm-svn: 231107
* Support evaluation of DWARF expressions setting CFAPavel Labath2015-02-231-1/+22
| | | | | | | | | | | | | | | | | | | | | Summary: This patch enables evaluation of DWARF expressions setting the CFA during stack unwinding. This makes TestSigtrampUnwind "almost" pass on linux. I am not enabling the test yet since the symbol name for the signal trampoline does not get resolved properly due to a different bug, but apart from that, the backtrace is sane. I am unsure how this change affects Mac. I think it makes the unwinder prefer the DWARF unwind plan instead of some custom platform-dependant plan. However, it does not affect the end result - the stack unwinding works as expected. Reviewers: jasonmolenda Subscribers: lldb-commits Differential Revision: http://reviews.llvm.org/D7792 llvm-svn: 230211
* UnwindPlan::Row refactor -- add support for CFA set by a DWARF expressionPavel Labath2015-02-231-37/+49
| | | | | | | | | | | | | | | | | | | Summary: This change refactors UnwindPlan::Row to be able to store the fact that the CFA is value is set by evaluating a dwarf expression (DW_CFA_def_cfa_expression). This is achieved by creating a new class CFAValue and moving all CFA setting/getting code there. Note that code using the new CFAValue::isDWARFExpression is not yet present and will be added in a follow-up patch. Therefore, this patch should not change the functionality in any way. Test Plan: Ran tests on Mac and Linux. No regressions detected. Reviewers: jasonmolenda, clayborg Subscribers: lldb-commits Differential Revision: http://reviews.llvm.org/D7755 llvm-svn: 230210
* Quiet CoverityJustin Hibbits2015-02-121-1/+2
| | | | | | | | | | | | | | Summary: Coverity warns that unsigned >= 0 is always true, and k_first_gpr_powerpc happens to be 0. Quiet Coverity by changing that comparison instead to a static_assert(), in case things change in the future. Reviewers: emaste Reviewed By: emaste Subscribers: lldb-commits Differential Revision: http://reviews.llvm.org/D7576 llvm-svn: 228908
* Adding x86 to supported architectures on x86_64.Chaoren Lin2015-02-101-0/+1
| | | | llvm-svn: 228715
* Fix off-by-one IsGPR().Justin Hibbits2015-02-081-1/+1
| | | | | | | f0 was being counted as a GPR, due to the check in IsGPR(). Correct it by looking at the precise GPR range. llvm-svn: 228547
* Implement initial Altivec supportJustin Hibbits2015-02-055-8/+245
| | | | | | | | | | | | | | | | | Summary: This adds the register plumbing, as well as register reading in FreeBSD core dumps. Further work on the POSIX/FreeBSD ProcessMonitor is required in order to support ptrace access to these registers. Reviewers: tfiala, emaste Reviewed By: emaste Subscribers: emaste, lldb-commits Differential Revision: http://reviews.llvm.org/D7039 llvm-svn: 228278
* Add PowerPC FPR access to the process monitorJustin Hibbits2015-02-051-0/+1
| | | | | | | | | | | | | | Summary: This adds reading and writing to the POSIX PowerPC ProcessMonitor. Reviewers: emaste Reviewed By: emaste Subscribers: emaste, lldb-commits Differential Revision: http://reviews.llvm.org/D7040 llvm-svn: 228277
* Fixing TestRegisters on Linux with LLGSVince Harron2015-01-236-3/+50
| | | | | | | | | | | | | | This patch fixes TestRegisters on Linux with LLGS Introduce GetUserRegisterCount on RegisterInfoInterface to distinguish lldb internal registers (e.g.: DR0-DR7) during register counting. Update GDBRemoteCommunicationServer to skip lldb internal registers on read/write register and on discover register. Submitted for Tamas Berghammer llvm-svn: 226959
* Adding compact unwind as a source of unwind information Jason Molenda2015-01-211-2/+5
| | | | | | | | | | | | | | introduced subtle bugs in two places in RegisterContextLLDB::GetFullUnwindPlanForFrame where it specifically wanted to get an eh_frame unwind plan and was using "Get CallSite UnwindPlan" as synonymous with that. But now we have two different types of unwind plan that can be returned in that case, and compact unwind won't behaves as needed. <rdar://problem/19528559> llvm-svn: 226631
* Moved Args::StringToXIntYZ to StringConvert::ToXIntYZVince Harron2015-01-151-3/+3
| | | | | | | | | | The refactor was motivated by some comments that Greg made http://reviews.llvm.org/D6918 and also to break a dependency cascade that caused functions linking in string->int conversion functions to pull in most of lldb llvm-svn: 226199
* Hoist the RegisterNumber class out of RegisterContextLLDB and makeJason Molenda2015-01-101-159/+1
| | | | | | | | | | | | | | | it more generally available. Add checks to UnwindAssembly_x86::AugmentUnwindPlanFromCallSite() so that it won't try to augment an UnwindPlan that already describes the function epilogue. Add a test case for backtracing out of _sigtramp on Darwin systems. This could probably be adapted to test the same thing on linux/bsd but the function names of sigtramp and kill are probably platform specific and I'm not sure what they should be. llvm-svn: 225578
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