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* Move classes from Core -> Utility.Zachary Turner2017-02-028-8/+8
| | | | | | | | | | | | | | | | | | | | | | | This moves the following classes from Core -> Utility. ConstString Error RegularExpression Stream StreamString The goal here is to get lldbUtility into a state where it has no dependendencies except on itself and LLVM, so it can be the starting point at which to start untangling LLDB's dependencies. These are all low level and very widely used classes, and previously lldbUtility had dependencies up to lldbCore in order to use these classes. So moving then down to lldbUtility makes sense from both the short term and long term perspective in solving this problem. Differential Revision: https://reviews.llvm.org/D29427 llvm-svn: 293941
* Transform ProcessLauncherLinux to ProcessLauncherPosixForkKamil Rytarowski2017-02-011-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Use ProcessLauncherPosixFork in Linux and NetBSD. Changes to ProcessLauncherLinux: - Limit personality.h and ASLR code to Linux. - Reuse portable ptrace(2) PT_TRACE_ME operation available on Linux and BSDs. - Limit ETXTBSY error path from execve(2) to Linux. - In LaunchProcess declaration change virtual to override. This code should be readily available for FreeBSD. Sponsored by <The NetBSD Foundation> Reviewers: joerg, clayborg, labath, emaste Reviewed By: labath Subscribers: danalbert, srhines, mgorny, #lldb Tags: #lldb Differential Revision: https://reviews.llvm.org/D29347 llvm-svn: 293768
* [CMake] [3/4] Update a batch of pluginsChris Bieneman2017-01-311-1/+12
| | | | | | This is extending the updates from r293696 to more LLDB plugins. llvm-svn: 293700
* NPL: Compartmentalize arm64 single step workaround betterPavel Labath2017-01-254-133/+106
| | | | | | | | | | | The main motivation for me doing this is being able to build an arm android lldb-server against api level 9 headers, but it seems like a good cleanup nonetheless. The entirety of the cpu_set_t dance now resides in SingleStepCheck.cpp, which is only built on arm64. llvm-svn: 293046
* android-mips: define PTRACE_GETREGSET in headers don't do itPavel Labath2017-01-241-0/+3
| | | | | | | PTRACE_GETREGSET is only defined on mips only since api level 21. Define it ourselves, so we can compile with older platform headers. llvm-svn: 292936
* Add format_provider for lldb::StateTypePavel Labath2017-01-241-5/+5
| | | | | | | | | | Reviewers: clayborg Subscribers: mgorny, lldb-commits Differential Revision: https://reviews.llvm.org/D29036 llvm-svn: 292920
* Fix more unused variable warnings when asserts are disabled.Hafiz Abid Qadeer2017-01-201-0/+1
| | | | llvm-svn: 292598
* Refactor logging in NativeProcessLinuxPavel Labath2017-01-191-637/+323
| | | | | | | | | | Use the LLDB_LOG macro instead of the more verbose if(log) ... syntax. I have also consolidated the log channels (everything now goes to the posix channel, instead of a mixture of posix and lldb), and cleaned up some of the more convoluted log statements. llvm-svn: 292489
* Improve the performance of jModulesInfo in lldb-serverTamas Berghammer2017-01-032-105/+92
| | | | | | | | | | | | Previously it parsed /proc/<pid>/maps for every module separately resulting in a very slow response time. This CL add some caching and optimizes the implementation to improve the code from O(n*m) to O(n+m) where n is the number of modules requested and m is the number of files mapped into memory. Differential revision: https://reviews.llvm.org/D28233 llvm-svn: 290895
* Remove linux/personality.h wrapperPavel Labath2016-12-151-1/+0
| | | | | | | | | This code is currently unused. Removing it should make porting of the linux plugin to NetBSD easier, and we can always add it later if needed. llvm-svn: 289801
* Fix floating point register reads x86_64 linux on targets with no AVX supportPavel Labath2016-11-281-3/+14
| | | | | | | | | | | | | | | | Summary: On for 64-bit targets, the correct register set to read the fxsave are is NT_PRFPREG (only 32-bit targets need NT_PRXFPREG, presumably for historic reasons). Reference: <https://github.com/torvalds/linux/blob/v4.8/arch/x86/kernel/ptrace.c#L1261>. Reviewers: tberghammer, valentinagiusti Subscribers: lldb-commits Differential Revision: https://reviews.llvm.org/D27161 llvm-svn: 288038
* Merge Linux and FreeBSD arm64 register contextsPavel Labath2016-11-251-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This is a test-the-water change about possibilities of reducing duplication in the register context definitions. I've named the new class RegisterInfoPOSIX, as RegisterContextPOSIX was already taken :(. The two files were identical except for a fix by Tamas in D12636, which was applied to the Linux version only, which fixed a discrepancy between the definitions of fpsr and fpcr on one hand, and all other floating point register definitions on the other. Linux test suite still passes after this change. For freebsd, make the floating point register behavior consistent, but I don't know whether it will be consistently fixed, or consistently broken. By eyeballing the code, I have a feeling that a similar fix to D12636 will be required in RegisterContextPOSIXProcessMonitor_arm64::ReadRegister, but I can't be sure as I have no way to test it (the assert in that function should fire upon accessing the registers if it is wrong though). Reviewers: emaste, clayborg Subscribers: aemerson, rengolin, beanz, mgorny, modocache, dmikulin, lldb-commits Differential Revision: https://reviews.llvm.org/D25947 llvm-svn: 287916
* Revert unwanted changes in lldb when updating llvm::Error()Mehdi Amini2016-11-117-50/+50
| | | | | | | | My script updated lldb::Errors, and I failed to fix it entirely before pushing. This restore everything in lldb as it was before r286561. llvm-svn: 286565
* Make the Error class constructor protectedMehdi Amini2016-11-117-50/+50
| | | | | | | | | This is forcing to use Error::success(), which is in a wide majority of cases a lot more readable. Differential Revision: https://reviews.llvm.org/D26481 llvm-svn: 286561
* Fix Clang-tidy readability-redundant-string-cstr warningsMalcolm Parsons2016-11-021-1/+1
| | | | | | | | | | Reviewers: zturner, labath Subscribers: tberghammer, danalbert, lldb-commits Differential Revision: https://reviews.llvm.org/D26233 llvm-svn: 285855
* Remove executable bit on a source fileStephane Sezer2016-11-011-0/+0
| | | | llvm-svn: 285658
* Don't set a software stepping breakpoint at 0 on arm or mips.Pavel Labath2016-10-261-1/+5
| | | | | | | | | | | | | | | | | | Summary: Check whether the setting the breakpoint failed during instruction emulation. If it did, the next pc is likely in unmapped memory, and the inferior will crash anyway after the next instruction. Do not return an error in this case, but just continue stepping. Reenabled the crash during step test for android/linux. Reviewers: labath Subscribers: aemerson, rengolin, tberghammer, danalbert, srhines, lldb-commits Differential Revision: https://reviews.llvm.org/D25926 Author: Jason Majors <jmajors@google.com> llvm-svn: 285187
* Add the new arm64 sub-register definitions to NativeRegisterContextLinuxPavel Labath2016-10-241-1/+25
| | | | | | | | It's quite sad that we have to edit so many files just to add a register. I am going to investigate how to merge these definitions somehow, but for now this should at least get arm64 linux working again. llvm-svn: 284970
* Fix ARM/AArch64 Step-Over watchpoint issue remove provision for duplicate ↵Omair Javaid2016-10-202-105/+59
| | | | | | | | | | | watchpoints This patch fixes ARM/AArch64 watchpoint bug which was taking inferior out of control while stepping over watchpoints. Also adds a test case that tests above problem. Differential revision: https://reviews.llvm.org/D25057 llvm-svn: 284706
* [LLDB][MIPS] fix Floating point register read/write for big endianNitesh Jain2016-10-122-81/+94
| | | | | | | | | | Reviewers: clayborg, labath, jaydeep Subscribers: bhushan, slthakur, lldb-commits Differential Revision: https://reviews.llvm.org/D24603 llvm-svn: 284003
* [LLDB][MIPS] Fix register read/write for 32 bit big endian systemNitesh Jain2016-10-101-1/+1
| | | | | | | | | | Reviewers: clayborg, labath Subscribers: jaydeep, bhushan, mohit.bhakkad, slthakur, llvm-commits Differential Revision: https://reviews.llvm.org/D24124 llvm-svn: 283728
* Add bound violation handling for Intel(R) Memory Protection Extensions ↵Valentina Giusti2016-10-061-2/+1
| | | | | | | | | | | | | (Intel(R) MPX) Summary: This patch adds support for handling the SIGSEGV signal with 'si_code == SEGV_BNDERR', which is thrown when a bound violation is caught by the Intel(R) MPX technology. Differential Revision: https://reviews.llvm.org/D25329 llvm-svn: 283474
* Refactor NativeRegisterContextLinux_x86_64 code.Valentina Giusti2016-09-212-114/+41
| | | | | | | | | | | | This patch refactors the way the XState type is checked and, in order to simplify the code, it removes the usage of the 'cpuid' instruction: just checking if the ptrace calls done throuhg ReadFPR is enough to verify both if there is HW support and if there is kernel support. Also the XCR0 bits are enough to check if there is both HW and kernel support for AVX and MPX. Differential Revision: https://reviews.llvm.org/D24764 llvm-svn: 282072
* Use 'enum class' instead of 'enum' in NativeRegisterContextLinux_x86_x64.Valentina Giusti2016-09-142-36/+36
| | | | | | | | | | Reviewers: labath, clayborg, zturner Subscribers: lldb-commits Differential Revision: https://reviews.llvm.org/D24578 llvm-svn: 281528
* Use Intel CPU flags to determine target supported features.Valentina Giusti2016-09-142-116/+180
| | | | | | | | | | | | | Summary: This patch uses the instruction CPUID to verify that FXSAVE, XSAVE, AVX and MPX are supported by the target hardware. In case the HW supports XSAVE, and at least one of the extended register sets, it further checks if the target software has the kernel support for such features, by verifying that their XSAVE part is correctly managed. Differential Revision: https://reviews.llvm.org/D24559 llvm-svn: 281507
* Fix for rL280668, Intel(R) Memory Protection Extensions (Intel(R) MPX) support.Valentina Giusti2016-09-082-9/+155
| | | | | | | | | | | | Summary: Signed-off-by: Valentina Giusti <valentina.giusti@intel.com> Reviewers: dvlahovski, granata.enrico, clayborg, labath Subscribers: lldb-commits Differential Revision: https://reviews.llvm.org/D24255 llvm-svn: 280942
* *** This commit represents a complete reformatting of the LLDB source codeKate Stone2016-09-0621-8451/+7371
| | | | | | | | | | | | | | | | | | | | | | | *** to conform to clang-format’s LLVM style. This kind of mass change has *** two obvious implications: Firstly, merging this particular commit into a downstream fork may be a huge effort. Alternatively, it may be worth merging all changes up to this commit, performing the same reformatting operation locally, and then discarding the merge for this particular commit. The commands used to accomplish this reformatting were as follows (with current working directory as the root of the repository): find . \( -iname "*.c" -or -iname "*.cpp" -or -iname "*.h" -or -iname "*.mm" \) -exec clang-format -i {} + find . -iname "*.py" -exec autopep8 --in-place --aggressive --aggressive {} + ; The version of clang-format used was 3.9.0, and autopep8 was 1.2.4. Secondly, “blame” style tools will generally point to this commit instead of a meaningful prior commit. There are alternatives available that will attempt to look through this change and find the appropriate prior commit. YMMV. llvm-svn: 280751
* Revert "Intel(R) Memory Protection Extensions (Intel(R) MPX) support."Dimitar Vlahovski2016-09-062-185/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit rL280668 because the register tests fail on i386 Linux. I investigated a little bit what causes the failure - there are missing registers when running 'register read -a'. This is the output I got at the bottom: """ ... Memory Protection Extensions: bnd0 = {0x0000000000000000 0x0000000000000000} bnd1 = {0x0000000000000000 0x0000000000000000} bnd2 = {0x0000000000000000 0x0000000000000000} bnd3 = {0x0000000000000000 0x0000000000000000} unknown: 2 registers were unavailable. """ Also looking at the packets exchanged between the client and server: """ ... history[308] tid=0x7338 < 19> send packet: $qRegisterInfo4a#d7 history[309] tid=0x7338 < 130> read packet: $name:bnd0;bitsize:128;offset:1032;encoding:vector;format:vector-uint64;set:Memory Protection Extensions;ehframe:101;dwarf:101;#48 history[310] tid=0x7338 < 19> send packet: $qRegisterInfo4b#d8 history[311] tid=0x7338 < 130> read packet: $name:bnd1;bitsize:128;offset:1048;encoding:vector;format:vector-uint64;set:Memory Protection Extensions;ehframe:102;dwarf:102;#52 history[312] tid=0x7338 < 19> send packet: $qRegisterInfo4c#d9 history[313] tid=0x7338 < 130> read packet: $name:bnd2;bitsize:128;offset:1064;encoding:vector;format:vector-uint64;set:Memory Protection Extensions;ehframe:103;dwarf:103;#53 history[314] tid=0x7338 < 19> send packet: $qRegisterInfo4d#da history[315] tid=0x7338 < 130> read packet: $name:bnd3;bitsize:128;offset:1080;encoding:vector;format:vector-uint64;set:Memory Protection Extensions;ehframe:104;dwarf:104;#54 history[316] tid=0x7338 < 19> send packet: $qRegisterInfo4e#db history[317] tid=0x7338 < 76> read packet: $name:bndcfgu;bitsize:64;offset:1096;encoding:vector;format:vector-uint8;#99 history[318] tid=0x7338 < 19> send packet: $qRegisterInfo4f#dc history[319] tid=0x7338 < 78> read packet: $name:bndstatus;bitsize:64;offset:1104;encoding:vector;format:vector-uint8;#8e ... """ The bndcfgu and bndstatus registers don't have the 'Memory Protections Extension' set. I looked at the code and it seems that that is set correctly. So I'm not sure what's the problem or where does it come from. Also there is a second failure related to something like this in the tests: """ registerSet.GetName().lower() """ For some reason the registerSet.GetName() returns None. llvm-svn: 280703
* Intel(R) Memory Protection Extensions (Intel(R) MPX) support.Valentina Giusti2016-09-052-11/+185
| | | | | | | | | | | | | | | | | | | | | | | | | Summary: The Intel(R) Memory Protection Extensions (Intel(R) MPX) associates pointers to bounds, against which the software can check memory references to prevent out of bound memory access. This patch allows accessing the MPX registers: * bnd0-3: 128-bit registers to hold the bound values, * bndcfgu, bndstatus: 64-bit configuration registers, This patch also adds read/write tests for the MPX registers in the register command tests and adds a new subdirectory for MPX specific tests. Signed-off-by: Valentina Giusti <valentina.giusti@intel.com> Reviewers: labath, granata.enrico, lldb-commits, clayborg Subscribers: lldb-commits Differential Revision: https://reviews.llvm.org/D24187 llvm-svn: 280668
* [NFC] Darwin llgs support from Week of CodeTodd Fiala2016-09-041-21/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This code represents the Week of Code work I did on bringing up lldb-server LLGS support for Darwin. It does not include the Xcode project changes needed, as we don't want to throw that switch until more support is implemented (i.e. this change is inert, no build systems use it yet. I've verified on Ubuntu 16.04, macOS Xcode and macOS cmake builds). This change does some minimal refactoring of code that is shared with the Linux LLGS portion, moving it from NativeProcessLinux into NativeProcessProtocol. That code is also used by NativeProcessDarwin. Current state on Darwin: * Process launching is implemented. (Attach is not). Launching on devices has not yet been tested (FBS/BKS might need a bit of work). * Inferior waitpid monitoring and communication of exit status via MainLoop callback is implemented. * Memory read/write, breakpoints, thread register context, etc. are not yet implemented. This impacts process stop/resume, as the initial launch suspended immediately starts the process up and running because it doesn't know it is supposed to remain stopped. * I implemented the equivalent of MachThreadList as NativeThreadListDarwin, in anticipation that we might want to factor out common parts into NativeThreadList{Protocol} and share some code here. After writing it, though, the fallout from merging Mach Task/Process into a single concept plus some other minor changes makes the whole NativeThreadListDarwin concept nothing more than dead weight. I am likely going to get rid of this class and just manage it directly in NativeProcessDarwin, much like I did for NativeProcessLinux. * There is a stub-out call for starting a STDIO thread. That will go away and adopt the MainLoop pselect-based IOObject reading. I am developing the fully-integrated changes in the following repo, which contains the necessary Xcode bits and the glue that enables lldb-debugserver on a macOS system: https://github.com/tfiala/lldb/tree/llgs-darwin This change also breaks out a few of the lldb-server tests into their own directory, and adds some $qHostInfo tests (not sure why I didn't write those tests back when I initially implemented that on the Linux side). llvm-svn: 280604
* Revert r280137 and 280139 and subsequent build fixesPavel Labath2016-08-311-2/+4
| | | | | | | | | | The rewrite of StringExtractor::GetHexMaxU32 changes functionality in a way which makes lldb-server crash. The crash (assert) happens when parsing the "qRegisterInfo0" packet, because the function tries to drop_front more bytes than the packet contains. It's not clear to me whether we should consider this a bug in the caller or the callee, but it any case, it worked before, so I am reverting this until we can figure out what the proper interface should be. llvm-svn: 280207
* Revert r280200 and put it a proper fixPavel Labath2016-08-311-4/+2
| | | | | | PeekChar returns a character, we want the whole string there. llvm-svn: 280204
* Update the Linux code to reflect the changes done by zturner in r280139Sylvestre Ledru2016-08-311-1/+1
| | | | llvm-svn: 280200
* Remove SYS_tgkill from Android.hPavel Labath2016-08-082-2/+1
| | | | | | instead, use __NR_tgkill directly, which seems to be the preferred form in the codebase anyway. llvm-svn: 277999
* Support loading files even when incorrect file name specified by the linkerTamas Berghammer2016-07-221-0/+14
| | | | | | | | | | | | | | | "Incorrect" file name seen on Android whene the main executable is called "app_process32" (or 64) but the linker specifies the package name (e.g. com.android.calculator2). Additionally it can be present in case of some linker bugs. This CL adds logic to try to fetch the correct file name from the proc file system based on the base address sepcified by the linker in case we are failed to load the module by name. Differential revision: http://reviews.llvm.org/D22219 llvm-svn: 276411
* Unify process launching code on linuxPavel Labath2016-07-212-234/+19
| | | | | | | | | | | | | | | | | | | | | | | Summary: We've had two copies of code for launching processes: - one in NativeProcessLinux, used for launching debugged processes - one in ProcessLauncherAndroid, used on android for launching all other kinds of processes These have over time acquired support for various launch options, but neither supported all of them. I now replace them with a single implementation ProcessLauncherLinux, which supports all the options the individual versions supported and set it to be used to launch all processes on linux. This also works around the ETXTBSY issue on android when the process is started from the platform instance, as that used to go through the version which did not contain the workaround. Reviewers: tberghammer Subscribers: tberghammer, danalbert, srhines, lldb-commits Differential Revision: https://reviews.llvm.org/D22457 llvm-svn: 276288
* [LLVM][MIPS] Revert support for FRE.Nitesh Jain2016-07-181-2/+4
| | | | | | | Reviewers: jaydeep Subscribers: bhushan, mohit.bhakkad, slthakur, llvm-commits llvm-svn: 275785
* [NPL] Simplify process launch codePavel Labath2016-07-152-180/+75
| | | | | | | | | | | | | | Summary: This removes one level of indirection, which was just packing and repacking launch args into different structures. NFC. Reviewers: tberghammer Subscribers: lldb-commits Differential Revision: https://reviews.llvm.org/D22357 llvm-svn: 275544
* [NPL] Increase ETXTBSY workaround sleepPavel Labath2016-07-121-1/+1
| | | | | | 10ms does not seem to be enough all the time, go to 50. llvm-svn: 275175
* Change the /proc/<pid>/maps to not assert on incorrect inputTamas Berghammer2016-07-111-12/+9
| | | | | | | | | | If LLDB reads some incorrect input form /proc/<pid>/maps then it should report an error instead of assert-ing as we don't want to crash in case of an incorrect maps file. Differential revision: http://reviews.llvm.org/D22211 llvm-svn: 275060
* [LLGS] Work around an adb bug on Android <=MPavel Labath2016-07-071-0/+12
| | | | | | | On android M it can happen that we get a ETXTBSY, when we try to launch the inferior. Sleeping and retrying should help us get more stable results. llvm-svn: 274763
* Implement GetMemoryRegions() for Linux and Mac OSX core files.Howard Hellyer2016-07-071-12/+6
| | | | | | | | | | | | | | | Summary: This patch fills in the implementation of GetMemoryRegions() on the Linux and Mac OS core file implementations of lldb_private::Process (ProcessElfCore::GetMemoryRegions and ProcessMachCore::GetMemoryRegions.) The GetMemoryRegions API was added under: http://reviews.llvm.org/D20565 The patch re-uses the m_core_range_infos list that was recently added to implement GetMemoryRegionInfo in both ProcessElfCore and ProcessMachCore to ensure the returned regions match the regions returned by Process::GetMemoryRegionInfo(addr_t load_addr, MemoryRegionInfo &region_info). Reviewers: clayborg Subscribers: labath, lldb-commits Differential Revision: http://reviews.llvm.org/D21751 llvm-svn: 274741
* [LLGS] Log more precise errors during inferior launchPavel Labath2016-07-062-113/+129
| | | | | | | | | | | | | | Summary: We are seeing infrequent failures to launch the inferior process on android. The failing call seems to be execve(). This adds more logging to see the actual error reported by the call. Reviewers: tberghammer Subscribers: tberghammer, lldb-commits, danalbert Differential Revision: http://reviews.llvm.org/D22039 llvm-svn: 274624
* Improve watchpoint error reporting specially for arm/aarch64 targetsOmair Javaid2016-06-272-2/+2
| | | | | | Differential revision: http://reviews.llvm.org/D21164 llvm-svn: 273869
* Allow unaligned byte/word selection watchpoints for arm- linux/android targets.Omair Javaid2016-06-272-2/+44
| | | | | | Differential revision: http://reviews.llvm.org/D21516 llvm-svn: 273863
* Allow installing watchpoints at less than 8-byte alligned addresses for ↵Omair Javaid2016-06-162-3/+42
| | | | | | | | | | | | AArch64 targets This patch allows LLDB for AArch64 to watch all bytes, words or double words individually on non 8-byte alligned addresses. This patch also adds tests to verify this functionality. Differential revision: http://reviews.llvm.org/D21280 llvm-svn: 272916
* Remove Platform usages from NativeProcessLinuxPavel Labath2016-06-142-145/+33
| | | | | | | | | | | | | | | | Summary: This removes the last usage of the Platform plugin in NPL. It was being used for determining the architecture of the debugged process. I replace the call that went through the Platform plugin with a lower level call on the ObjectFile directly. Reviewers: tberghammer Subscribers: uweigand, nitesh.jain, omjavaid, lldb-commits Differential Revision: http://reviews.llvm.org/D21324 llvm-svn: 272686
* Remove Mutex from NativeProcessLinuxPavel Labath2016-05-162-20/+1
| | | | | | | | NPL now assumes it is running from a single thread now, so its thread-safety is untested anyway (and if that assumption is broken, we'll have bigger problems (due to ptrace restrictions) than a couple of missing mutexes). llvm-svn: 269640
* Support Linux on SystemZ as platformUlrich Weigand2016-04-144-0/+869
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for Linux on SystemZ: - A new ArchSpec value of eCore_s390x_generic - A new directory Plugins/ABI/SysV-s390x providing an ABI implementation - Register context support - Native Linux support including watchpoint support - ELF core file support - Misc. support throughout the code base (e.g. breakpoint opcodes) - Test case updates to support the platform This should provide complete support for debugging the SystemZ platform. Not yet supported are optional features like transaction support (zEC12) or SIMD vector support (z13). There is no instruction emulation, since our ABI requires that all code provide correct DWARF CFI at all PC locations in .eh_frame to support unwinding (i.e. -fasynchronous-unwind-tables is on by default). The implementation follows existing platforms in a mostly straightforward manner. A couple of things that are different: - We do not use PTRACE_PEEKUSER / PTRACE_POKEUSER to access single registers, since some registers (access register) reside at offsets in the user area that are multiples of 4, but the PTRACE_PEEKUSER interface only allows accessing aligned 8-byte blocks in the user area. Instead, we use a s390 specific ptrace interface PTRACE_PEEKUSR_AREA / PTRACE_POKEUSR_AREA that allows accessing a whole block of the user area in one go, so in effect allowing to treat parts of the user area as register sets. - SystemZ hardware does not provide any means to implement read watchpoints, only write watchpoints. In fact, we can only support a *single* write watchpoint (but this can span a range of arbitrary size). In LLDB this means we support only a single watchpoint. I've set all test cases that require read watchpoints (or multiple watchpoints) to expected failure on the platform. [ Note that there were two test cases that install a read/write watchpoint even though they nowhere rely on the "read" property. I've changed those to simply use plain write watchpoints. ] Differential Revision: http://reviews.llvm.org/D18978 llvm-svn: 266308
* Process: fix the build with certain kernel versionsSaleem Abdulrasool2016-04-121-0/+2
| | | | | | | | The structure definitions are not provided, but we perform a sizeof operation of them which causes a build failure. Include `asm/ptrace.h` to get the structure definitions. llvm-svn: 266042
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