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* Leave OS type and vendor as unspecified unknowns.Oleksiy Vyalov2015-05-291-6/+0
| | | | | | http://reviews.llvm.org/D10080 llvm-svn: 238623
* [LLDB][MIPS] Add MIPS32 and MIPS64 core revisionsMohit K. Bhakkad2015-04-231-4/+35
| | | | | | | | | | | | | | | Patch by Jaydeep Patil Added MIPS32 and MIPS64 core revisions. This would be followed by register context and emulate-instruction for MIPS32. DYLDRendezvous.cpp: On Linux link map struct does not contain extra load offset field. Reviewers: clayborg Subscribers: bhushan, mohit.bhakkad, sagar, lldb-commits. Differential Revision: http://reviews.llvm.org/D9190 llvm-svn: 235574
* Fix type detection for 'char' variablesTamas Berghammer2015-03-311-0/+26
| | | | | | | | | | | | A char can have signed and unsigned encoding but previously lldb always assumed it is signed. This CL adds a logic to detect the encoding of 'char' types based on the default encoding on the target architecture. It fixes variable printing and expression evaluation on architectures where 'char' is signed by default. Differential revision: http://reviews.llvm.org/D8636 llvm-svn: 233682
* Move some functions from source/lldb.cpp to Utility.Zachary Turner2015-03-181-1/+3
| | | | | | | | | | Specifically, there were some functions for converting enums to strings and a function for matching a string using a specific matching algorithm. This moves those functions to more appropriate headers in lldb/Utility and updates references to include the new headers. llvm-svn: 232673
* [MIPS] - Register Context for MIPS64Mohit K. Bhakkad2015-03-171-1/+3
| | | | | | | | | | | | | | | | Patch by Jaydeep Patil Summery: 1. Add MIPS variants by parsing e_flags of the ELF 2. Create RegisterInfoInterface and RegisterContext for MIPS64 and MIPS64EL Reviewers: clayborg Subscribers: tberghammer, bhushan, mohit.bhakkad, sagar Differential Revision: http://reviews.llvm.org/D8166 llvm-svn: 232467
* Don't stomp the triple when loading a PECOFF target.Zachary Turner2015-01-221-0/+13
| | | | | | | | | | | | | | | | | | | | | When you create a target, it tries to look for the platform's list of supported architectures for a match. The match it finds can contain specific triples, like i386-pc-windows-msvc. Later, we overwrite this value with the most generic triple that can apply to any platform with COFF support, causing some of the fields of the triple to get overwritten. This patch changes the behavior to only merge in values from the COFF triple if the fields of the matching triple were unknown/unspecified to begin with. This fixes load address resolution on Windows, since it enables the DynamicLoaderWindows to be used instead of DynamicLoaderStatic. Reviewed by: Greg Clayton Differential Revision: http://reviews.llvm.org/D7120 llvm-svn: 226849
* Handle thumb IT instructions correctly all the time.Greg Clayton2014-12-091-0/+110
| | | | | | | | | | | | | | | | | | | | | | The issue with Thumb IT (if/then) instructions is the IT instruction preceeds up to four instructions that are made conditional. If a breakpoint is placed on one of the conditional instructions, the instruction either needs to match the thumb opcode size (2 or 4 bytes) or a BKPT instruction needs to be used as these are always unconditional (even in a IT instruction). If BKPT instructions are used, then we might end up stopping on an instruction that won't get executed. So if we do stop at a BKPT instruction, we need to continue if the condition is not true. When using the BKPT isntructions are easy in that you don't need to detect the size of the breakpoint that needs to be used when setting a breakpoint even in a thumb IT instruction. The bad part is you will now always stop at the opcode location and let LLDB determine if it should auto-continue. If the BKPT instruction is used, the BKPT that is used for ARM code should be something that also triggers the BKPT instruction in Thumb in case you set a breakpoint in the middle of code and the code is actually Thumb code. A value of 0xE120BE70 will work since the lower 16 bits being 0xBE70 happens to be a Thumb BKPT instruction. The alternative is to use trap or illegal instructions that the kernel will translate into breakpoint hits. On Mac this was 0xE7FFDEFE for ARM and 0xDEFE for Thumb. The darwin kernel currently doesn't recognize any 32 bit Thumb instruction as a instruction that will get turned into a breakpoint exception (EXC_BREAKPOINT), so we had to use the BKPT instruction on Mac. The linux kernel recognizes a 16 and a 32 bit instruction as valid thumb breakpoint opcodes. The benefit of using 16 or 32 bit instructions is you don't stop on opcodes in a IT block when the condition doesn't match. To further complicate things, single stepping on ARM is often implemented by modifying the BCR/BVR registers and setting the processor to stop when the PC is not equal to the current value. This means single stepping is another way the ARM target can stop on instructions that won't get executed. This patch does the following: 1 - Fix the internal debugserver for Apple to use the BKPT instruction for ARM and Thumb 2 - Fix LLDB to catch when we stop in the middle of a Thumb IT instruction and continue if we stop at an instruction that won't execute 3 - Fixes this in a way that will work for any target on any platform as long as it is ARM/Thumb 4 - Adds a patch for ignoring conditions that don't match when in ARM mode (see below) This patch also provides the code that implements the same thing for ARM instructions, though it is disabled for now. The ARM patch will check the condition of the instruction in ARM mode and continue if the condition isn't true (and therefore the instruction would not be executed). Again, this is not enable, but the code for it has been added. <rdar://problem/19145455> llvm-svn: 223851
* Sketch out the armv7 and arm64 core file writing support inJason Molenda2014-11-121-2/+2
| | | | | | | | | | | | | | | ObjectFileMachO. It's close but we seem to be missing some of the memory region segments - not exactly sure how that's happening. The register context writing into the LC_THREAD load commands is working correctly though. Slightly reordered the arm64 definitions in ArchSpec.cpp so when we look for an arm64 core file definiton we're getting a cpu subtype of CPU_ANY which we can't put in the mach header of a core file. Make the first definition we find by linear search have the currently correct '1' cpu subtype. llvm-svn: 221743
* Fix some bugs from D5988Justin Hibbits2014-10-311-1/+0
| | | | | | | | | | | | | | | | | | Summary: Ed Maste found some problems with the commit in D5988. Address most of these. While here, also add floating point return handling. This doesn't handle 128-bit long double yet. Since I don't have any system that uses it, I don't currently have plans to implement it. Reviewers: emaste Reviewed By: emaste Subscribers: emaste, lldb-commits Differential Revision: http://reviews.llvm.org/D6049 llvm-svn: 220963
* First cut of PowerPC(64) support in LLDB.Justin Hibbits2014-10-311-2/+3
| | | | | | | | | | | | | | | | | | | | | | | Summary: This adds preliminary support for PowerPC/PowerPC64, for FreeBSD. There are some issues still: * Breakpoints don't work well on powerpc64. * Shared libraries don't yet get loaded for a 32-bit process on powerpc64 host. * Backtraces don't work. This is due to PowerPC ABI using a backchain pointer in memory, instead of a dedicated frame pointer register for the backchain. * Breakpoints on functions without debug info may not work correctly for 32-bit powerpc. Reviewers: emaste, tfiala, jingham, clayborg Reviewed By: clayborg Subscribers: emaste, lldb-commits Differential Revision: http://reviews.llvm.org/D5988 llvm-svn: 220944
* Very minimal support 24-bit kalimbas. Vanilla "memory read" for data sectionsMatthew Gardiner2014-09-291-18/+5
| | | | | | | | | | | works, as do breakpoints, run and pause, display zeroth frame. See http://reviews.llvm.org/D5503 for a fuller description of the changes in this commit. llvm-svn: 218596
* Add an interface on ArchSpec to provide lldb client codeMatthew Gardiner2014-09-011-0/+34
| | | | | | | with a mechanism to query if the current target architecture has non 8-bit bytes. llvm-svn: 216867
* lldb - towards AArch64 being recognised as platform architectureTodd Fiala2014-08-281-0/+36
| | | | | | | | See http://reviews.llvm.org/D4381. Change by Paul Osmialowski. llvm-svn: 216668
* Add support for kalimba architecture variants 3, 4 and 5.Matthew Gardiner2014-08-271-2/+18
| | | | | | | | Add entries to core_definitions and elf_arch_entries for those variants. Select the subtype for the variant by parsing the e_flags field of the elf header. llvm-svn: 216541
* Move Host::GetArchitecture to HostInfo::GetArchitecture.Zachary Turner2014-08-201-7/+8
| | | | | | | | As a side effect, this patch also eliminates all of the preprocessor conditionals previously used to implement GetArchitecture(). llvm-svn: 216074
* add missing break. Fix CID 1229446 & 1203680Sylvestre Ledru2014-08-181-3/+5
| | | | llvm-svn: 215894
* When constructing an ArchSpec from a MachO cpu type and subtype, don't set ↵Greg Clayton2014-07-291-0/+9
| | | | | | | | the OS for x86_64 and x86 in case the binary ends up being for macosx or ios. <rdar://problem/17819272> llvm-svn: 214188
* Fix supported architectures on PlatformWindows.Zachary Turner2014-07-281-2/+6
| | | | | | | | | | i386, i486, i486sx, and i686 are all indistinguishable as far as PE/COFF files are concerned. This patch adds support for all of these architectures to PlatformWindows. Differential Revision: http://reviews.llvm.org/D4658 llvm-svn: 214092
* Fix the MSVC build. MSVC does not support constexpr.Zachary Turner2014-07-281-1/+1
| | | | llvm-svn: 214091
* Make sure we don't crash if someone (E.G.) comments out on entry from ↵Greg Clayton2014-07-231-6/+11
| | | | | | | | | | g_core_definitions[] without removing the ArchSpec::Core enumeration when submitting from source. We now catch the issue with a static_assert() at compile time and use llvm::array_lengthof(g_core_definitions) as well. <rdar://problem/17767541> llvm-svn: 213778
* Update lldb to track recent Triple arm64 enum removal and collapse into aarch64.Todd Fiala2014-07-231-2/+2
| | | | | | | | | | | See the following llvm change for details: r213743 | tnorthover | 2014-07-23 05:32:47 -0700 (Wed, 23 Jul 2014) | 9 lines AArch64: remove arm64 triple enumerator. This change fixes build breaks on Linux and MacOSX lldb. llvm-svn: 213755
* Add kalimba as a platform.Todd Fiala2014-07-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | This change comprises of additions and some minor changes in order that "kalimba" is listed as a supported platform and that debugging any kalimbas results in PlatformKalimba being associated with the target. The changes are as follows: * The PlatformKalimba implementation itself * A tweak to ArchSpec * .note parsing for Kalimba in ObjectFileELF.cpp * Plugin registration * Makefile additions Change by Matthew Gardiner Minor tweak for cmake and Xcode by Todd Fiala Tested: Ubuntu 14.04 x86_64, clang 3.5-built lldb, all tests pass. MacOSX 10.9.4, Xcode 6.0 Beta 1-built lldb, all tests pass. llvm-svn: 213158
* lldb.LLDB_ARCH_DEFAULT now works correctly on Macs with haswell enabled kernels.Greg Clayton2014-07-141-0/+9
| | | | | | <rdar://problem/17604133> llvm-svn: 213004
* Allow generic ARM cores to match any more specific ARM architecture.Greg Clayton2014-07-121-1/+9
| | | | | | <rdar://problem/15932248> llvm-svn: 212863
* Cleanup the iOS simulator code.Greg Clayton2014-07-101-27/+4
| | | | | | | | | | | Fixes include: - Don't say that "<arch>-apple-ios" is compatible with "<arch>-apple-macosx" - Fixed DynamicLoaderMacOSXDYLD so specify an architecture that was converted solely from a cputype and subtype, just specify the file + UUID. - Fixed PlatformiOSSimulator::GetSupportedArchitectureAtIndex() so it returns the correct archs - Fixed SymbolFileDWARFDebugMap to load .o files correctly by just specifying the architecture without the vendor and OS now that "<arch>-apple-ios" is not compatible with "<arch>-apple-macosx" so we can load .o files correctly for DWARF with debug map - Fixed the coded in TargetList::CreateTarget() so it does the right thing with an underspecified triple where just the arch is specified. llvm-svn: 212783
* Add Kalimba support to ArchSpec.Todd Fiala2014-07-011-2/+6
| | | | | | | | | See http://lists.cs.uiuc.edu/pipermail/lldb-commits/Week-of-Mon-20140630/011508.html for more details. Change by Matthew Gardiner. llvm-svn: 212145
* lldb: remove adhoc implementation of array_sizeofSaleem Abdulrasool2014-06-271-5/+5
| | | | | | | | Replace adhoc inline implementation of llvm::array_lengthof in favour of the implementation in LLVM. This is simply a cleanup change, no functional change intended. llvm-svn: 211868
* iOS simulator cleanup to make sure we use "*-apple-ios" for iOS simulator ↵Greg Clayton2014-05-291-4/+28
| | | | | | | | | | | | | | | | | | apps and binaries. Changes include: - ObjectFileMachO can now determine if a binary is "*-apple-ios" or "*-apple-macosx" by checking the min OS and SDK load commands - ArchSpec now says "<arch>-apple-macosx" is equivalent to "<arch>-apple-ios" since the simulator mixes and matches binaries (some from the system and most from the iOS SDK). - Getting process inforamtion on MacOSX now correctly classifies iOS simulator processes so they have "*-apple-ios" architectures in the ProcessInstanceInfo - PlatformiOSSimulator can now list iOS simulator processes correctly instead of showing nothing by using: (lldb) platform select ios-simulator (lldb) platform process list - debugserver can now properly return "*-apple-ios" for the triple in the process info packets for iOS simulator executables - GDBRemoteCommunicationClient now correctly passes along the triples it gets for process info by setting the OS in the llvm::Triple correctly <rdar://problem/17060217> llvm-svn: 209852
* Added i686 architecture (ArchSpec::Core::eCore_x86_32_i686).Virgile Bello2014-04-081-0/+1
| | | | llvm-svn: 205770
* Workaround for collision between enum members in LLVM's MachO.h and system ↵Jim Ingham2014-04-021-1/+1
| | | | | | | | | | headers on Mac OS X (in particular mach/machine.h). <rdar://problem/16494607> llvm-svn: 205480
* lldb arm64 import.Jason Molenda2014-03-291-0/+6
| | | | | | | | | | | | | | | | These changes were written by Greg Clayton, Jim Ingham, Jason Molenda. It builds cleanly against TOT llvm with xcodebuild. I updated the cmake files by visual inspection but did not try a build. I haven't built these sources on any non-Mac platforms - I don't think this patch adds any code that requires darwin, but please let me know if I missed something. In debugserver, MachProcess.cpp and MachTask.cpp were renamed to MachProcess.mm and MachTask.mm as they picked up some new Objective-C code needed to launch processes when running on iOS. llvm-svn: 205113
* update for renaming in LLVMSaleem Abdulrasool2014-03-111-1/+1
| | | | llvm-svn: 203533
* Initial patch for supporting Hexagon DSPDeepak Panickal2014-02-191-1/+10
| | | | llvm-svn: 201665
* Add support for Haswell on x86_64.Greg Clayton2014-01-221-3/+5
| | | | | | <rdar://problem/15312873> llvm-svn: 199854
* Added distribution info to ArchSpec and qHostInfo message.Todd Fiala2014-01-181-5/+26
| | | | | | | | | | | | | | | | | | | ArchSpec now contains an optional distribution_id, with getters and setters. Host::GetArchitecture () sets it on non-Apple platforms using Host::GetDistributionId (). The distribution_id is ignored during ArchSpec comparisons. The gdb remote qHostInfo message transmits it, if set, via the distribution_id={id-value} key/value pair. Updated gdb remote docs to reflect this change. As before, GetDistributionId () returns nothing on non-Linux platforms at this time. On Linux, it is returned only if the lsb_platform command is installed (in /bin or /usr/bin), and only if the distributor id key is returned by 'lsb_platform -i'. This id is lowercased, and whitespace is replaced with underscores. llvm-svn: 199539
* POSIX RegisterContext for mips64Ed Maste2013-10-101-2/+4
| | | | | | | | | Based on the POSIX x86_64 register context. This is sufficient for opening a mips64 (big endian) core file. Subsequent changes will connect the disassembler, dynamic loader support, ABI, etc. Review: http://llvm-reviews.chandlerc.com/D1873 llvm-svn: 192335
* Add entries for arm6m to ArchSpec's g_macho_arch_entries.Jason Molenda2013-10-081-0/+2
| | | | | | <rdar://problem/15099306> llvm-svn: 192161
* Mark armv6m as "compatible" with armv7 - that's theJason Molenda2013-09-271-1/+1
| | | | | | | | closest ISA. armv6 wouldn't have the handful of T32 instructions that the Cortex-M0 ISA specifies. <rdar://problem/15099306> llvm-svn: 191588
* Add definitions for "armv6m", which indicates a Cortex-M0 processor.Jason Molenda2013-09-271-0/+11
| | | | | | | It uses the T16 and a few T32 instructions from the ARMv7-A ISA. <rdar://problem/15099306> llvm-svn: 191587
* Fix some names in the wake of my Mach-O changes to LLVM.Charles Davis2013-08-271-51/+51
| | | | llvm-svn: 189317
* Plugins/ObjectFile/PECOFF: Use enums from LLVM, and don't use Mach-O ↵Charles Davis2013-08-271-1/+21
| | | | | | | | | | definitions. Since I renamed most of the LLVM Mach-O enums in r189314, I had to go fix LLDB to use the new names. While I was here, I decided that a COFF plugin really shouldn't be using Mach-O enums. llvm-svn: 189316
* Change PowerPC to have the correct byte order.Greg Clayton2013-08-121-15/+15
| | | | llvm-svn: 188189
* Add recognition of two more armv7 variants, armv7m and armv7em.Jason Molenda2013-03-081-4/+14
| | | | | | <rdar://problem/13361372> llvm-svn: 176674
* <rdar://problem/13069948>Greg Clayton2013-01-251-4/+4
| | | | | | | | | | | | Major fixed to allow reading files that are over 4GB. The main problems were that the DataExtractor was using 32 bit offsets as a data cursor, and since we mmap all of our object files we could run into cases where if we had a very large core file that was over 4GB, we were running into the 4GB boundary. So I defined a new "lldb::offset_t" which should be used for all file offsets. After making this change, I enabled warnings for data loss and for enexpected implicit conversions temporarily and found a ton of things that I fixed. Any functions that take an index internally, should use "size_t" for any indexes and also should return "size_t" for any sizes of collections. llvm-svn: 173463
* <rdar://problem/12990038>Greg Clayton2013-01-111-1/+1
| | | | | | Fixed an issue where the platform auto select code was changing the architecture and causing the wrong architecture to be assigned to the target. llvm-svn: 172251
* Removed the == and != operators from ArchSpec, sinceSean Callanan2012-12-131-27/+21
| | | | | | | | | | | | equality can be strict or loose and we want code to explicitly choose one or the other. Also renamed the Compare function to IsEqualTo, to avoid confusion. <rdar://problem/12856749> llvm-svn: 170152
* Add new ArchSpec methods, IsCompatibleMatch() and IsExactMatch(). Jason Molenda2012-11-041-176/+91
| | | | | | | | | | | | | | | | | | | | | The operator== method is a synonym for IsExactMatch(). The essential difference between these two is that IsCompatibleMatch() will say that armv7 and armv7s are compatible and return true. IsExactMatch() will say that armv7 and armv7s are not a match. An armv7s cpu can run either generic armv7 binaries or armv7s binaries (the latter being tuned for it). When we're picking the slice of a universal Mach-O file to load in an armv7s Target, we need to be able to first look for an exact cpu subtype match (armv7s == armv7s) and failing that, looking for a slice with a compatible architecture. Update ObjectContainerUniversalMachO::GetObjectFile to prefer an exact match of the cpu type, falling back to a compatible match if necessary. <rdar://problem/12593515> llvm-svn: 167365
* A patch that allows for mach-o architectures to be specified as ↵Greg Clayton2012-09-191-96/+107
| | | | | | "<number>-<number>" where the first number is the cpu type and the second is the cpu subtype. Also added code to allow use of mach-o architectures that aren't in our tables so that symbolication and static file introspection (crashlogs) can work with them. llvm-svn: 164258
* Allow for numeric cputype-cpusubtype specifications where the subtype is 0. ↵Jason Molenda2012-09-181-2/+5
| | | | | | | | Use errno to detect strtoul parse failure instead of return value of 0. <rdar://problem/12198994> llvm-svn: 164183
* rdar://problem/11374963Johnny Chen2012-08-281-0/+9
| | | | | | | Fix a subtle ArchSpec::cores_match() logic issue which prevents the add-dsym command to add a debug symbol file to one of the target's current modules. llvm-svn: 162802
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