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* Revert r362743 "Revert "Revert "Reland D61583 [ELF] Error on relocations to ↵Hans Wennborg2019-06-255-36/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STT_SECTION symbols if the sections were discarded""" (In effect, reverting "[ELF] Error on relocations to STT_SECTION symbols if the sections were discarded".) It caused debug info problems in LibreOffice [1] and Chromium/V8 [2]. Reverting until those can be fixed. It also reverts r362497 "STT_SECTION symbol should be defined" on .eh_frame, .debug*, .zdebug* and .gcc_except_table" which was landed as a follow-up to the above. > With -r or --emit-relocs, we warn `STT_SECTION symbol should be defined` > on relocations to discarded section symbol. This was added as an error > in rLLD319404, but was not so effective before D61583 (it turned the > error to a warning). > > Relocations from .eh_frame .debug* .zdebug* .gcc_except_table to > discarded .text are very common and somewhat expected. Don't warn/error > on them. As a reference, ld.bfd has a similar logic in > _bfd_elf_default_action_discarded() to allow these cases. > > Delete invalid-undef-section-symbol.test because what it intended to > check is now covered by the updated comdat-discarded-reloc.s > > Delete relocatable-eh-frame.s because we allow relocations from > .eh_frame as a special case now. And finally it reverts r362218 "[ELF] Replace a dead test in getSymVA() with assert()" as that also depended on the main change reverted here. > Symbols relative to discarded comdat sections are Undefined instead of > Defined now (after D59649 and D61583). The `== &InputSection::Discarded` > test becomes dead. I cannot find a test related to this behavior. [1] http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20190603/659848.html [2] https://bugs.chromium.org/p/chromium/issues/detail?id=978067 llvm-svn: 364321
* Fix an issue that common symbols are not internalized under some condition.Rui Ueyama2019-06-251-3/+3
| | | | | | | | | | | | | | | | | | | | r360841 introduced CommonSymbol class. An unintended behavioral change introduced by that change was that common symbols are not internalized by LTO under some condition. This patch fixes that issue. The issue occurred under the following condition: 1. There exists a common symbol 2. At least one DSO is given to lld or -pie is used If the above conditions are met, Symbol::includeInDynsym() returned a wrong value for a common symbol. Fixes https://bugs.llvm.org/show_bug.cgi?id=41978 Differential Revision: https://reviews.llvm.org/D63752 llvm-svn: 364273
* [ELF][PPC][X86] Use [-2**(n-1), 2**n) to check overflows for R_PPC_ADDR16, ↵Fangrui Song2019-06-244-6/+15
| | | | | | | | | | | | | | | | | | | | | R_PPC64_ADDR{16,32}, R_X86_64_{8,16} Similar to R_AARCH64_ABS32, R_PPC64_ADDR32 can represent either a signed value or unsigned value, thus we should use `[-2**(n-1), 2**n)` instead of `[-2**(n-1), 2**(n-1))` to check overflows. The issue manifests as a bogus linker error when linking the powerpc64le Linux kernel. The new behavior is compatible with ld.bfd's complain_overflow_bitfield. The upper bound of the error message is not correct. Fix it as well. The changes to R_PPC_ADDR16, R_PPC64_ADDR16, R_X86_64_8 and R_X86_64_16 are similar. Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D63690 llvm-svn: 364164
* lld/elf: Deduplicate undefined symbol diagnosticsNico Weber2019-06-203-31/+99
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before: ``` ld.lld: error: undefined symbol: f() >>> referenced by test.cc:3 >>> /var/folders/c5/8d7sdn1x2mg92mj0rndghhdr0000gn/T/test-9c0808.o:(g()) ld.lld: error: undefined symbol: f() >>> referenced by test.cc:4 >>> /var/folders/c5/8d7sdn1x2mg92mj0rndghhdr0000gn/T/test-9c0808.o:(h()) ld.lld: error: undefined symbol: f() >>> referenced by test.cc:5 >>> /var/folders/c5/8d7sdn1x2mg92mj0rndghhdr0000gn/T/test-9c0808.o:(j()) ld.lld: error: undefined symbol: k() >>> referenced by test.cc:5 >>> /var/folders/c5/8d7sdn1x2mg92mj0rndghhdr0000gn/T/test-9c0808.o:(j()) ld.lld: error: undefined symbol: f() >>> referenced by test2.cc:2 >>> /var/folders/c5/8d7sdn1x2mg92mj0rndghhdr0000gn/T/test2-07b391.o:(asdf()) clang: error: linker command failed with exit code 1 (use -v to see invocation) ``` Now: ``` ld.lld: error: undefined symbol: f() >>> referenced by test.cc:3 >>> /var/folders/c5/8d7sdn1x2mg92mj0rndghhdr0000gn/T/test-0e07ba.o:(g()) >>> referenced by test.cc:4 >>> /var/folders/c5/8d7sdn1x2mg92mj0rndghhdr0000gn/T/test-0e07ba.o:(h()) >>> referenced by test.cc:5 >>> /var/folders/c5/8d7sdn1x2mg92mj0rndghhdr0000gn/T/test-0e07ba.o:(j()) >>> referenced by test2.cc:2 >>> /var/folders/c5/8d7sdn1x2mg92mj0rndghhdr0000gn/T/test2-6bdb24.o:(asdf()) ld.lld: error: undefined symbol: k() >>> referenced by test.cc:5 >>> /var/folders/c5/8d7sdn1x2mg92mj0rndghhdr0000gn/T/test-0e07ba.o:(j()) clang: error: linker command failed with exit code 1 (use -v to see invocation) ``` If there are more than 10 references to an undefined symbol, only the first 10 are printed. Fixes PR42260. Differential Revision: https://reviews.llvm.org/D63344 llvm-svn: 363962
* [ELF][ARM][AARCH64][MIPS][PPC] Simplify the logic to create R_*_RELATIVE for ↵Fangrui Song2019-06-207-19/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | absolute relocation types in writable sections Summary: Our rule to create R_*_RELATIVE for absolute relocation types were loose. D63121 made it stricter but it failed to create R_*_RELATIVE for R_ARM_TARGET1 and R_PPC64_TOC. rLLD363236 worked around that by reinstating the original behavior for ARM and PPC64. This patch is an attempt to simplify the logic. Note, in ld.bfd, R_ARM_TARGET2 --target2=abs also creates R_ARM_RELATIVE. This seems a very uncommon scenario (moreover, --target2=got-rel is the default), so I do not implement any logic related to it. Also, delete R_AARCH64_ABS32 from AArch64::getDynRel. We don't have working ILP32 support yet. Allowing it would create an incorrect R_AARCH64_RELATIVE. For MIPS, the (if SymbolRel, then RelativeRel) code is to keep its behavior unchanged. Note, in ppc64-abs64-dyn.s, R_PPC64_TOC gets an incorrect addend because computeAddend() doesn't compute the correct address. We seem to have the wrong behavior for a long time. The important thing seems that a dynamic relocation R_PPC64_TOC should not be created as the dynamic loader will error R_PPC64_TOC is not supported. Reviewers: atanasyan, grimar, peter.smith, ruiu, sfertile, espindola Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D63383 llvm-svn: 363928
* [ELF][ARM] Merge handleARMTlsRelocation() into handleTlsRelocation()Fangrui Song2019-06-202-68/+38
| | | | | | | | | | | | | | | | | | | | | | | ARM and RISC-V do not support TLS relaxations. However, for General Dynamic and Local Dynamic models, if we are producing an executable and the symbol is non-preemptable, we know it must be defined and the R_ARM_TLS_DTPMOD32/R_RISCV_TLS_DTPMOD{32,64} dynamic relocation can be omitted because it is always 1. This may be necessary for static linking as DTPMOD may not be expected at load time. Merge handleARMTlsRelocation() into handleTlsRelocation(). This requires more logic to R_TLSGD_PC and R_TLSLD_PC. Because we use SymbolicRel to resolve the relocation at link time, R_ARM_TLS_DTPMOD32 can be deleted from relocateOne(). It cannot be used as a static relocation type. As a bonus, the additional logic in R_TLSGD_PC code can be shared by the TLS support for RISC-V (D63220). Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D63333 llvm-svn: 363927
* [Remarks] Extend -fsave-optimization-record to specify the formatFrancis Visoiu Mistrih2019-06-174-0/+5
| | | | | | | | | Use -fsave-optimization-record=<format> to specify a different format than the default, which is YAML. For now, only YAML is supported. llvm-svn: 363573
* Remove two unused parametersNico Weber2019-06-141-4/+2
| | | | llvm-svn: 363419
* [ELF] Don't emit dynamic relocations with weak undef in writable sectionsFangrui Song2019-06-141-8/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | In processRelocAux(), our handling of 1) link-time constant and 2) weak undef is the same, so put them together to simplify the logic. This moves the weak undef code around. The result is that: in a writable section (or -z notext), we will no longer emit dynamic relocations for weak undefined symbols. The new behavior seems to match GNU linkers, and improves consistency with the case of a readonly section. The condition `!Config->Shared` was there probably because it is common for a -shared link not to specify full dependencies. Keep it now but we may revisit the decision in the future. gABI says: > The behavior of weak symbols in areas not specified by this document is > implementation defined. Weak symbols are intended primarily for use in > system software. Applications using weak symbols are unreliable since > changes in the runtime environment might cause the execution to fail. Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D63003 llvm-svn: 363399
* Add --undefined-glob which is an --undefined with wildcard pattern matchRui Ueyama2019-06-142-9/+38
| | | | | | | | | | | | | | | | | | | | | This patch adds new command line option `--undefined-glob` to lld. That option is a variant of `--undefined` but accepts wildcard patterns so that all symbols that match with a given pattern are handled as if they were given by `-u`. `-u foo` is to force resolve symbol foo if foo is not a defined symbol and there's a static archive that contains a definition of symbol foo. Now, you can specify a wildcard pattern as an argument for `--undefined-glob`. So, if you want to include all JNI symbols (which start with "Java_"), you can do that by passing `--undefined-glob "Java_*"` to the linker, for example. In this patch, I use the same glob pattern matcher as the version script processor is using, so it does not only support `*` but also `?` and `[...]`. Differential Revision: https://reviews.llvm.org/D63244 llvm-svn: 363396
* [ELF][RISCV] Create dummy .sdata for __global_pointer$ if .sdata does not existFangrui Song2019-06-145-3/+42
| | | | | | | | | | | | | | | | | | | | | | | | | If .sdata is absent, linker synthesized __global_pointer$ gets a section index of SHN_ABS. (ld.bfd has a similar issue: binutils PR24678) Scrt1.o may use `lla gp, __global_pointer$` to reference the symbol PC relatively. In -pie/-shared mode, lld complains if a PC relative relocation references an absolute symbol (SHN_ABS) but ld.bfd doesn't: ld.lld: error: relocation R_RISCV_PCREL_HI20 cannot refer to lute symbol: __global_pointer$ Let the reference of __global_pointer$ to force creation of .sdata to fix the problem. This is similar to _GLOBAL_OFFSET_TABLE_, which forces creation of .got or .got.plt . Also, change the visibility from STV_HIDDEN to STV_DEFAULT and don't define the symbol for -shared. This matches ld.bfd, though I don't understand why it uses STV_DEFAULT. Reviewed By: ruiu, jrtc27 Differential Revision: https://reviews.llvm.org/D63132 llvm-svn: 363351
* [ELF] Loosen the condition that changes absolute relocation types to ↵Fangrui Song2019-06-131-1/+7
| | | | | | | | relative relocations for ARM and PPC64 Try fixing build bots after D63121 llvm-svn: 363236
* [ELF][RISCV] Treat R_RISCV_{ADD,SET,SUB}* as link-time constantsFangrui Song2019-06-124-2/+19
| | | | | | | | | | | | | | | | | | | | | | | R_RISCV_{ADD,SET,SUB}* are used for local label computation. Add a new RelExpr member R_RISCV_ADD to represent them. R_RISCV_ADD is treated as a link-time constant because otherwise R_RISCV_{ADD,SET,SUB}* are not allowed in -pie/-shared mode. In glibc Scrt1.o, .rela.eh_frame contains such relocations. Because .eh_frame is not writable, we get this error: ld.lld: error: can't create dynamic relocation R_RISCV_ADD32 against symbol: .L0 in readonly segment; recompil object files with -fPIC or pass '-Wl,-z,notext' to allow text relocations in the output >>> defined in ..../riscv64-linux-gnu/lib/Scrt1.o With D63076 and this patch, I can run -pie/-shared programs linked against glibc. Note llvm-mc cannot currently produce R_RISCV_SET* so they are not tested. Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D63183 llvm-svn: 363128
* [ELF][PPC64] Don't report "relocation refers to a discarded section" for .tocFangrui Song2019-06-122-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: clang (as of 2019-06-12) / gcc (as of 8.2.1) PPC64 may emit a .rela.toc which references an embedded switch table in a discarded .rodata/.text section. The .toc and the .rela.toc are incorrectly not placed in the comdat. Technically a relocation from outside the group is not allowed by the ELF spec: > A symbol table entry with STB_LOCAL binding that is defined relative > to one of a group's sections, and that is contained in a symbol table > section that is not part of the group, must be discarded if the group > members are discarded. References to this symbol table entry from > outside the group are not allowed. Don't report errors to work around the bug. This should fix the ppc64le-lld-multistage-test bot while linking llvm-tblgen: ld.lld: error: relocation refers to a discarded section: .rodata._ZNK4llvm3MVT13getSizeInBitsEv >>> defined in utils/TableGen/CMakeFiles/llvm-tblgen.dir/CodeGenRegisters.cpp.o >>> referenced by CodeGenRegisters.cpp >>> utils/TableGen/CMakeFiles/llvm-tblgen.dir/CodeGenRegisters.cpp.o:(.toc+0x0) Some other PPC specific sections may have similar problems. We can blacklist more section names when problems occur. // A simple program that reproduces the bug. // Note .rela.toc (outside the group) references a section symbol (STB_LOCAL) in a group. void puts(const char *); struct A { void foo(int a) { switch (a) { case 0: puts("0"); break; case 1: puts("1"); puts("1"); break; case 2: puts("2"); break; case 3: puts("3"); puts("4"); break; case 4: puts("4"); break; case 5: puts("5"); puts("5"); break; case 6: puts("6"); break; } } int a; }; void foo(A x) { x.foo(x.a); } Reviewers: ruiu, sfertile, espindola Reviewed By: ruiu Subscribers: emaste, nemanjai, arichardson, kbarton, jsji, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D63182 llvm-svn: 363126
* Revert "Revert r362867: [ELF][PPC] Simplify {read,write}FromHalf16"Fangrui Song2019-06-122-30/+31
| | | | | | | | | | | | | | | This reverts commit r363060 and restores r362867. r362867 is innocent. The ppc64le-lld-multistage-test bot failure was due to a clang/gcc .toc bug: ld.lld: error: relocation refers to a discarded section: .rodata._ZNK4llvm3MVT13getSizeInBitsEv >>> defined in utils/TableGen/CMakeFiles/llvm-tblgen.dir/CodeGenRegisters.cpp.o >>> referenced by CodeGenRegisters.cpp >>> utils/TableGen/CMakeFiles/llvm-tblgen.dir/CodeGenRegisters.cpp.o:(.toc+0x0) It will be worked around by D63182. llvm-svn: 363124
* [ELF][RISCV] Add R_RISCV_PC_INDIRECT to isRelExpr()Fangrui Song2019-06-111-1/+2
| | | | | | | | | | | | | So that R_RISCV_PCREL_LO12_[IS] are considered as link-time constants in -pie mode, otherwise there are bogus errors: ld.lld: error: can't create dynamic relocation R_RISCV_PCREL_LO12_I against symbol: .L0 in readonly segment; recompile object files with -fPIC or pass '-Wl,-z,notext' to allow text relocations in the output Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D63123 llvm-svn: 363064
* Revert r362867: [ELF][PPC] Simplify {read,write}FromHalf16Rui Ueyama2019-06-112-31/+30
| | | | | | | This reverts commit r362867 since it seems to have broken ppc64le-lld-multistage-test bot. llvm-svn: 363060
* [ELF] Make the rule to create relative relocations in a writable section ↵Fangrui Song2019-06-1112-20/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | stricter The current rule is loose: `!Sym.IsPreemptible || Expr == R_GOT`. When the symbol is non-preemptable, this allows absolute relocation types with smaller numbers of bits, e.g. R_X86_64_{8,16,32}. They are disallowed by ld.bfd and gold, e.g. ld.bfd: a.o: relocation R_X86_64_8 against `.text' can not be used when making a shared object; recompile with -fPIC This patch: a) Add TargetInfo::SymbolicRel to represent relocation types that resolve to a symbol value (e.g. R_AARCH_ABS64, R_386_32, R_X86_64_64). As a side benefit, we currently (ab)use GotRel (R_*_GLOB_DAT) to resolve GOT slots that are link-time constants. Since we now use Target->SymbolRel to do the job, we can remove R_*_GLOB_DAT from relocateOne() for all targets. R_*_GLOB_DAT cannot be used as static relocation types. b) Change the condition to `!Sym.IsPreemptible && Type != Target->SymbolicRel || Expr == R_GOT`. Some tests are caught by the improved error checking (ld.bfd/gold also issue errors on them). Many misuse .long where .quad should be used instead. Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D63121 llvm-svn: 363059
* ELF: Don't process the partition end marker during combineEhSections().Peter Collingbourne2019-06-111-2/+4
| | | | | | | | | | Otherwise the getPartition() accessor may return an OOB pointer. Found using _GLIBCXX_DEBUG. The error is benign (we never dereference the pointer for the end marker) so this wasn't caught by e.g. the sanitizer bots. llvm-svn: 363026
* [ELF][RISCV] Parse BFD names elf{32,64}-littleriscvFangrui Song2019-06-101-0/+2
| | | | | | | | | | e.g. glibc libc.so on riscv64 uses `OUTPUT_FORMAT(elf64-littleriscv)`. Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D63070 llvm-svn: 362922
* [ELF] [PPC] Fix a typo from SVN r362721Martin Storsjo2019-06-081-1/+1
| | | | | | | Apparently no test covers this exact codepath, but GCC produced a warning about it. llvm-svn: 362883
* [ELF][PPC] Simplify {read,write}FromHalf16Fangrui Song2019-06-082-30/+31
| | | | | | | | | | | | | | | I've change the variable names used in PPC64.cpp from "Instr" to "Insn" because "Insn" is a more common abbreviation for "instruction". While changing PPC64.cpp relocateOne(), make R_PPC64_ADDR16_LO{_DS} slightly more efficient by saving a read and a write for the TocOptimize case. Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D63043 llvm-svn: 362867
* ELF: Create synthetic sections for loadable partitions.Peter Collingbourne2019-06-0712-408/+737
| | | | | | | | | | | | | | | We create several types of synthetic sections for loadable partitions, including: - The dynamic symbol table. This allows code outside of the loadable partitions to find entry points with dlsym. - Creating a dynamic symbol table also requires the creation of several other synthetic sections for the partition, such as the dynamic table and hash table sections. - The partition's ELF header is represented as a synthetic section in the combined output file, and will be used by llvm-objcopy to extract partitions. Differential Revision: https://reviews.llvm.org/D62350 llvm-svn: 362819
* [ELF][AArch64] Support for BTI and PACPeter Smith2019-06-076-12/+213
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Branch Target Identification (BTI) and Pointer Authentication (PAC) are architecture features introduced in v8.5a and 8.3a respectively. The new instructions have been added in the hint space so that binaries take advantage of support where it exists yet still run on older hardware. The impact of each feature is: BTI: For executable pages that have been guarded, all indirect branches must have a destination that is a BTI instruction of the appropriate type. For the static linker, this means that PLT entries must have a "BTI c" as the first instruction in the sequence. BTI is an all or nothing property for a link unit, any indirect branch not landing on a valid destination will cause a Branch Target Exception. PAC: The dynamic loader encodes with PACIA the address of the destination that the PLT entry will load from the .plt.got, placing the result in a subset of the top-bits that are not valid virtual addresses. The PLT entry may authenticate these top-bits using the AUTIA instruction before branching to the destination. Use of PAC in PLT sequences is a contract between the dynamic loader and the static linker, it is independent of whether the relocatable objects use PAC. BTI and PAC are independent features that can be combined. So we can have several combinations of PLT: - Standard with no BTI or PAC - BTI PLT with "BTI c" as first instruction. - PAC PLT with "AUTIA1716" before the indirect branch to X17. - BTIPAC PLT with "BTI c" as first instruction and "AUTIA1716" before the first indirect branch to X17. The use of BTI and PAC in relocatable object files are encoded by feature bits in the .note.gnu.property section in a similar way to Intel CET. There is one AArch64 specific program property GNU_PROPERTY_AARCH64_FEATURE_1_AND and two target feature bits defined: - GNU_PROPERTY_AARCH64_FEATURE_1_BTI -- All executable sections are compatible with BTI. - GNU_PROPERTY_AARCH64_FEATURE_1_PAC -- All executable sections have return address signing enabled. Due to the properties of FEATURE_1_AND the static linker can tell when all input relocatable objects have the BTI and PAC feature bits set. The static linker uses this to enable the appropriate PLT sequence. Neither -> standard PLT GNU_PROPERTY_AARCH64_FEATURE_1_BTI -> BTI PLT GNU_PROPERTY_AARCH64_FEATURE_1_PAC -> PAC PLT Both properties -> BTIPAC PLT In addition to the .note.gnu.properties there are two new command line options: --force-bti : Act as if all relocatable inputs had GNU_PROPERTY_AARCH64_FEATURE_1_BTI and warn for every relocatable object that does not. --pac-plt : Act as if all relocatable inputs had GNU_PROPERTY_AARCH64_FEATURE_1_PAC. As PAC is a contract between the loader and static linker no warning is given if it is not present in an input. Two processor specific dynamic tags are used to communicate that a non standard PLT sequence is being used. DTI_AARCH64_BTI_PLT and DTI_AARCH64_BTI_PAC. Differential Revision: https://reviews.llvm.org/D62609 llvm-svn: 362793
* [ELF] Delete R_PPC64_CALL_PLT from isRelExpr()Fangrui Song2019-06-071-2/+1
| | | | | | | | | | | It was added by D46654 but is actually never used. R_PPC64_CALL_PLT (was: R_PPC_CALL_PLT) is a static link-time constant. Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D62994 llvm-svn: 362788
* Revert [ELF] Simplify the condition to create .interpJordan Rupprecht2019-06-061-1/+2
| | | | | | | | This reverts r362355 (git commit c78c999a9cd7a77b9d13c610c9faebac5d560a55) This causes some internal tests to fail; details provided offthread. llvm-svn: 362755
* Revert "Revert "[ELF] Suppress "STT_SECTION symbol should be defined" on ↵Sean Fertile2019-06-061-3/+14
| | | | | | | | .eh_frame, .debug*, .zdebug* and .gcc_except_table"" This reverts commit f49f58527a6d8147524d8d6f2eb1feb70f856292. llvm-svn: 362744
* Revert "Revert "Reland D61583 [ELF] Error on relocations to STT_SECTION ↵Sean Fertile2019-06-064-5/+20
| | | | | | | | | | symbols if the sections were discarded"" This reverts commit 729111cf1824159bb4dd331cab8a829eab30313f. Reverting the previous commit breaks other LLD buildbots. llvm-svn: 362743
* Revert "Reland D61583 [ELF] Error on relocations to STT_SECTION symbols if ↵Sean Fertile2019-06-064-20/+5
| | | | | | | | | | the sections were discarded" This reverts commit 5d3b3188f722456a6470c7effcacf17656406429. Breaks the PowerPC multi-stage buildbot. llvm-svn: 362739
* Revert "[ELF] Suppress "STT_SECTION symbol should be defined" on .eh_frame, ↵Sean Fertile2019-06-061-14/+3
| | | | | | | | | | | .debug*, .zdebug* and .gcc_except_table" This reverts commit dcba4828a9ead5f5b1fa27f0853823618075d0e0. This commit builds on dcba4828a9ead5f5b1fa27f0853823618075d0e0 which breaks the multi-staged PowerPC buildbot. llvm-svn: 362738
* [PPC32] Support GD/LD/IE/LE TLS models and their relaxationsFangrui Song2019-06-064-4/+191
| | | | | | | | Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D62940 llvm-svn: 362722
* [PPC32] Improve the 32-bit PowerPC portFangrui Song2019-06-0612-57/+406
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Many -static/-no-pie/-shared/-pie applications linked against glibc or musl should work with this patch. This also helps FreeBSD PowerPC64 to migrate their lib32 (PR40888). * Fix default image base and max page size. * Support new-style Secure PLT (see below). Old-style BSS PLT is not implemented, so it is not suitable for FreeBSD rtld now because it doesn't support Secure PLT yet. * Support more initial relocation types: R_PPC_ADDR32, R_PPC_REL16*, R_PPC_LOCAL24PC, R_PPC_PLTREL24, and R_PPC_GOT16. The addend of R_PPC_PLTREL24 is special: it decides the call stub PLT type but it should be ignored for the computation of target symbol VA. * Support GNU ifunc * Support .glink used for lazy PLT resolution in glibc * Add a new thunk type: PPC32PltCallStub that is similar to PPC64PltCallStub. It is used by R_PPC_REL24 and R_PPC_PLTREL24. A PLT stub used in -fPIE/-fPIC usually loads an address relative to .got2+0x8000 (-fpie/-fpic code uses _GLOBAL_OFFSET_TABLE_ relative addresses). Two .got2 sections in two object files have different addresses, thus a PLT stub can't be shared by two object files. To handle this incompatibility, change the parameters of Thunk::isCompatibleWith to `const InputSection &, const Relocation &`. PowerPC psABI specified an old-style .plt (BSS PLT) that is both writable and executable. Linkers don't make separate RW- and RWE segments, which causes all initially writable memory (think .data) executable. This is a big security concern so a new PLT scheme (secure PLT) was developed to address the security issue. TLS will be implemented in D62940. glibc older than ~2012 requires .rela.dyn to include .rela.plt, it can not handle the DT_RELA+DT_RELASZ == DT_JMPREL case correctly. A hack (not included in this patch) in LinkerScript.cpp addOrphanSections() to work around the issue: if (Config->EMachine == EM_PPC) { // Older glibc assumes .rela.dyn includes .rela.plt Add(In.RelaDyn); if (In.RelaPlt->isLive() && !In.RelaPlt->Parent) In.RelaDyn->getParent()->addSection(In.RelaPlt); } Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D62464 llvm-svn: 362721
* [lld] Explicitly ignore comdat groups when parsing LTO object(s)Sam Clegg2019-06-053-30/+18
| | | | | | | | | | | | | Any symbols defined in the LTO object are by definition the ones we want in the final output so we skip the comdat group checking in those cases. This change makes the ELF code more explicit about this and means that wasm and ELF do this in the same way. Differential Revision: https://reviews.llvm.org/D62884 llvm-svn: 362625
* [ELF] Allow reading of more than one FEATURE_1_AND in same object.Peter Smith2019-06-051-5/+7
| | | | | | | | | | | | | Although many relocatable objects will have a single GNU_PROPERTY_X86_FEATURE_1_AND in the .note.gnu.property section it is permissible to have more than one, and there are tests in ld.bfd that use it. The behavior that ld.bfd follows is to set the feature bit for a relocatable object if any of the GNU_PROPERTY_X86_FEATURE_1_AND have the feature bit set. Differential Revision: https://reviews.llvm.org/D62862 llvm-svn: 362591
* Read .note.gnu.property sections and emit a merged .note.gnu.property section.Rui Ueyama2019-06-058-0/+156
| | | | | | | | | | | | | This patch also adds `--require-cet` option for the sake of testing. The actual feature for IBT-aware PLT is not included in this patch. This is a part of https://reviews.llvm.org/D59780. Submitting this first should make it easy to work with a related change (https://reviews.llvm.org/D62609). Differential Revision: https://reviews.llvm.org/D62853 llvm-svn: 362579
* [ELF] Suppress "STT_SECTION symbol should be defined" on .eh_frame, .debug*, ↵Fangrui Song2019-06-041-3/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | .zdebug* and .gcc_except_table Summary: With -r or --emit-relocs, we warn `STT_SECTION symbol should be defined` on relocations to discarded section symbol. This was added as an error in rLLD319404, but was not so effective before D61583 (it turned the error to a warning). Relocations from .eh_frame .debug* .zdebug* .gcc_except_table to discarded .text are very common and somewhat expected. Don't warn/error on them. As a reference, ld.bfd has a similar logic in _bfd_elf_default_action_discarded() to allow these cases. Delete invalid-undef-section-symbol.test because what it intended to check is now covered by the updated comdat-discarded-reloc.s Delete relocatable-eh-frame.s because we allow relocations from .eh_frame as a special case now. Reviewers: grimar, phosek, ruiu, espindola Reviewed By: ruiu Subscribers: emaste, arichardson, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D62840 llvm-svn: 362497
* ELF: Introduce a separate bit for tracking whether an output section has ↵Peter Collingbourne2019-06-034-11/+17
| | | | | | | | | | | | | | | | | | ever had an input section added to it. NFCI. We currently (ab)use the Live bit on output sections to track whether the section has ever had an input section added to it, and then later use it during orphan placement. This will conflict with one of my upcoming partition-related changes that will assign all output sections to a partition (thus marking them as live) so that they can be added to the correct segment by the code that creates program headers. Instead of using the Live bit for this purpose, create a new flag and start using it to track the property explicitly. Differential Revision: https://reviews.llvm.org/D62348 llvm-svn: 362444
* [LLD][ELF] - Remove dead code. NFC.George Rimar2019-06-031-1/+0
| | | | | | I believe this line was dead after r362356. llvm-svn: 362367
* [ELF][PPC64] Rename some PPC64 ELFv2 specific RelExpr from R_PPC_* to R_PPC64_*Fangrui Song2019-06-034-18/+20
| | | | | | | | | | | | | | | | | | The following abstract relocation types (RelExpr) are PPC64 ELFv2 ABI specific, not used by PPC32. So rename them to prevent confusion when the PPC32 port is improved. * R_PPC_CALL R_PPC_CALL_PLT: R_PPC_CALL_PLT represents R_PPC64_REL14 and R_PPC64_REL24. If the function is not preemptable, R_PPC_CALL_PLT can be optimized to R_PPC_CALL: the formula adjusts the symbol VA from the global entry point to the local entry point. * R_PPC_TOC: represents R_PPC64_TOC. We don't have a test. Add one to ppc64-relocs.s Rename it to R_PPC64_TOCBASE because `@tocbase` is the assembly form. Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D62800 llvm-svn: 362359
* [ELF][PPC64] Don't apply LD->LE relaxation on R_PPC64_GOT_DTPREL16*Fangrui Song2019-06-032-10/+1
| | | | | | | | | | | | | | In ELF v2 ABI, R_PPC64_GOT_DTPREL16* are not relaxed. This family of relocation types are used for variables outside of 2GiB of the TLS block. 2 instructions cannot materialize a DTPREL offset that is not 32-bit. Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D62737 llvm-svn: 362357
* [ELF] Don't create an output section named `/DISCARD/` if it is assigned to ↵Fangrui Song2019-06-031-0/+3
| | | | | | | | | | | | | | | | the special phdr `NONE` Fixes the remaining issue of PR41673 after D61186: with `/DISCARD/ { ... } :NONE`, we may create an output section named `/DISCARD/`. Note, if an input section is named `/DISCARD/`, ld.bfd discards it but lld keeps it. It is probably not worth copying this behavior as it is unrealistic. Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D62768 llvm-svn: 362356
* [ELF] Simplify the condition to create .interpFangrui Song2019-06-031-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | (1) {gcc,clang} -fuse-ld=bfd -pie -fPIE -nostdlib a.c => .interp created (2) {gcc,clang} -fuse-ld=lld -pie -fPIE -nostdlib a.c => .interp not created (3) {gcc,clang} -fuse-ld=lld -pie -fPIE -nostdlib a.c a.so => .interp created The inconsistency of (2) is due to the condition `!Config->SharedFiles.empty()`. To make lld behave more like ld.bfd, we could change the condition to: Config->HasDynSymTab && !Config->DynamicLinker.empty() && Script->needsInterpSection(); However, that would bring another inconsistency as can be observed with: (4) {gcc,clang} -fuse-ld=bfd -no-pie -nostdlib a.c => .interp not created So instead, use `!Config->DynamicLinker.empty() && Script->needsInterpSection()`, which is both simple and consistent in these cases. The inconsistency of (4) likely originated from ld.bfd and gold's choice to have a default --dynamic-linker. Their condition to create .interp is ANDed with (not -shared). Since lld doesn't have a default --dynamic-linker, compiler drivers (gcc/clang) don't pass --dynamic-linker for -shared, and direct ld users are not supposed to specify --dynamic-linker for -shared, we do not need the condition !Config->Shared. Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D62765 llvm-svn: 362355
* [ELF][MIPS] Delete dead !Sym->isDefined() check in addAbsolute()Fangrui Song2019-06-021-2/+0
| | | | llvm-svn: 362314
* [ELF] Delete GotEntrySize and GotPltEntrySizeFangrui Song2019-05-3112-35/+14
| | | | | | | | | | | | | GotEntrySize and GotPltEntrySize were added in D22288. Later, with the introduction of wordsize() (then Config->Wordsize), they become redundant, because there is no target that sets GotEntrySize or GotPltEntrySize to a number different from Config->Wordsize. Reviewed By: grimar, ruiu Differential Revision: https://reviews.llvm.org/D62727 llvm-svn: 362220
* [ELF] Replace a dead test in getSymVA() with assert()Fangrui Song2019-05-311-7/+1
| | | | | | | | | | | | Symbols relative to discarded comdat sections are Undefined instead of Defined now (after D59649 and D61583). The `== &InputSection::Discarded` test becomes dead. I cannot find a test related to this behavior. Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D62725 llvm-svn: 362218
* [ELF] Delete dead SHT_NOBITS->SHT_PROGBITS code after r358981Fangrui Song2019-05-301-5/+0
| | | | | | | After D60131/r358981, we no longer create SHT_NOBITS sections that may contain ByteCommand (BYTE, SHORT, LONG, QUAD). llvm-svn: 362108
* [ELF] De-template addUndefined() and addWrappedSymbols(). NFCFangrui Song2019-05-301-6/+5
| | | | llvm-svn: 362099
* [ELF] Implement Local Dynamic style TLSDESC for x86-64Fangrui Song2019-05-304-6/+35
| | | | | | | | | | | | | | | | | | | | | | | For the Local Dynamic case of TLSDESC, _TLS_MODULE_BASE_ is defined as a special TLS symbol that makes: 1) Without relaxation: it produces a dynamic TLSDESC relocation that computes 0. Adding @dtpoff to access a TLS symbol. 2) With LD->LE relaxation: _TLS_MODULE_BASE_@tpoff = 0 (lowest address in the TLS block). Adding @tpoff to access a TLS symbol. For 1), this saves dynamic relocations and GOT slots as otherwise (General Dynamic) we would create an R_X86_64_TLSDESC and reserve two GOT slots for each symbol. Add ElfSym::TlsModuleBase and change the signature of getTlsTpOffset() to special case _TLS_MODULE_BASE_. Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D62577 llvm-svn: 362078
* ELF: Don't reuse a thunk in a different loadable partition.Peter Collingbourne2019-05-292-5/+17
| | | | | | | | | There's no guarantee that the other partition will be loaded, so it can't be reused. Differential Revision: https://reviews.llvm.org/D62365 llvm-svn: 361926
* ELF: Add basic partition data structures and behaviours.Peter Collingbourne2019-05-2914-70/+207
| | | | | | | | | | | | | | This change causes us to read partition specifications from partition specification sections and split output sections into partitions according to their reachability from partition entry points. This is only the first step towards a full implementation of partitions. Later changes will add additional synthetic sections to each partition so that they can be loaded independently. Differential Revision: https://reviews.llvm.org/D60353 llvm-svn: 361925
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