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* Rename VAStart -> ImageBase. NFC.Rui Ueyama2016-07-131-2/+2
| | | | | | | | | | Config members are named after corresponding command line options. This patch renames VAStart ImageBase so that they are in line with --image-base. Differential Revision: http://reviews.llvm.org/D22277 llvm-svn: 275298
* Remove Target::writeThunk.Rui Ueyama2016-07-091-1/+0
| | | | | | | | Only MipsThunk were using the function, and the way how it wrote thunk contents was different from ARM thunks. This patch makes them consistent. llvm-svn: 274997
* Recommit R274836 Add Thunk support framework for ARM and MipsPeter Smith2016-07-081-6/+9
| | | | | | | | | | | The TinyPtrVector of const Thunk<ELFT>* in InputSections.h can cause build failures on certain compiler/library combinations when Thunk<ELFT> is not a complete type or is an abstract class. Fixed by making Thunk<ELFT> non Abstract. type or is an abstract class llvm-svn: 274863
* Revert R274836 Add Thunk support framework for ARM and MipsPeter Smith2016-07-081-9/+6
| | | | | | | This seems to be causing a buildbot failure on lld-x86_64-freebsd. Will reproduce locally and fix. llvm-svn: 274841
* Add Thunk support framework for ARM and MipsPeter Smith2016-07-081-6/+9
| | | | | | | | | | | | | | | | | | | | | | | Generalise the Mips LA25 Thunk code and implement ARM and Thumb interworking Thunks. - Introduce a new module Thunks.cpp to store the Target Specific Thunk implementations. - DefinedRegular and Shared have a ThunkData field to record Thunk. - A Target can have more than one type of Thunk. - Support PC-relative calls to Thunks. - Support Thunks to PLT entries. - Existing Mips LA25 Thunk code integrated. - Support for ARMv7A interworking Thunks. Limitations: - Only one Thunk per SymbolBody, this is sufficient for all currently implemented Thunks. - ARM thunks assume presence of V6T2 MOVT and MOVW instructions. Differential revision: http://reviews.llvm.org/D21891 llvm-svn: 274836
* Remove default values that vary depending on target.Rui Ueyama2016-06-161-3/+3
| | | | llvm-svn: 272976
* Rename PltZero -> PltHeader.Rui Ueyama2016-06-161-2/+2
| | | | | | | | | | | | PltZero (or PLT[0]) was an appropriate name for the little code we have at beginning of the PLT section when we only supported x86 since the code for x86 just fits in the first PLT slot. It's not the case anymore. The code for ARM64 occupies first two slots, so PltZero spans PLT[0] and PLT[1], for example. This patch renames it to avoid confusion. llvm-svn: 272913
* Eliminate unnecessary call of SymbolBody::getPltVA.Rui Ueyama2016-06-161-1/+1
| | | | | | | | For ARM and MIPS, we don't need to call this function. This patch passes a symbol instead of a PLT entry address so that the target handler can call it if necessary. llvm-svn: 272910
* Move a function declaration to a header.Rui Ueyama2016-06-081-0/+1
| | | | llvm-svn: 272146
* Rename TlsGdToLeSkip.Rafael Espindola2016-06-041-1/+1
| | | | | | It will also be used for GT_TO_IE relaxations. llvm-svn: 271813
* Rename adjustRelaxGotExpr.Rafael Espindola2016-06-041-2/+2
| | | | | | It will be used for more than just gots. llvm-svn: 271812
* Start adding tlsdesc support for aarch64.Rafael Espindola2016-06-021-0/+1
| | | | | | | | | | | | | | | | | This is mostly extracted from http://reviews.llvm.org/D18960. The general idea for tlsdesc is that the two GD got entries are used for a function pointer and its argument. The dynamic linker sets both. In the non-dlopen case the dynamic linker sets the function to the identity and the argument to the offset in the tls block. All that the static linker has to do in the non-dlopen case is relocate the code to point to the got entries and create a dynamic relocation. The dlopen case is more complicated, but can be implemented in another patch. llvm-svn: 271569
* [ELF] - Implemented support for test/binop relaxations from latest ABI.George Rimar2016-06-011-1/+2
| | | | | | | | | | | | | | | Patch implements next relaxation from latest ABI: "Convert memory operand of test and binop into immediate operand, where binop is one of adc, add, and, cmp, or, sbb, sub, xor instructions, when position-independent code is disabled." It is described in System V Application Binary Interface AMD64 Architecture Processor Supplement Draft Version 0.99.8 (https://github.com/hjl-tools/x86-psABI/wiki/x86-64-psABI-r249.pdf, B.2 "B.2 Optimize GOTPCRELX Relocations"). Differential revision: http://reviews.llvm.org/D20793 llvm-svn: 271405
* Revert "bar"Rafael Espindola2016-06-011-2/+1
| | | | | | | This reverts commit r271365. Sorry, wrong branch. llvm-svn: 271366
* barRafael Espindola2016-06-011-1/+2
| | | | llvm-svn: 271365
* Removed redundant argument. NFC.George Rimar2016-05-261-2/+1
| | | | llvm-svn: 270847
* [ELF] - Implemented optimization for R_X86_64_GOTPCREL relocation.George Rimar2016-05-251-0/+3
| | | | | | | | | | | | | | | | System V Application Binary Interface AMD64 Architecture Processor Supplement Draft Version 0.99.8 (https://github.com/hjl-tools/x86-psABI/wiki/x86-64-psABI-r249.pdf, B.2 "B.2 Optimize GOTPCRELX Relocations") introduces possible relaxations for R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX. That patch implements the next relaxation: mov foo@GOTPCREL(%rip), %reg => lea foo(%rip), %reg and also opens door for implementing all other ones. Implementation was suggested by Rafael Ávila de Espíndola with few additions and testcases by myself. Differential revision: http://reviews.llvm.org/D15779 llvm-svn: 270705
* Revert "Simplify. Thanks to Rui for the suggestion."Rafael Espindola2016-05-241-1/+0
| | | | | | | | This reverts commit r270551. Sorry, I commited the wrong branch :-( llvm-svn: 270554
* Simplify. Thanks to Rui for the suggestion.Rafael Espindola2016-05-241-0/+1
| | | | llvm-svn: 270551
* Make tp offset computation target independent.Rafael Espindola2016-05-201-0/+3
| | | | | | | | This adds direct support for computing offsets from the thread pointer for both variants. Of the architectures we support, variant 1 is used only by aarch64 (but that doesn't seem to be documented anywhere.) llvm-svn: 270243
* Drop vestigial support for UseLazyBinding=false.Rafael Espindola2016-05-181-1/+0
| | | | | | | | | | | | | Lazy binding is quite important for use case like a shared build of llvm. Also, if someone wants to disable it, it is better done in the compiler (disable plt generation). The only reason to keep it is to make it easier to add a new architecture. But it doesn't really help much as it is possible to start with non lazy relocation and plt code but still let the generic part create a dedicated .got.plt and .rela.plt. llvm-svn: 269982
* Document and test the first few .got.plt entries.Rafael Espindola2016-05-091-0/+4
| | | | llvm-svn: 268945
* Delete getTlsGotRel.Rafael Espindola2016-05-041-1/+0
| | | | | | | It was an old hack to avoid duplicating expression computation, but that is not needed with getExprRel. llvm-svn: 268515
* Simplify handling of hint relocations.Rafael Espindola2016-05-041-5/+0
| | | | llvm-svn: 268501
* Rename isRelRelativeRafael Espindola2016-04-281-6/+6
| | | | | | It was never a particularly good name and is now completely out of date. llvm-svn: 267886
* [ELF][MIPS] Remove getMipsGpAddr(). NFCSimon Atanasyan2016-04-271-1/+0
| | | | llvm-svn: 267673
* [ELF][MIPS] Move MIPS GOT header generation to the GotSectionSimon Atanasyan2016-04-251-2/+0
| | | | | | | | | | | MIPS is the only target requires GOT header. We already have MIPS specific code in the `GotSection` class, so move MIPS GOT header generation there and delete redundant stuff like `GotHeaderEntriesNum` field and `writeGotHeader` method. Differential Revision: http://reviews.llvm.org/D19465 llvm-svn: 267460
* Delete needsCopyRelImpl. It is redundant with getRelExpr.Rafael Espindola2016-04-251-4/+0
| | | | llvm-svn: 267394
* Reduce templating. NFC.Rafael Espindola2016-04-211-1/+0
| | | | llvm-svn: 267018
* Delete the needsPlt target hook.Rafael Espindola2016-04-211-2/+0
| | | | | | It can be made redundant with getRelExpr. llvm-svn: 267012
* Moves needsPlt to Writer.cpp.Rafael Espindola2016-04-211-4/+2
| | | | | | It was only used there. llvm-svn: 267002
* Delete refersToGotEntry.Rafael Espindola2016-04-201-2/+0
| | | | | | It can be computed from the expression. llvm-svn: 266890
* Move canRelaxTls to Writer.cpp. NFC.Rafael Espindola2016-04-201-1/+0
| | | | llvm-svn: 266878
* Delete needsDynRelative.Rafael Espindola2016-04-201-1/+0
| | | | | | | | It is now redundant. Writer.cpp can reason that 2 dynamic relocations are needed: one to find the final got entry address and one to fill the got entry. llvm-svn: 266876
* Remove isGotRelative.Rafael Espindola2016-04-181-1/+0
| | | | | | | It is now redundant with the expression. While at it, handle both "X - Got" and "Got - PC". llvm-svn: 266607
* Delete the now redundant pointsToLocalDynamicGotEntry.Rafael Espindola2016-04-181-1/+0
| | | | llvm-svn: 266584
* Simplify got handling.Rafael Espindola2016-04-151-1/+0
| | | | | | | Each getRelExpr is now expected to return the correct got expression instead of having Writer patch it up with needsGot. llvm-svn: 266466
* Simplify handling of size relocations. NFC.Rafael Espindola2016-04-141-1/+0
| | | | llvm-svn: 266355
* Change how we apply relocations.Rafael Espindola2016-04-131-13/+9
| | | | | | | | | | | | | | | | | | | | | | | With this patch we use the first scan over the relocations to remember the information we found about them: will them be relaxed, will a plt be used, etc. With that the actual relocation application becomes much simpler. That is particularly true for the interfaces in Target.h. This unfortunately means that we now do two passes over relocations for non SHF_ALLOC sections. I think this can be solved by factoring out the code that scans a single relocation. It can then be used both as a scan that record info and for a dedicated direct relocation of non SHF_ALLOC sections. I also think it is possible to reduce the number of enum values by representing a target with just an OutputSection and an offset (which can be from the start or end). This should unblock adding features like relocation optimizations. llvm-svn: 266158
* Use DefinedSynthetic for _gp* symbols.Rafael Espindola2016-04-121-0/+1
| | | | | | | The test changes to put _gp* in the .got section matches what both bfd and gold do. llvm-svn: 266067
* Pass a const pointer to getImplicitAddend. NFC.Rafael Espindola2016-04-011-1/+1
| | | | llvm-svn: 265143
* [ELF] Implement infrastructure for thunk code creationSimon Atanasyan2016-03-311-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some targets might require creation of thunks. For example, MIPS targets require stubs to call PIC code from non-PIC one. The patch implements infrastructure for thunk code creation and provides support for MIPS LA25 stubs. Any MIPS PIC code function is invoked with its address in register $t9. So if we have a branch instruction from non-PIC code to the PIC one we cannot make the jump directly and need to create a small stub to save the target function address. See page 3-38 ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf - In relocation scanning phase we ask target about thunk creation necessity by calling `TagetInfo::needsThunk` method. The `InputSection` class maintains list of Symbols requires thunk creation. - Reassigning offsets performed for each input sections after relocation scanning complete because position of each section might change due thunk creation. - The patch introduces new dedicated value for DefinedSynthetic symbols DefinedSynthetic::SectionEnd. Synthetic symbol with that value always points to the end of the corresponding output section. That allows to escape updating synthetic symbols if output sections sizes changes after relocation scanning due thunk creation. - In the `InputSection::writeTo` method we write thunks after corresponding input section. Each thunk is written by calling `TargetInfo::writeThunk` method. - The patch supports the only type of thunk code for each target. For now, it is enough. Differential Revision: http://reviews.llvm.org/D17934 llvm-svn: 265059
* Pass a const SymbolBody to needsGot. NFC.Rafael Espindola2016-03-311-1/+1
| | | | llvm-svn: 265012
* No relocation needs bot SA and ZA.Rafael Espindola2016-03-301-1/+1
| | | | | | Pass only one of them to relocateOne. llvm-svn: 264866
* Fix handling of addends on i386.Rafael Espindola2016-03-301-0/+1
| | | | | | | Because of merge sections it is not sufficient to just add them while applying a relocation. llvm-svn: 264863
* Simplify AHL handling.Rafael Espindola2016-03-291-2/+1
| | | | | | | | | | | | This simplifies a few things * Read the value as early as possible, instead of passing a pointer to the location. * Print the warning for missing pair close to where we find out it is missing. * Don't pass the value to relocateOne. llvm-svn: 264802
* Make needsPlt a plain function instead of a template.Rafael Espindola2016-03-241-1/+0
| | | | llvm-svn: 264267
* Don't pass SymbolBody to the relax* functions.Rafael Espindola2016-03-161-4/+2
| | | | | | We already pass the symbol value. llvm-svn: 263670
* Split relaxTls into one per relaxation type.Rafael Espindola2016-03-161-2/+13
| | | | | | This reduces code duplication in each target. llvm-svn: 263653
* Use ELFT instead of ELFFile<ELFT>.Rui Ueyama2016-03-141-2/+1
| | | | llvm-svn: 263510
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