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* Reland "[PPC64] Add split - stack support."Sean Fertile2018-10-161-1/+114
| | | | | | | | | | | | | | Recommitting https://reviews.llvm.org/rL344544 after fixing undefined behavior from left-shifting a negative value. Original commit message: This support is slightly different then the X86_64 implementation in that calls to __morestack don't need to get rewritten to calls to __moresatck_non_split when a split-stack caller calls a non-split-stack callee. Instead the size of the stack frame requested by the caller is adjusted prior to the call to __morestack. The size the stack-frame will be adjusted by is tune-able through a new --split-stack-adjust-size option. llvm-svn: 344622
* Revert "[PPC64] Add split - stack support."Sean Fertile2018-10-151-114/+1
| | | | | | | | This reverts commit https://reviews.llvm.org/rL344544, which causes failures on a undefined behaviour sanitizer bot --> lld/ELF/Arch/PPC64.cpp:849:35: runtime error: left shift of negative value -1 llvm-svn: 344551
* [PPC64] Add split - stack support.Sean Fertile2018-10-151-1/+114
| | | | | | | | | | | | | This support is slightly different then the X86_64 implementation in that calls to __morestack don't need to get rewritten to calls to __moresatck_non_split when a split-stack caller calls a non-split-stack callee. Instead the size of the stack frame requested by the caller is adjusted prior to the call to __morestack. The size the stack-frame will be adjusted by is tune-able through a new --split-stack-adjust-size option. Differential Revision: https://reviews.llvm.org/D52099 llvm-svn: 344544
* [ELF] - Do not fail on R_*_NONE relocations when parsing the debug info.George Rimar2018-09-261-0/+1
| | | | | | | | | | | | | | | | | This is https://bugs.llvm.org//show_bug.cgi?id=38919. Currently, LLD may report "unsupported relocation target while parsing debug info" when parsing the debug information. At the same time LLD does that for zeroed R_X86_64_NONE relocations, which obviously has "invalid" targets. The nature of R_*_NONE relocation assumes them should be ignored. This patch teaches LLD to stop reporting the debug information parsing errors for them. Differential revision: https://reviews.llvm.org/D52408 llvm-svn: 343078
* Reset input section pointers to null on each linker invocation.Rui Ueyama2018-09-251-2/+2
| | | | | | | | | | Previously, if you invoke lld's `main` more than once in the same process, the second invocation could fail or produce a wrong result due to a stale pointer values of the previous run. Differential Revision: https://reviews.llvm.org/D52506 llvm-svn: 343009
* [PPC64] Helper for offset from a function's global entry to local entry. [NFC]Sean Fertile2018-09-201-0/+26
| | | | | | | | | | | | | The PPC64 elf V2 abi defines 2 entry points for a function. There are a few places we need to calculate the offset from the global entry to the local entry and how this is done is not straight forward. This patch adds a helper function mostly for documentation purposes, explaining how the 2 entry points differ and why we choose one over the other, as well as documenting how the offsets are encoded into a functions st_other field. Differential Revision: https://reviews.llvm.org/D52231 llvm-svn: 342603
* [PPC64] Optimize redundant instructions in global access sequences.Sean Fertile2018-09-201-2/+70
| | | | | | | | | | | | | | | | | | | The access sequence for global variables in the medium and large code models use 2 instructions to add an offset to the toc-pointer. If the offset fits whithin 16-bits then the instruction that sets the high 16 bits is redundant. This patch adds the --toc-optimize option, (on by default) and enables rewriting of 2 instruction global variable accesses into 1 when the offset from the TOC-pointer to the variable (or .got entry) fits in 16 signed bits. eg addis %r3, %r2, 0 --> nop addi %r3, %r3, -0x8000 --> addi %r3, %r2, -0x8000 This rewriting can be disabled with the --no-toc-optimize flag Differential Revision: https://reviews.llvm.org/D49237 llvm-svn: 342602
* [PPC64] Support relaxing R_PPC64_TLSGD16 in TlsGdtoLe relaxation.Sean Fertile2018-09-171-0/+1
| | | | | | | | | | A General-dynamic tls access can be written using a R_PPC64_TLSGD16 relocation if the target got entry is within 16 bits of the TOC-base. This patch adds support for R_PPC64_TLSGD16 by relaxing it the same as a R_PPC64_GOT_TLSGD16_LO. Differential Revision: https://reviews.llvm.org/D52055 llvm-svn: 342411
* [PPC64] Helpers for read/write an instr while relocating a half16 type. [NFC]Sean Fertile2018-09-171-16/+26
| | | | | | | | | | | | There are a growing number of places when we either want to read or write an instruction when handling a half16 relocation type. On big-endian the buffer pointer is pointing into the middle of the word we want and on little-endian it is pointing to the start of the word. These 2 helpers are to simplify reading and writing in these contexts. Differential Revision: https://reviews.llvm.org/D52115 llvm-svn: 342410
* [PPC64] Fix DQ-form instruction handling and emit error for misalignment.Sean Fertile2018-08-281-7/+35
| | | | | | | | | | | | | Relanding r340564, original commit message: Fixes the handling of *_DS relocations used on DQ-form instructions where we were overwriting some of the extended opcode bits. Also adds an alignment check so that the user will receive a diagnostic error if the value we are writing is not properly aligned. Differential Revision: https://reviews.llvm.org/D51124 llvm-svn: 340832
* Revert "[PPC64] Fix DQ-form instruction handling and emit error for misalign..."Sean Fertile2018-08-231-35/+7
| | | | | | | | This reverts commit 5125b44dbb5d06b715213e4bec75c7346bfcc7d3. ppc64-dq.s and ppc64-error-missaligned-dq.s fail on several of the build-bots. Reverting to investigate. llvm-svn: 340568
* [PPC64] Fix DQ-form instruction handling and emit error for misalignment.Sean Fertile2018-08-231-7/+35
| | | | | | | | | | | Fixes the handling of *_DS relocations used on DQ-form instructions where we were overwriting some of the extended opcode bits. Also adds an alignment check so that the user will receive a diagnostic error if the value we are writing is not properly aligned. Differential Revision: https://reviews.llvm.org/D51124 llvm-svn: 340564
* [PPC64] Add TLS initial exec to local exec relaxationZaara Syeda2018-08-211-1/+102
| | | | | | | | | This patch adds the target call back relaxTlsIeToLe to support TLS relaxation from initial exec to local exec model. Differential Revision: https://reviews.llvm.org/D48091 llvm-svn: 340281
* [PPC64] Add TLS local dynamic to local exec relaxationZaara Syeda2018-07-091-0/+50
| | | | | | | | | This patch adds the target call back relaxTlsLdToLe to support TLS relaxation from local dynamic to local exec model. Differential Revision: https://reviews.llvm.org/D48293 llvm-svn: 336559
* Remove redundnat call of makeArrayRef(). NFC.Rui Ueyama2018-07-051-1/+1
| | | | llvm-svn: 336378
* Simplify PPC64::calcEFlags().Rui Ueyama2018-07-051-40/+9
| | | | | | | | | | In this file we only have to handle the v2 ABI, so what we need to do is to just make sure that all object files have v2 or unspecified version number. Differential Revision: https://reviews.llvm.org/D48112 llvm-svn: 336372
* [PPC64] Add support for R_PPC64_GOT_DTPREL16* relocationsZaara Syeda2018-06-271-0/+12
| | | | | | | | | | | | | | The local dynamic TLS access on PPC64 ELF v2 ABI uses R_PPC64_GOT_DTPREL16* relocations when a TLS variables falls outside 2 GB of the thread storage block. This patch adds support for these relocations by adding a new RelExpr called R_TLSLD_GOT_OFF which emits a got entry for the TLS variable relative to the dynamic thread pointer using the relocation R_PPC64_DTPREL64. It then evaluates the R_PPC64_GOT_DTPREL16* relocations as the got offset for the R_PPC64_DTPREL64 got entries. Differential Revision: https://reviews.llvm.org/D48484 llvm-svn: 335732
* [PPC64] Add TLS global dynamic to local exec relaxationZaara Syeda2018-06-271-0/+37
| | | | | | | | | | | | | | | This patch adds the target call back relaxTlsGdToLe to support TLS relaxation from global dynamic to local exec model. The relaxation performs the following transformation: addis r3, r2, x@got@tlsgd@ha --> nop addi r3, r3, x@got@tlsgd@l --> addis r3, r13, x@tprel@ha bl __tls_get_addr(x@tlsgd) --> nop nop --> addi r3, r3, x@tprel@l Differential Revision: https://reviews.llvm.org/D48082 llvm-svn: 335730
* [PPC64] Thread-local storage general-dynamic to initial-exec relaxation.Sean Fertile2018-06-261-0/+53
| | | | | | | | | | | | | | | | | | Patch adds support for relaxing the general-dynamic tls sequence to initial-exec. the relaxation performs the following transformation: addis r3, r2, x@got@tlsgd@ha --> addis r3, r2, x@got@tprel@ha addi r3, r3, x@got@tlsgd@l --> ld r3, x@got@tprel@l(r3) bl __tls_get_addr(x@tlsgd) --> nop nop --> add r3, r3, r13 and instead of emitting a DTPMOD64/DTPREL64 pair for x, we emit a single R_PPC64_TPREL64. Differential Revision: https://reviews.llvm.org/D48090 llvm-svn: 335651
* Use shorter names for #lo, #hi, #ha, etc. NFC.Rui Ueyama2018-06-131-15/+15
| | | | | | | | Since these functions are file-local, the new names shouldn't be ambiguous. Differential Revision: https://reviews.llvm.org/D48093 llvm-svn: 334564
* [ELF][PPC64] Support R_PPC64_DTPREL64 which may be emitted in .rela.debug_addrFangrui Song2018-06-121-0/+3
| | | | llvm-svn: 334533
* [PPC64] Support R_PPC64_DTPREL relocations.Sean Fertile2018-06-121-7/+47
| | | | | | | | Patch adds support for most of the dynamic thread pointer based relocations for local-dynamic tls. The HIGH and HIGHA versions are missing becuase they are not supported by the llvm integrated assembler yet. llvm-svn: 334465
* [PPC64] Add support for local-exec TLS modelZaara Syeda2018-06-081-0/+23
| | | | | | | | | | | | | | | | | | | This patch adds the relocations needed support the local-exec TLS model: R_PPC64_TPREL16 R_PPC64_TPREL16_HA R_PPC64_TPREL16_LO R_PPC64_TPREL16_HI R_PPC64_TPREL16_DS R_PPC64_TPREL16_LO_DS R_PPC64_TPREL16_HIGHER R_PPC64_TPREL16_HIGHERA R_PPC64_TPREL16_HIGHEST R_PPC64_TPREL16_HIGHESTA Differential Revision: https://reviews.llvm.org/D47598 llvm-svn: 334304
* [PPC64] Add support for initial-exec TLS modelZaara Syeda2018-06-011-0/+12
| | | | | | | | | | | | | This patch adds the relocations needed support the initial-exec TLS model: R_PPC64_GOT_TPREL16_HA R_PPC64_GOT_TPREL16_LO_DS R_PPC64_GOT_TPREL16_DS R_PPC64_GOT_TPREL16_HI R_PPC64_TLS Differential Revision: https://reviews.llvm.org/D47455 llvm-svn: 333769
* [PPC64] Support R_PPC64_GOT_TLSLD16 relocations.Sean Fertile2018-05-311-0/+10
| | | | | | | | | Add support for the R_PPC64_GOT_TLSLD16 relocations used to build the address of the tls_index struct used in local-dynamic tls. Differential Revision: https://reviews.llvm.org/D47538 llvm-svn: 333681
* [PPC64] Support General-Dynamic tls.Sean Fertile2018-05-291-0/+14
| | | | | | | | | Adds handling of all the relocation types for general-dynamic thread local storage. Differential Revision: https://reviews.llvm.org/D47325 llvm-svn: 333420
* [PPC64] Set the IRelative relocation type.Sean Fertile2018-05-241-0/+1
| | | | | | | Set the IRelative relocation type and extend the related test to verify. Differential Revision: https://reviews.llvm.org/D46877 llvm-svn: 333203
* [ELF][PPC64] Fix getRelExpr for R_PPC64_REL64Zaara Syeda2018-05-141-0/+1
| | | | | | | | | The relocation R_PPC64_REL64 should return R_PC for getRelExpr since it computes S + A - P. Differential Revision: https://reviews.llvm.org/D46766 llvm-svn: 332259
* [ELF][PPC64] Fix getRelExpr for R_PPC64_REL32Zaara Syeda2018-05-141-0/+1
| | | | | | | | | The relocation R_PPC64_REL32 should return R_PC for getRelExpr since it computes S + A - P. Differential Revision: https://reviews.llvm.org/D46586 llvm-svn: 332252
* [PPC64] Add lazy symbol resolution stubs.Sean Fertile2018-05-091-2/+36
| | | | | | | | | | | | | | | Adds support for .glink resolver stubs from the example implementation in the V2 ABI (Section 4.2.5.3. Procedure Linkage Table). The stubs are written to the PltSection, and the sections are renamed to match the PPC64 ABI: .got.plt --> .plt Type = SHT_NOBITS .plt --> .glink And adds the DT_PPC64_GLINK dynamic tag to the dynamic section when the plt is not empty. Differential Revision: https://reviews.llvm.org/D45642 llvm-svn: 331840
* [PPC64] Emit plt call stubs to the text section rather then the plt section.Sean Fertile2018-05-061-27/+12
| | | | | | | | | | | | | | | | | | On PowerPC calls to functions through the plt must be done through a call stub that is responsible for: 1) Saving the toc pointer to the stack. 2) Loading the target functions address from the plt into both r12 and the count register. 3) Indirectly branching to the target function. Previously we have been emitting these call stubs to the .plt section, however the .plt section should be reserved for the lazy symbol resolution stubs. This patch moves the call stubs to the text section by moving the implementation from writePlt to the thunk framework. Differential Revision: https://reviews.llvm.org/D46204 llvm-svn: 331607
* [PPC64] Remove support for ELF V1 ABI in LLD - buildbot fixZaara Syeda2018-05-041-4/+11
| | | | | | | | | Fix buildbot error, failure to build with msvc due to error C2446 Use switch instead of ternary operator. Differential Revision: https://reviews.llvm.org/D46316 llvm-svn: 331534
* [PPC64] Remove support for ELF V1 ABI in LLDZaara Syeda2018-05-041-64/+50
| | | | | | | | | | | The current support for V1 ABI in LLD is incomplete. This patch removes V1 ABI support and changes the default behavior to V2 ABI, issuing an error when using the V1 ABI. It also updates the testcases to V2 and removes any V1 specific tests. Differential Revision: https://reviews.llvm.org/D46316 llvm-svn: 331529
* Fix trap instruction on pp64.Rafael Espindola2018-04-201-1/+2
| | | | | | | The test was passing on a big endian host, but just because od with x4 was compensating for it. llvm-svn: 330386
* Define TrapInst for ppc64.Rafael Espindola2018-04-021-0/+2
| | | | | | | This is nice for testing since it is the first TrapInst whose bytes are not all the same. llvm-svn: 329014
* [PPC64] Minor changes for Plt relocations.Sean Fertile2018-04-021-2/+8
| | | | | | | | | | The Plt relative relocations are R_PPC64_JMP_SLOT in the V2 abi, and we only reserve 2 double words instead of 3 at the start of the array of PLT entries for lazy linking. Differential Revision: https://reviews.llvm.org/D44951 llvm-svn: 329006
* [PPC64] Write plt stubs for ElfV2 abiSean Fertile2018-04-021-14/+31
| | | | | | | | Add the default version of a plt stub for the V2 Elf abi. Differential Revision: https://reviews.llvm.org/D44850 llvm-svn: 329004
* Do not use template for check{Int,UInt,IntUInt,Alignment}.Rui Ueyama2018-03-291-5/+5
| | | | | | | | Template is just unnecessary. Differential Revision: https://reviews.llvm.org/D45063 llvm-svn: 328843
* [ELF][PPC64] Fix getRelExpr for R_PPC64_REL16_LO and R_PPC64_REL16_HAZaara Syeda2018-03-211-1/+4
| | | | | | | | | The relocations R_PPC64_REL16_LO and R_PPC64_REL16_HA should return R_PC for getRelExpr since they compute #lo(S + A – P) and #ha(S + A – P). Differential Revision: https://reviews.llvm.org/D44648 llvm-svn: 328103
* [ELF] Add basic support for PPC LEZaara Syeda2018-03-191-0/+49
| | | | | | | | | | | | This patch adds changes to start supporting the Power 64-Bit ELF V2 ABI. This includes: - Changing the ElfSym::GlobalOffsetTable to be named .TOC. - Creating a GotHeader so the first entry in the .got is .TOC. - Setting the e_flags to be 1 for ELF V1 and 2 for ELF V2 Differential Revision: https://reviews.llvm.org/D44483 llvm-svn: 327871
* [ELF] Convert {read,write}*be to endianness-aware read/write.Fangrui Song2018-03-091-23/+22
| | | | | | | | Subscribers: emaste, nemanjai, arichardson, kbarton, llvm-commits Differential Revision: https://reviews.llvm.org/D44227 llvm-svn: 327156
* Rename SymbolBody -> SymbolRui Ueyama2017-11-031-2/+2
| | | | | | | | | | | | | Now that we have only SymbolBody as the symbol class. So, "SymbolBody" is a bit strange name now. This is a mechanical change generated by perl -i -pe s/SymbolBody/Symbol/g $(git grep -l SymbolBody lld/ELF lld/COFF) nd clang-format-diff. Differential Revision: https://reviews.llvm.org/D39459 llvm-svn: 317370
* [lld] unified COFF and ELF error handling on new Common/ErrorHandlerBob Haarman2017-10-251-1/+1
| | | | | | | | | | | | | | | | | | | Summary: The COFF linker and the ELF linker have long had similar but separate Error.h and Error.cpp files to implement error handling. This change introduces new error handling code in Common/ErrorHandler.h, changes the COFF and ELF linkers to use it, and removes the old, separate implementations. Reviewers: ruiu Reviewed By: ruiu Subscribers: smeenai, jyknight, emaste, sdardis, nemanjai, nhaehnle, mgorny, javed.absar, kbarton, fedor.sergeev, llvm-commits Differential Revision: https://reviews.llvm.org/D39259 llvm-svn: 316624
* Remove one parameter from Target::getRelExpr.Rui Ueyama2017-10-121-4/+4
| | | | | | | | A section was passed to getRelExpr just to create an error message. But if there's an invalid relocation, we would eventually report it in relocateOne. So we don't have to pass a section to getRelExpr. llvm-svn: 315552
* Define RelType to represent relocation types.Rui Ueyama2017-10-111-5/+5
| | | | | | | | | | | | | | | | | | We were using uint32_t as the type of relocation kind. It has a readability issue because what Type really means in `uint32_t Type` is not obvious. It could be a section type, a symbol type or a relocation type. Since we do not do any arithemetic operations on relocation types (e.g. adding one to R_X86_64_PC32 doesn't make sense), it would be more natural if they are represented as enums. Unfortunately, that is not doable because relocation type definitions are spread into multiple header files. So I decided to use typedef. This still should be better than the plain uint32_t because the intended type is now obvious. llvm-svn: 315525
* Fix which file is in an error message.Rafael Espindola2017-08-041-2/+2
| | | | | | | When reporting an invalid relocation we were blaming the destination file instead of the file with the relocation. llvm-svn: 310084
* Do not use make<> to allocate TargetInfo. NFC.Rui Ueyama2017-06-161-2/+4
| | | | llvm-svn: 305577
* Split Target.cpp into small files.Rui Ueyama2017-06-161-0/+215
Target.cpp contains code for all the targets that LLD supports. It was simple and easy, but as the number of supported targets increased, it got messy. This patch splits the file into per-target files under ELF/arch directory. Differential Revision: https://reviews.llvm.org/D34222 llvm-svn: 305565
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