summaryrefslogtreecommitdiffstats
path: root/compiler-rt/lib/builtins/arm
Commit message (Collapse)AuthorAgeFilesLines
...
* [compiler-rt] Do not use ldrexd or strexd on v7MOliver Stannard2014-09-2910-0/+20
| | | | | | | | | | | | | | | | The ldrexd and strexd instructions are undefined for the ARMv7M architecture, so we cannot use them to implement the __sync_fetch_and_*_8 builtins. There is no other way to implement these without OS support, so this patch #ifdef's these functions out for M-class architectures. There are no tests as I cannot find any existing tests for these builtins. I used the __ARM_ARCH_PROFILE predefine because __ARM_FEATURE_LDREX is deprecated and not set by clang. llvm-svn: 218601
* builtins: replace section symbol with reference to specSaleem Abdulrasool2014-09-081-1/+1
| | | | | | Removes a non-ascii character that was committed. llvm-svn: 217353
* builtins: add AEABI div0 functionsSaleem Abdulrasool2014-09-061-0/+43
| | | | | | | | | Add the missing AEABI functions that are part of the base platform ABI specification. The provided implementation does the bare minimum to avoid requiring libc headers. This permits the use of compiler-rt on bare-metal environments which conform to EABI. llvm-svn: 217322
* builtins: add signature to some assembly routinesSaleem Abdulrasool2014-08-096-0/+23
| | | | | | | Add a helpful description and a signature for the functions implemented in assembly for the integral math routines. NFC. llvm-svn: 215296
* builtins: correct __umodsi3, __udivsi3 on ARMSaleem Abdulrasool2014-08-092-7/+3
| | | | | | | | | | | | | When building the builtins for a modern CPU (idiv support), __umodsi3 was completely incorrect as it would behave as __udivmosi3, which takes a tertiary parameter which is a pointer. __udivsi3 was also incorrect, returning the remainder in r1. Although this would not result in any crash or invalid behaviour as r1 is a caller saved register in AAPCS, this is unnecessary. Simply perform the division ignoring the remainder. llvm-svn: 215295
* builtins: make ARM compilation with GAS work againSaleem Abdulrasool2014-07-273-5/+5
| | | | | | | | | | The LLVM IAS seems to accept wide instructions for add and sub in ARM mode even though it is not permitted. This uses a macro to ensure that the wide modifier is only applied when building in THUMB mode. This repairs building with GCC/GAS in ARM mode. llvm-svn: 214046
* builtins: move macro definitions into assembly.hSaleem Abdulrasool2014-07-273-24/+0
| | | | | | | The macro definitions are shared across multiple files. Define them once in the assembly.h header rather than redefining it in each file. llvm-svn: 214045
* builtins: whitespaceSaleem Abdulrasool2014-07-272-8/+8
| | | | llvm-svn: 214044
* Fix incompatible assembly in ARM builtins libraryRenato Golin2014-07-221-2/+6
| | | | | | | | | | Convert the CBNZ backward branch instruction to CMP and BNE avoiding illegal backwards branch and making the assembly code in synh-ops.h to be UAL compliant. Patch by: Sumanth Gundapaneni llvm-svn: 213685
* Redo THUMB support.Joerg Sonnenberger2014-07-203-7/+76
| | | | | | Discussed with and tested by: Saleem Abdulrasool llvm-svn: 213481
* Revert r213467, it breaks non-thumb mode.Joerg Sonnenberger2014-07-203-169/+19
| | | | llvm-svn: 213479
* ARM: fix division in some casesSaleem Abdulrasool2014-07-203-19/+169
| | | | | | | | | | | | | | | | | | | | | | | | For ARM cores that are ARMv6T2+ but not ARMv7ve or ARMv7-r and not an updated ARMv7-a that has the idiv extension (chips with clz but not idiv), an incorrect jump would be calculated due to the preference to thumb instructions over ARM. Rather than computing the target at runtime, use a jumptable instead. This trades a bit of storage for performance. The overhead is 32-bytes for each of the three routines, but avoid the calculation of the offset. Because clz was introduced in ARMv6T2 and idiv in certain versions of ARMv7, the non-clz, non-idiv case implies a target which does not support Thumb-2, and thus we cannot use Thumb on those targets (as it is unlikely that the assembly will assemble). Take the opportunity to refactor the IT block macros into assembly.h rather than redefining them in the TUs where they are used. Existing tests cover the full change already, so no new tests are added. This effectively reverts SVN r213309. llvm-svn: 213467
* Revert Thumb-2 conversion of some ARM builtins.Stephen Hines2014-07-173-47/+8
| | | | | | | | | The udivmodsi4/modsi3/umodsi3 code computes jump targets based on ARM encodings (if CLZ is present and IDIV is not present). Reverts parts of r211032 and r211035. llvm-svn: 213309
* builtins: add it blocks for Thumb-2Saleem Abdulrasool2014-06-163-8/+38
| | | | | | | Add the missing IT-blocks for Thumb-2 compilation for code paths exercised by older ARM CPUs. This should fix the buildbots. llvm-svn: 211035
* compiler-rt: prefer thumb over ARMSaleem Abdulrasool2014-06-1610-0/+31
| | | | | | | | | | | When possible, use Thumb or Thumb-2 over ARM instructions. This is particularly important for pure-Thumb environments (e.g. Windows on ARM). Although, it is possible to conditionalise this for that target specifically, this is available on most newer ARM CPUs, and the code remains compatible with older CPUs with no adverse effects. It therefore feels better to always prefer Thumb when possible. llvm-svn: 211032
* compiler-rt: whitespace and uniformity for armSaleem Abdulrasool2014-06-0110-13/+25
| | | | | | | | | Make the whitespace a bit more uniform in the various assembly routines. This also makes the assembly files a bit more uniform on the ARM side by explicitly stating that it is using the unified syntax and that the contents of the code is in the text section (or segment). No functional change. llvm-svn: 209985
* Fix typosAlp Toker2014-05-151-1/+1
| | | | llvm-svn: 208841
* Move .subsections_via_symbols directives into DEFINE_COMPILERRT_PRIVATE_FUNCTIONJonathan Roelofs2014-05-126-15/+0
| | | | llvm-svn: 208603
* [CompilerRT] use .p2align, .balign instead of .alignSaleem Abdulrasool2014-05-1260-63/+63
| | | | | | | | | | | | The .align statements in ARM assembly routines is actually meant to be a power of 2 alignment (e.g. .align 2 == 4 byte alignment, not 2). Switch to using .p2align. .p2align is guaranteed to be a power-of-two alignment always and much more explicit. The .align in the case of x86_64 is byte alignment, use .balign instead of .align. llvm-svn: 208578
* ARM: fix file's header commentTim Northover2014-03-071-4/+3
| | | | llvm-svn: 203247
* ARM: fix built-bots trying to use Thumb2 code on armv6mTim Northover2014-03-041-1/+1
| | | | llvm-svn: 202819
* ARM: implement __sync_fetch_and_* operationsTim Northover2014-03-0422-1/+470
| | | | | | | | | | | Since these are primarily useful for deeply embedded targets where code size is very important, they are each in a separate file making use of infrastructure in sync-ops.h. This allows a linker to include just the functions that are actually used. rdar://problem/14736665 llvm-svn: 202812
* Move original compiler-rt functions (libgcc replacement) to lib/builtins ↵Alexey Samsonov2014-02-1464-0/+2531
directory llvm-svn: 201393
OpenPOWER on IntegriCloud