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* Teaches clang about Cortex-A35.Christof Douma2015-12-021-0/+2
| | | | | | | | Adds support for the new Cortex-A35 ARMv8-A core. Differential Revision: http://reviews.llvm.org/D15142 llvm-svn: 254505
* ARM v8.1a adds Advanced SIMD instructions for Rounding Double MultiplyAlexandros Lamprineas2015-11-292-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | Add/Subtract. The following instructions are added to AArch32 instruction set: - VQRDMLAH: Vector Saturating Rounding Doubling Multiply Accumulate Returning High Half - VQRDMLSH: Vector Saturating Rounding Doubling Multiply Subtract Returning High Half The following instructions are added to AArch64 instruction set: - SQRDMLAH: Signed Saturating Rounding Doubling Multiply Accumulate Returning High Half - SQRDMLSH: Signed Saturating Rounding Doubling Multiply Subtract Returning High Half This patch adds intrinsic and ACLE macro support for these instructions, as well as corresponding tests. Differential Revision: http://reviews.llvm.org/D14982 llvm-svn: 254250
* [WebAssembly] Change long double to be quadruple-precision floating point.Dan Gohman2015-11-101-24/+24
| | | | llvm-svn: 252646
* Add the variant of __sparc_v9__ with five underscores, not just four.Joerg Sonnenberger2015-11-101-0/+3
| | | | llvm-svn: 252640
* Reorganise CPU handling for Sparc. When using -mcpu=v9 and co, __sparcv8Joerg Sonnenberger2015-11-091-0/+9
| | | | | | | | | is not defined for 32bit mode, but __sparcv9 is. Pass down the correct -target-cpu flags to the backend, so that instruction restrictions are applied correctly. Pass down the correct -A flag when not using IAS. The latter is limited to NetBSD targets in this commit. llvm-svn: 252545
* [x86] Front-end part of MCU psABI supportAndrey Bokhanko2015-11-021-0/+5
| | | | | | | | | | | This patch implements two things in front-end for MCU psABI support: 1) "long double type is the same as double." 2) "New predefined C/C++ pre-processor symbols: iamcu and iamcu__. Differential Revision: http://reviews.llvm.org/D14205 llvm-svn: 251786
* ARMv7k: implement ABI changes for watchOS from standard iOS.Tim Northover2015-10-301-0/+184
| | | | llvm-svn: 251710
* Support watchOS and tvOS driver optionsTim Northover2015-10-301-3/+2
| | | | | | | | This patch should add support for almost all command-line options and driver tinkering necessary to produce a correct "clang -cc1" invocation for watchOS and tvOS. llvm-svn: 251706
* Fix __ARM_FP value for sp-only FPUs with Half-precisionRichard Barton2015-10-212-15/+69
| | | | | | | | | The logic for parsing FP capabilities to set __ARM_FP was mistakenly removing the Half-Precision capability when handling fp-only-sp resulting in a value of 0x4. Section 6.5.1 of ACLE states that for such FP architectures the value should be 0x6 llvm-svn: 250888
* [X86] Add command line switches for xsave/xsaveopt/xsavec/xsaves. Macro ↵Craig Topper2015-10-152-0/+67
| | | | | | defines for the same. And add the flags to correct CPU names. llvm-svn: 250368
* Parse and ignore #pragma runtime_checks in MS extensions mode (PR25138)Hans Wennborg2015-10-121-2/+5
| | | | | | We already silently ignore the /RTC, which controls the same functionality. llvm-svn: 250099
* Simplify DefaultCPU in ARMTargetInfoRenato Golin2015-10-081-12/+7
| | | | | | | | | | | | | | | | | | Simplifying the convoluted CPU handling in ARMTargetInfo. The default base CPU on ARM is ARM7TDMI, arch ARMv4T, and ARMTargetInfo had a different one. This wasn't visible from Clang because the driver selects the defaults and sets the Arch/CPU features directly, but the constructor depended on the CPU, which was never used. This patch corrects the mistake and greatly simplifies how CPU is dealt with (essentially by removing the duplicated DefaultCPU field). Tests updated. llvm-svn: 249699
* Implement ACLE 2.0 macros of chapters 6.6 and 6.7 for [ARM] and [Aarch64] ↵Alexandros Lamprineas2015-10-022-1/+14
| | | | | | | | targets. Differential Revision: http://reviews.llvm.org/D12633 llvm-svn: 249140
* [PowerPC] Define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_* macros on all PPC coresHal Finkel2015-10-011-0/+3
| | | | | | | | | | | | We support all __sync_val_compare_and_swap_* builtins (only 64-bit on 64-bit targets) on all cores, and should define the corresponding __GCC_HAVE_SYNC_COMPARE_AND_SWAP_* macros, just as GCC does. As it turns out, this is really important because they're needed to prevent a bad ODR violation with libstdc++'s std::shared_ptr (this is well explained in PR12730). We were doing this only for P8, but this is necessary on all PPC systems. llvm-svn: 249009
* [CUDA] 32-bit NVPTX should have 32-bit long type.Artem Belevich2015-09-281-10/+10
| | | | | | | | | Currently it's 64-bit which will lead to mismatch between host and device code if we compile for i386. Differential Revision: http://reviews.llvm.org/D13181 llvm-svn: 248753
* [WebAssembly] Define the atomic type sizesDan Gohman2015-09-141-22/+22
| | | | | | | | | | | | | WebAssembly's spec has now been updated to specify some guarantees about lock free atomic accesses. Update clang to match. This also updates sig_atomic_t to be 64-bit on wasm64. WebAssembly does not presently have asynchronous interrupts, but this change is within the spirit of how they will work if they are added. Differential Revision: http://reviews.llvm.org/D12862 llvm-svn: 247624
* [WebAssembly] Use "long long" for int_fast64_t and int_least64_t on wasm64Dan Gohman2015-09-141-20/+20
| | | | | | | | | This makes int_fast64_t and int_least64_t the same type as int64_t, and eliminates a difference between wasm32 and wasm64. Differential Revision: http://reviews.llvm.org/D12861 llvm-svn: 247622
* [WebAssembly] Initial WebAssembly support in clangDan Gohman2015-09-032-0/+667
| | | | | | | | | | This implements basic support for compiling (though not yet assembling or linking) for a WebAssembly target. Note that ABI details are not yet finalized, and may change. Differential Revision: http://reviews.llvm.org/D12002 llvm-svn: 246814
* Implement ACLE 2.0 macros of chapters 6.4 and 6.5 for [ARM] and [Aarch64] ↵Alexandros Lamprineas2015-09-033-53/+268
| | | | | | | | | targets. Differential Revision: http://reviews.llvm.org/D12244 Change-Id: Iffd4e822c15e18668fe8868278230ff232ef50aa llvm-svn: 246768
* [ARM] Allow passing/returning of __fp16 argumentsOliver Stannard2015-09-032-1/+3
| | | | | | | | | | | | | | | | | | | | | The ACLE (ARM C Language Extensions) 2.0 allows the __fp16 type to be used as a functon argument or return type (ACLE 1.1 did not). The current public release of the AAPCS (2.09) states that __fp16 values should be converted to single-precision before being passed or returned, but AAPCS 2.10 (to be released shortly) changes this, so that they are passed in the least-significant 16 bits of either a GPR (for base AAPCS) or a single-precision register (for AAPCS-VFP). This does not change how arguments are passed if they get passed on the stack. This patch brings clang up to compliance with the latest versions of both of these specs. We can now set the __ARM_FP16_ARGS ACLE predefine, and we have always been able to set the __ARM_FP16_FORMAT_IEEE predefine (we do not support the alternative format). llvm-svn: 246764
* Revert 246755 as it breaks buildbotsOliver Stannard2015-09-032-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | Original commit message: [ARM] Allow passing/returning of __fp16 arguments The ACLE (ARM C Language Extensions) 2.0 allows the __fp16 type to be used as a functon argument or return type (ACLE 1.1 did not). The current public release of the AAPCS (2.09) states that __fp16 values should be converted to single-precision before being passed or returned, but AAPCS 2.10 (to be released shortly) changes this, so that they are passed in the least-significant 16 bits of either a GPR (for base AAPCS) or a single-precision register (for AAPCS-VFP). This does not change how arguments are passed if they get passed on the stack. This patch brings clang up to compliance with the latest versions of both of these specs. We can now set the __ARM_FP16_ARGS ACLE predefine, and we have always been able to set the __ARM_FP16_FORMAT_IEEE predefine (we do not support the alternative format). llvm-svn: 246760
* [ARM] Allow passing/returning of __fp16 argumentsOliver Stannard2015-09-032-1/+3
| | | | | | | | | | | | | | | | | | | | | The ACLE (ARM C Language Extensions) 2.0 allows the __fp16 type to be used as a functon argument or return type (ACLE 1.1 did not). The current public release of the AAPCS (2.09) states that __fp16 values should be converted to single-precision before being passed or returned, but AAPCS 2.10 (to be released shortly) changes this, so that they are passed in the least-significant 16 bits of either a GPR (for base AAPCS) or a single-precision register (for AAPCS-VFP). This does not change how arguments are passed if they get passed on the stack. This patch brings clang up to compliance with the latest versions of both of these specs. We can now set the __ARM_FP16_ARGS ACLE predefine, and we have always been able to set the __ARM_FP16_FORMAT_IEEE predefine (we do not support the alternative format). llvm-svn: 246755
* Fix typo in testEli Bendersky2015-09-011-2/+2
| | | | llvm-svn: 246573
* Fix CHECK directives that weren't checking.Hans Wennborg2015-08-311-2/+2
| | | | llvm-svn: 246492
* [AArch64] Define the macro __ARM_FP16_ARGSKeith Walker2015-08-241-0/+1
| | | | | | | | | | | | | The ACLE (ARM C Language Extensions) 2.0 defines that the predefined macro __ARM_FP16_ARGS should be defined if __fp16 can be used as an argument and result. The support for __fp16 to be used as an argument and result is already implemented for AArch64 so this change is just adding the missing macro. Differential Revision: http://reviews.llvm.org/D12240 llvm-svn: 245833
* Enable passing test on Windows + MSYS.Yaron Keren2015-08-161-1/+0
| | | | llvm-svn: 245184
* [SPARC] Fix types of size_t, intptr_t, and ptrdiff_t on OpenBSD.Brad Smith2015-08-131-8/+9
| | | | llvm-svn: 244961
* Stop printing macro backtraces that don't help diagnostics.Richard Trieu2015-08-121-2/+0
| | | | | | | | | | | | | | | When displaying the macro backtrace, ignore some of the backtraces that do not provide extra information to the diagnostic. Typically, if the problem is entirely contained within a macro argument, the macro expansion is often not needed. Also take into account SourceRange's attached to the diagnostic when selecting which backtraces to ignore. Two previous test cases have also been updated. Patch by Zhengkai Wu, with minor formatting fixes. Differential Revision: http://reviews.llvm.org/D11778 llvm-svn: 244788
* [Tests] Add explicit -std=lang option to a number of tests.Yunzhong Gao2015-08-012-1/+2
| | | | | | | | | | | This patch should not change the test results, but it is useful if clang's default C++ language is ever changed from gnu++98. Patch by: Charles Li http://lists.cs.uiuc.edu/pipermail/cfe-commits/Week-of-Mon-20150727/134667.html llvm-svn: 243819
* Improved error recovery for _PragmaHubert Tong2015-07-301-0/+4
| | | | | | | | | | | | | | | | | | | | | Summary: Currently, if the argument to _Pragma is not a parenthesised string literal, the bad token will be consumed, as well as the ')', if present. If additional bad tokens are passed to the _Pragma, this results in extra error messages which may distract from the true problem. The proposed patch causes all tokens to be consumed until the closing ')' or a new line, whichever is reached first. Reviewers: hfinkel, rsmith Subscribers: hubert.reinterpretcast, fraggamuffin, rnk, cfe-commits Differential Revision: http://reviews.llvm.org/D8308 Patch by Rachel Craik! llvm-svn: 243692
* Add support for System z vector language extensionsUlrich Weigand2015-07-301-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The z13 vector facility has an associated language extension, closely modeled on AltiVec/VSX. The main differences are: - vector long, vector float and vector pixel are not supported - vector long long and vector double are supported (like VSX) - comparison operators return a vector rather than a scalar integer - shift operators behave like the OpenCL shift operators - vector bool is only supported as argument to certain operators; some operators allow mixing a bool with a non-bool vector This patch adds clang support for the extension. It is closely modelled on the AltiVec support. Similarly to the -faltivec option, there's a new -fzvector option to enable the extensions (as well as an -mzvector alias for compatibility with GCC). There's also a separate LangOpt. The extension as implemented here is intended to be compatible with the -mzvector extension recently implemented by GCC. Based on a patch by Richard Sandiford. Differential Revision: http://reviews.llvm.org/D11001 llvm-svn: 243642
* Rename -Wmsvc-include to -Wmicrosoft-include, now that -Wmicrosoft is split up.Nico Weber2015-07-283-4/+4
| | | | | | | | | (Keep -Wmsvc-include around as an alias.) While here, also replace the one other mention of "MSVC" in diagnostics with "Microsoft", for consistency. llvm-svn: 243444
* Fix what looks like accidentally repeated file contents. No behavior change.Nico Weber2015-07-282-6/+0
| | | | llvm-svn: 243376
* [Targets] Define _M_AMD64 and _M_X64 to a more appropriate valueDavid Majnemer2015-07-261-2/+2
| | | | | | We used to define them to 1, we should have defined them to 100. llvm-svn: 243255
* ARM: actually define __ARM_ARCH_7S__ for the armv7s sliceTim Northover2015-07-211-1/+8
| | | | | | | We ended up with the wrong predefine after the recent TargetParser shuffle, and I accidentally solidified it with a test. This should fix it. llvm-svn: 242841
* Allow case-insensitive values for -mtune for AArch64 target in line with GCC.Gabor Ballabas2015-07-201-0/+5
| | | | | | | | | GCC allows case-insensitive values for -mcpu, -march and -mtune options. This patch implements the same behaviour for the -mtune option for the AArch64 target. Differential Revision: http://reviews.llvm.org/D10563 llvm-svn: 242663
* R600: Add macro defs for all supported OpenCL extensionsTom Stellard2015-07-171-1/+8
| | | | llvm-svn: 242523
* [Targets] Define __BOOL_DEFINED for Windows targets in C++ modeDavid Majnemer2015-07-151-0/+2
| | | | | | | | | | MSVC 4.2 didn't have bool as a builtin type but MSVC 5.0 does. When they added it, they added a macro (__BOOL_DEFINED) which allows build scripts and the like to know if they should provide their own bool. Clang always supports bool as a builtin type in C++ mode. llvm-svn: 242307
* Avoid false positive/negative test results from line directive interference.NFC.Chad Rosier2015-06-261-5/+8
| | | | | | | http://reviews.llvm.org/D10443 Patch by Geoff Berry. llvm-svn: 240801
* Add __nonnull/__nullable/__null_unspecified predefines for Darwin.Douglas Gregor2015-06-241-0/+12
| | | | | | Addresses the rest of rdar://problem/21530726. llvm-svn: 240597
* Allow case-insensitive values for -march for AArch64 target in line with GCC.Gabor Ballabas2015-06-181-0/+4
| | | | | | | GCC allows case-insensitive values for -mcpu, -march and -mtune options. This patch implements the same behaviour for the -march option for the AArch64 target. llvm-svn: 240019
* Commit some test changes somehow missed in r239789.Richard Smith2015-06-161-1/+1
| | | | llvm-svn: 239791
* According to the OpenMP spec, all the preprocessor macros should be Samuel Antao2015-06-151-0/+31
| | | | | | expanded in OpenMP pragmas. This patch adds support for that in -E. llvm-svn: 239784
* Allow case-insensitive values for -mcpu for AArch64 target in line with GCC.Gabor Ballabas2015-06-121-0/+6
| | | | | | | GCC allows case-insensitive values for -mcpu, -march and -mtune options. This patch implements the same behaviour for the -mcpu option for the AArch64 target. llvm-svn: 239619
* [ARM] Use TargetParser to determine FPU subtarget featuresJohn Brawn2015-06-051-2/+2
| | | | | | | | | | | | | | | The main effect of this is to fix anomalies where certain -mfpu options didn't disable everything that they should causing strange behaviour when combined with -mcpu or -march values that themselves enabled fpu subtarget features, e.g. -mfpu=fpv5-dp-d16 with -march=armv7em previously behaved the same as -mfpu=fpv5-sp-d16 due to fp-only-sp not being disabled. Invalid -mfpu options now also give an error, which is consistent with the handling of the .fpu directive. Differential Revision: http://reviews.llvm.org/D10239 llvm-svn: 239152
* [SPARC] Fix types of size_t, intptr_t, and ptrdiff_t on Linux.James Y Knight2015-06-041-7/+16
| | | | | | | | They should be 'int' instead of 'long int' everywhere else except NetBSD too, from what I gather in GCC's spec files. So, optimistically changing it for everyone else, too. llvm-svn: 239046
* ARM: fix ACLE predefine for iOS's "-arch armv7s".Tim Northover2015-05-291-0/+1
| | | | | | We were getting "#define __ARM_ARCH_7 -S__ 1" which is really not a good idea. llvm-svn: 238614
* [Basic] Define __declspec for cygwinDavid Majnemer2015-05-281-0/+10
| | | | | | | | Cygwin (and MinGW) targets define __declspec to __attribute__ unless -fms-extensions is specified. It turns out that cygwin headers rely on the existence of this macro. llvm-svn: 238394
* Bug fix for PR23577 (https://llvm.org/bugs/show_bug.cgi?id=23577#c0).Alexander Musman2015-05-251-1/+44
| | | | | | | | | | | | "1-4" specifiers are returned as numeric constants, not identifiers, and should be treated as such. Currently pragma handler incorrectly assumes that they are returned as identifiers. Patch by Andrey Bokhanko. Differential Revision: http://reviews.llvm.org/D9856 llvm-svn: 238129
* Testing for the fix for bug 23429.Nemanja Ivanovic2015-05-141-0/+13
| | | | | | | | | Follow-up to commit for revision 236848. Just a test case for the macro definition under the right CPU/Arch. One combination was actually missed in the initial fix: - powerpc64-unknown-unknown -mcpu=pwr8 (rather than -mcpu=power8). llvm-svn: 237386
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