summaryrefslogtreecommitdiffstats
path: root/clang/test/Preprocessor
Commit message (Collapse)AuthorAgeFilesLines
* Add __CLANG_ATOMIC_<TYPE>_LOCK_FREE macros for use in MSVC compatibility mode.Eric Fiselier2017-04-201-0/+53
| | | | | | | | | | | | | | | | | Summary: Libc++ currently implements the `ATOMIC_<TYPE>_LOCK_FREE` macros using the `__GCC_ATOMIC_<TYPE>_LOCK_FREE` macros. However these are not available when MSVC compatibility is enabled even though C11 `_Atomic` is. This prevents libc++ from correctly implementing `ATOMIC_<TYPE>_LOCK_FREE`. This patch adds an alternative spelling `__CLANG_ATOMIC_<TYPE>_LOCK_FREE` that is enabled with `-fms-compatibility`. Reviewers: rsmith, aaron.ballman, majnemer, zturner, compnerd, jfb, rnk Reviewed By: rsmith Subscribers: BillyONeal, smeenai, jfb, cfe-commits, dschuff Differential Revision: https://reviews.llvm.org/D32265 llvm-svn: 300914
* [ARM,AArch64] Define __ELF__ for arm-none-eabihf and AArch64Oliver Stannard2017-04-181-0/+3
| | | | | | | This macro is defined for arm-none-eabi as of r266625, but it should also be defined for eabihf and aarch64. llvm-svn: 300549
* When we turn on vsx it should also turn on altivec explicitly, sameEric Christopher2017-04-151-0/+8
| | | | | | | | | with disabling it as well as disabling all vsx specific features when turning off altivec. Fixes PR32663. llvm-svn: 300395
* Default enable the rtm feature only on skylake and later for now because ↵Eric Christopher2017-03-281-4/+0
| | | | | | | | | | Intel disabled the feature on some haswell and broadwell processors: http://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/core-m-processor-family-spec-update.pdf the -mrtm option will still work normally. llvm-svn: 298956
* _CALL_LINUX is only defined on 64-bit ppc linux platforms, not 32-bit.Eric Christopher2017-03-251-0/+4
| | | | | | Adjust and add a test for the 32-bit side. llvm-svn: 298778
* Add the __LONGDOUBLE128 define for ppc targets that have 128 bit long doubles.Eric Christopher2017-03-251-0/+7
| | | | llvm-svn: 298770
* Define __HAVE_BSWAP__ on ppc to match gcc since we support both builtins as ↵Eric Christopher2017-03-251-0/+6
| | | | | | well. llvm-svn: 298769
* Add the _CALL_LINUX preprocessor define for ppc linux platforms.Eric Christopher2017-03-251-0/+6
| | | | | | | | This typically is only for a new enough linker (bfd >= 2.16.2 or gold), but our ppc suppport post-dates this and it should work on all linux platforms. It is guaranteed to work on all elfv2 platforms. llvm-svn: 298765
* __BIGGEST_ALIGNMENT__ has always been 16 on all power platforms ratherEric Christopher2017-03-251-6/+6
| | | | | | than the default of 8 in clang, fix and update tests accordingly. llvm-svn: 298761
* Add preprocessor defines for a bare powerpc64le triple/cpu.Eric Christopher2017-03-251-0/+3
| | | | | | | The le triple didn't exist until power8, so use that as a default (this also matches what gcc does). llvm-svn: 298759
* Turn on HTM on power8 and later (including powerpc64le) since it'sEric Christopher2017-03-201-0/+18
| | | | | | available by default on those cpus and configurations. llvm-svn: 298307
* Bump __cplusplus for C++17 to 201703L per the C++17 DIS.Richard Smith2017-03-201-2/+2
| | | | llvm-svn: 298299
* Add a small test for __STRUCT_PARM_ALIGN__ for ppc64 darwin.Eric Christopher2017-03-161-1/+4
| | | | llvm-svn: 298006
* [AArch64] Vulcan is now ThunderXT99Joel Jones2017-03-071-2/+2
| | | | | | | | | | | | | Broadcom Vulcan is now Cavium ThunderX2T99. LLVM Bugzilla: http://bugs.llvm.org/show_bug.cgi?id=32113 Corresponding LLVM change: https://reviews.llvm.org/rL297190 Changes to clang to support the change. Patch by Joel Jones llvm-svn: 297227
* Set the Int64Type / IntMaxType types correctly for OpenBSD/mips64Brad Smith2017-03-061-0/+2
| | | | llvm-svn: 297098
* Also test OpenBSD/powerpc here for the various types expected to be the same ↵Brad Smith2017-02-251-0/+1
| | | | | | across archs. llvm-svn: 296256
* Hook up OpenBSD AArch64 supportBrad Smith2017-02-211-0/+193
| | | | llvm-svn: 295786
* [mips] Define macros related to -mabicalls in the preprocessorSimon Dardis2017-02-211-0/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Historically, NetBSD, FreeBSD and OpenBSD have defined the macro ABICALLS in the preprocessor when -mabicalls is in effect. Mainline GCC later defined __mips_abicalls when -mabicalls is in effect. This patch teaches the preprocessor to define these macros when appropriate. NetBSD does not require the ABICALLS macro. This resolves PR/31694. Thanks to Sean Bruno for highlighting this issue! Reviewers: slthakur, seanbruno Reviewed By: seanbruno Subscribers: joerg, brad, emaste, seanbruno, cfe-commits Differential Revision: https://reviews.llvm.org/D29032 llvm-svn: 295728
* [ARM] Add regression tests for Cortex-M23 and Cortex-M33Sanne Wouda2017-02-201-0/+25
| | | | | | | | | | | | Reviewers: rengolin, t.p.northover Reviewed By: t.p.northover Subscribers: aemerson, llvm-commits Differential Revision: https://reviews.llvm.org/D30100 llvm-svn: 295647
* Add a definition for __STRUCT_PARM_ALIGN__ for elfv2 and 64-bit darwin ↵Eric Christopher2017-02-151-0/+1
| | | | | | platforms to match what other compilers produce. llvm-svn: 295156
* Add support for armv7ve flag in clang (PR31358).George Burgess IV2017-02-093-0/+25
| | | | | | | | | | | This is a followup change to add v7ve support to clang for gcc compatibility. Please see r294661. Patch by Manoj Gupta. Differential Revision: https://reviews.llvm.org/D29773 llvm-svn: 294662
* [X86] Clzero flag addition and inclusion under znver1Craig Topper2017-02-091-0/+2
| | | | | | | | | | | | | 1. Adds the command line flag for clzero. 2. Includes the clzero flag under znver1. 3. Defines the macro for clzero. 4. Adds a new file which has the intrinsic definition for clzero instruction. Patch by Ganesh Gopalasubramanian with some additional tests from me. Differential revision: https://reviews.llvm.org/D29386 llvm-svn: 294559
* Add check that "#define unix 1" is present for the PS4 target.Douglas Yung2017-02-091-0/+1
| | | | llvm-svn: 294534
* [X86] Add -mprefetchwt1/-mno-prefetchwt1 command line options and ↵Craig Topper2017-02-081-0/+2
| | | | | | __PREFETCHWT1__ define to match gcc. llvm-svn: 294424
* [X86] Add -msgx/-mno-sgx command line options and __SGX__ define to match gcc.Craig Topper2017-02-081-0/+6
| | | | llvm-svn: 294423
* [X86] Add -mmpx/-mno-mpx command line options and __MPX__ define to match gcc.Craig Topper2017-02-081-0/+6
| | | | llvm-svn: 294419
* [X86] Add -mclwb/-mno-clwb command line arguments and __CLWB__ define to ↵Craig Topper2017-02-081-0/+2
| | | | | | | | match gcc. In the future, we should also add a clwb intrinsic to the backend, a frontend builtin, and an instrinsic header file. llvm-svn: 294416
* [X86] Add -mclflushopt/-mno-clflushopt command line support and ↵Craig Topper2017-02-082-0/+12
| | | | | | __CLFLUSHOPT__ define to match gcc. llvm-svn: 294411
* Revert "Basic: match GCC behaviour for SuS macro"Saleem Abdulrasool2017-02-071-0/+3
| | | | | | | This reverts commit SVN r294148. Seems that it was mistaken, and GCC does still define `__unix` and `unix` when in GNU mode. llvm-svn: 294332
* [SystemZ] Provide predefined __ARCH__ and __VX__ macrosUlrich Weigand2017-02-061-23/+70
| | | | | | | | | | | | GCC 7 will predefine two new macros on s390x: - __ARCH__ indicates the ISA architecture level - __VX__ indicates that the vector facility is available This adds those macros to clang as well to ensure continued compatibility with GCC. llvm-svn: 294197
* Basic: match GCC behaviour for SuS macroSaleem Abdulrasool2017-02-051-3/+0
| | | | | | | | GCC does not generate `__unix` nor `unix` macros. The latter already intrudes into the user's namespace and should be avoided. Use the canonical spelling of `__unix__` across all the targets. llvm-svn: 294148
* [Frontend] The macro that describes the Objective-C bool type shouldAlex Lorenz2017-01-201-0/+2
| | | | | | | | | | be defined for non Objective-C code as well rdar://29794915 Differential Revision: https://reviews.llvm.org/D28349 llvm-svn: 292617
* Fix PR31644 introduced by r287138 and add a regression test.Yaron Keren2017-01-141-0/+7
| | | | | | Thanks Dimitry Andric for the report and fix! llvm-svn: 292032
* AMD family 17h (znver1) enablementCraig Topper2017-01-101-0/+82
| | | | | | | | | | | | | | | | | | | | | | | Summary: This patch enables the following 1. AMD family 17h architecture using "znver1" tune flag (-march, -mcpu). 2. ISAs that are enabled for "znver1" architecture. 3. Checks ADX isa from cpuid to identify "znver1" flag when -march=native is used. 4. ISAs FMA4, XOP are disabled as they are dropped from amdfam17. 5. For the time being, it uses the btver2 scheduler model. 6. Test file is updated to check this flag. This is linked to llvm review item https://reviews.llvm.org/D28017 Patch by Ganesh Gopalasubramanian. Additional test cases added by Craig Topper. Reviewers: RKSimon, craig.topper Subscribers: cfe-commits, RKSimon, ashutosh.nema, llvm-commits Differential Revision: https://reviews.llvm.org/D28018 llvm-svn: 291544
* [CUDA] More correctly inherit primitive types from the host during device ↵Justin Lebar2017-01-051-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | compilation. Summary: CUDA lets users share structs between the host and device, so for that and other reasons, primitive types such as ptrdiff_t should be the same on both sides of the compilation. Our code to do this wasn't entirely successful. In particular, we did a bunch of work during the NVPTXTargetInfo constructor, only to override it in the NVPTX{32,64}TargetInfo constructors. It worked well enough on Linux and Mac, but Windows is LLP64, which is different enough to break it. This patch removes the NVPTX{32,64}TargetInfo classes entirely and fixes the bug described above. Reviewers: tra Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D28322 llvm-svn: 291135
* Add AVR target and toolchain to ClangDylan McKay2017-01-051-0/+171
| | | | | | | | | | | | | | | | | Summary: Authored by Senthil Kumar Selvaraj This patch adds barebones support in Clang for the (experimental) AVR target. It uses the integrated assembler for assembly, and the GNU linker for linking, as lld doesn't know about the target yet. The DataLayout string is the same as the one in AVRTargetMachine.cpp. The alignment specs look wrong to me, as it's an 8 bit target and all types only need 8 bit alignment. Clang failed with a datalayout mismatch error when I tried to change it, so I left it that way for now. Reviewers: rsmith, dylanmckay, cfe-commits, rengolin Subscribers: rengolin, jroelofs, wdng Differential Revision: https://reviews.llvm.org/D27123 llvm-svn: 291082
* ARM: define a macro for the FPv5 FPU in ARM mode.Tim Northover2016-12-211-0/+1
| | | | | | | FPv5 is in Cortex-M7 and the 64-bit CPUs when running in 32-bit mode. The name is from the Cortex-M7 TRM. llvm-svn: 290268
* Add support for Samsung Exynos M3 (NFC)Evandro Menezes2016-12-131-0/+1
| | | | llvm-svn: 289614
* Also recognize -std=iso9899:201xBenjamin Kramer2016-12-061-0/+3
| | | | | | | | | | | It should already be handled but a typo in the LANGSTANDARD() definition was introduced in r147220. Patch by Alexander Richardson, test case by me. Differential Revision:https://reviews.llvm.org/D27427 llvm-svn: 288793
* [CUDA] Attempt to fix test failures in cuda-macos-includes.cu.Justin Lebar2016-11-181-2/+2
| | | | | | | Run clang -cc1 -E instead of -S, in an attempt to make this test work cross-platform. llvm-svn: 287292
* [CUDA] Initialize our header search using the host triple.Justin Lebar2016-11-181-0/+13
| | | | | | | | | | | | | | | | Summary: This used to work because system headers are found in a (somewhat) predictable set of locations on Linux. But this is not the case on MacOS; without this change, we don't look in the right places for our headers when doing device-side compilation on Mac. Reviewers: tra Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D26776 llvm-svn: 287286
* [Preprocessor] Support for '-dI' flagBruno Cardoso Lopes2016-11-174-0/+20
| | | | | | | | | | | | | | | | | Re-introduce r285411. Implement the -dI as supported by GCC: Output ‘#include’ directives in addition to the result of preprocessing. This change aims to add this option, pass it through to the preprocessor via the options class, and when inclusions occur we output some information (+ test cases). Patch by Steve O'Brien! Differential Revision: https://reviews.llvm.org/D26089 llvm-svn: 287275
* Add a new optimization option -Og Sylvestre Ledru2016-11-111-0/+6
| | | | | | | | | | | | | | Summary: Just like gcc, we should have the -Og option as more and more software are using it: https://llvm.org/bugs/show_bug.cgi?id=20765 Reviewers: echristo, dberlin, dblaikie, keith.walker.arm, rengolin Subscribers: aprantl, friss, mehdi_amini, RKSimon, probinson, majnemer, cfe-commits Differential Revision: https://reviews.llvm.org/D24998 llvm-svn: 286602
* Define __ANDROID_API__ when specified as part of an Android target.Stephen Hines2016-11-111-0/+5
| | | | | | | | | | | | | | | | | Summary: This macro should be defined only when the user directly specifies an API level as part of an Android target. For any regular Android target, we leave this macro undefined. Bug: https://llvm.org/bugs/show_bug.cgi?id=30940 Reviewers: eugenis, pirama Subscribers: tberghammer, cfe-commits, pirama, eugenis, danalbert Differential Revision: https://reviews.llvm.org/D26491 llvm-svn: 286543
* [Sparc] LLONG is not lock-free atomic on v8Douglas Katzman2016-11-091-0/+1
| | | | | | Differential Revision: https://reviews.llvm.org/D26286 llvm-svn: 286376
* [AVX-512] Make VBMI instruction set enabling imply that the BWI instruction ↵Craig Topper2016-11-091-0/+6
| | | | | | | | | | | | | | set is also enabled. Summary: This is needed to make the v64i8 and v32i16 types legal for the 512-bit VBMI instructions. Fixes PR30912. Reviewers: delena, zvi Subscribers: RKSimon, cfe-commits Differential Revision: https://reviews.llvm.org/D26306 llvm-svn: 286340
* [SystemZ] Add -march=archX aliasesUlrich Weigand2016-10-311-0/+3
| | | | | | | | | | | | | | | For compatibility with other compilers on the platform, allow specifying levels of the z/Architecture instead of model names with -march. In particular, the following aliases are now supported: -march=arch8 equals -march=z10 -march=arch9 equals -march=z196 -march=arch10 equals -march=zEC12 -march=arch11 equals -march=z13 This parallels the equivalent (and prerequisite) LLVM change in r285577. llvm-svn: 285578
* Revert "[Preprocessor] Support for '-dI' flag"Bruno Cardoso Lopes2016-10-284-20/+0
| | | | | | | This reverts r285411. Tests failing on http://lab.llvm.org:8011/builders/clang-x86-windows-msvc2015/builds/141 llvm-svn: 285416
* [Preprocessor] Support for '-dI' flagBruno Cardoso Lopes2016-10-284-0/+20
| | | | | | | | | | | | | | | Implement the -dI as supported by GCC: Output ‘#include’ directives in addition to the result of preprocessing. This change aims to add this option, pass it through to the preprocessor via the options class, and when inclusions occur we output some information (+ test cases). Patch by Steve O'Brien! Differential Revision: https://reviews.llvm.org/D25153 llvm-svn: 285411
* Do not print include_next/pragma once warnings when input is a header.Erik Verbruggen2016-10-271-0/+8
| | | | | | | | | | | r276653 suppressed the pragma once warning when generating a PCH file. This patch extends that to any main file for which clang is told (with the -x option) that it's a header file. It will also suppress the warning "#include_next in primary source file". Differential Revision: http://reviews.llvm.org/D25989 llvm-svn: 285295
OpenPOWER on IntegriCloud