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* [test] Fix typos in a few tests (NFC)Vedant Kumar2015-08-231-1/+1
| | | | | | Patch by Kai Zhao! llvm-svn: 245817
* Update Clang tests to handle explicitly typed load changes in LLVM.David Blaikie2015-02-271-1/+1
| | | | llvm-svn: 230795
* Make sure that arm-linux-gnu is still the apcs-gnu ABI when weEric Christopher2014-12-181-1/+1
| | | | | | | | | | | | use clang -cc1 matching the front end and backend. Fix up a couple of tests that were testing aapcs for arm-linux-gnu. The test that removes the aapcs abi calling convention removes them because the default triple matches what the backend uses for the calling convention there and so it doesn't need to be explicitly stated - see the code in TargetInfo.cpp. llvm-svn: 224491
* AArch64: simplify PCS mapping.Tim Northover2014-11-271-30/+9
| | | | | | | | | | | | Now that LLVM can count the registers needed to implement AAPCS rules, we don't need to duplicate that logic here. This means we can drop the explicit padding and also use more natural types in many cases (e.g. "struct { float arr[3]; }" used to end up as "[2 x double]" to avoid holes on the stack. The one wrinkle is that AAPCS va_arg was also using the register counting machinery. But the local replacement isn't too bad. llvm-svn: 222904
* ARM ABI: simplify decisions on whether args can be expanded.Tim Northover2014-11-071-2/+2
| | | | | | | | | | | | Homogeneous aggregates on AAPCS_VFP ARM need to be passed *without* being flattened (e.g. [2 x float] rather than "float, float") for various weird ABI reasons. However, this isn't the case for anything else; further, we know at the ABIArgInfo::getDirect callsites whether this flattening is allowed. So, we can get more unified ARM code, with a simpler Clang, by just using that knowledge directly. llvm-svn: 221559
* Implement IRGen for the x86 vectorcall conventionReid Kleckner2014-10-311-6/+39
| | | | | | | | | | | | | | | The most complex aspect of the convention is the handling of homogeneous vector and floating point aggregates. Reuse the homogeneous aggregate classification code that we use on PPC64 and ARM for this. This convention also has a C mangling, and we apparently implement that in both Clang and LLVM. Reviewed By: majnemer Differential Revision: http://reviews.llvm.org/D6063 llvm-svn: 221006
* Fix ARM HVA classification of classes with non-virtual basesReid Kleckner2014-10-311-0/+94
Reuse the PPC64 HVA detection algorithm for ARM and AArch64. This is a nice code deduplication, since they are roughly identical. A few virtual method extension points are needed to understand how big an HVA can be and what element types it can have for a given architecture. Also make the record expansion code work in the presence of non-virtual bases. Reviewed By: uweigand, asl Differential Revision: http://reviews.llvm.org/D6045 llvm-svn: 220972
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