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* Revert r341754.Akira Hatanaka2018-09-094-7/+0
| | | | | | | | | The commit broke a couple of bots: http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win/builds/12347 http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-bootstrap/builds/7310 llvm-svn: 341757
* Distinguish `__block` variables that are captured by escaping blocksAkira Hatanaka2018-09-084-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | from those that aren't. This patch changes the way __block variables that aren't captured by escaping blocks are handled: - Since non-escaping blocks on the stack never get copied to the heap (see https://reviews.llvm.org/D49303), Sema shouldn't error out when the type of a non-escaping __block variable doesn't have an accessible copy constructor. - IRGen doesn't have to use the specialized byref structure (see https://clang.llvm.org/docs/Block-ABI-Apple.html#id8) for a non-escaping __block variable anymore. Instead IRGen can emit the variable as a normal variable and copy the reference to the block literal. Byref copy/dispose helpers aren't needed either. rdar://problem/39352313 Differential Revision: https://reviews.llvm.org/D51564 llvm-svn: 341754
* Do not use optimized atomic libcalls for misaligned atomics.Richard Smith2018-09-071-10/+37
| | | | | | | | | | | | | | | | | Summary: The optimized (__atomic_foo_<n>) libcalls assume that the atomic object is properly aligned, so should never be called on an underaligned object. This addresses one of several problems identified in PR38846. Reviewers: jyknight, t.p.northover Subscribers: jfb, cfe-commits Differential Revision: https://reviews.llvm.org/D51817 llvm-svn: 341734
* Make -Watomic-alignment say whether the atomic operation was oversizedRichard Smith2018-09-071-4/+4
| | | | | | or misaligned. llvm-svn: 341710
* [X86] Custom emit __builtin_rdtscp so we can emit an explicit store for the ↵Craig Topper2018-09-071-0/+9
| | | | | | | | | | out parameter This is the clang side of D51803. The llvm intrinsic now returns two results. So we need to emit an explicit store in IR for the out parameter. This is similar to addcarry/subborrow/rdrand/rdseed. Differential Revision: https://reviews.llvm.org/D51805 llvm-svn: 341699
* [X86] Modify addcarry/subborrow builtins to emit an 2 result and intrinsic ↵Craig Topper2018-09-072-6/+24
| | | | | | | | | | and an store instruction. This is the clang side of D51769. The llvm intrinsics now return two results instead of using an out parameter. Differential Revision: https://reviews.llvm.org/D51771 llvm-svn: 341678
* [MSan] add KMSAN support to Clang driverAlexander Potapenko2018-09-071-0/+1
| | | | | | | | | | | | | | | Boilerplate code for using KMSAN instrumentation in Clang. We add a new command line flag, -fsanitize=kernel-memory, with a corresponding SanitizerKind::KernelMemory, which, along with SanitizerKind::Memory, maps to the memory_sanitizer feature. KMSAN is only supported on x86_64 Linux. It's incompatible with other sanitizers, but supports code coverage instrumentation. llvm-svn: 341641
* Re-land r334417 "[MS] Use mangled names and comdats for string merging with ↵Reid Kleckner2018-09-061-0/+17
| | | | | | | | | ASan" The issue with -fprofile-generate was fixed and the dependent CL relanded in r340232. llvm-svn: 341572
* Revert "[DebugInfo] Generate debug information for labels. (Fix PR37395)"Sam McCall2018-09-062-44/+0
| | | | | | | | | This reverts commit r341519, which generates debug info that causes backend crashes. (with -split-dwarf-file) Details in https://reviews.llvm.org/D50495 llvm-svn: 341549
* [DebugInfo] Generate debug information for labels. (Fix PR37395)Hsiangkai Wang2018-09-062-0/+44
| | | | | | | | | | | | Generate DILabel metadata and call llvm.dbg.label after label statement to associate the metadata with the label. After fixing PR37395. After fixing problems in LiveDebugVariables. Differential Revision: https://reviews.llvm.org/D45045 llvm-svn: 341519
* [x86/SLH] Add a real Clang flag and LLVM IR attribute for SpeculativeChandler Carruth2018-09-041-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Load Hardening. Wires up the existing pass to work with a proper IR attribute rather than just a hidden/internal flag. The internal flag continues to work for now, but I'll likely remove it soon. Most of the churn here is adding the IR attribute. I talked about this Kristof Beyls and he seemed at least initially OK with this direction. The idea of using a full attribute here is that we *do* expect at least some forms of this for other architectures. There isn't anything *inherently* x86-specific about this technique, just that we only have an implementation for x86 at the moment. While we could potentially expose this as a Clang-level attribute as well, that seems like a good question to defer for the moment as it isn't 100% clear whether that or some other programmer interface (or both?) would be best. We'll defer the programmer interface side of this for now, but at least get to the point where the feature can be enabled without relying on implementation details. This also allows us to do something that was really hard before: we can enable *just* the indirect call retpolines when using SLH. For x86, we don't have any other way to mitigate indirect calls. Other architectures may take a different approach of course, and none of this is surfaced to user-level flags. Differential Revision: https://reviews.llvm.org/D51157 llvm-svn: 341363
* [X86] Add ktest intrinsics to match gcc and icc.Craig Topper2018-08-312-0/+136
| | | | | | | | | | | | These aren't documented in the Intel Intrinsics Guide, but are supported by gcc and icc. Includes these intrinsics: _ktestc_mask8_u8, _ktestz_mask8_u8, _ktest_mask8_u8 _ktestc_mask16_u8, _ktestz_mask16_u8, _ktest_mask16_u8 _ktestc_mask32_u8, _ktestz_mask32_u8, _ktest_mask32_u8 _ktestc_mask64_u8, _ktestz_mask64_u8, _ktest_mask64_u8 llvm-svn: 341265
* [WebAssembly] clang-format (NFC)Heejin Ahn2018-08-313-26/+25
| | | | | | | | | | Summary: This patch runs clang-format on all wasm-only files. Subscribers: dschuff, sbc100, jgravelle-google, sunfish, jfb, cfe-commits Differential Revision: https://reviews.llvm.org/D51448 llvm-svn: 341254
* [X86] Add k-mask conversion and load/store instrinsics to match gcc and icc.Craig Topper2018-08-313-0/+112
| | | | | | | | | | | | This adds: _cvtmask8_u32, _cvtmask16_u32, _cvtmask32_u32, _cvtmask64_u64 _cvtu32_mask8, _cvtu32_mask16, _cvtu32_mask32, _cvtu64_mask64 _load_mask8, _load_mask16, _load_mask32, _load_mask64 _store_mask8, _store_mask16, _store_mask32, _store_mask64 These are currently missing from the Intel Intrinsics Guide webpage. llvm-svn: 341251
* [X86] Add kshift intrinsics to match gcc and icc.Craig Topper2018-08-313-0/+64
| | | | | | | | | | | | | | This adds the following intrinsics: _kshiftli_mask8 _kshiftli_mask16 _kshiftli_mask32 _kshiftli_mask64 _kshiftri_mask8 _kshiftri_mask16 _kshiftri_mask32 _kshiftri_mask64 llvm-svn: 341234
* [DEBUGINFO] Add support for emission of the debug directives only.Alexey Bataev2018-08-317-2/+9
| | | | | | | | | | | | | | | | Summary: Added option -gline-directives-only to support emission of the debug directives only. It behaves very similar to -gline-tables-only, except that it sets llvm debug info emission kind to llvm::DICompileUnit::DebugDirectivesOnly. Reviewers: echristo Subscribers: aprantl, fedor.sergeev, JDevlieghere, cfe-commits Differential Revision: https://reviews.llvm.org/D51177 llvm-svn: 341212
* [MinGW] Don't mark external variables as DSO localMartin Storsjo2018-08-292-1/+13
| | | | | | | | | | | | Since MinGW supports automatically importing external variables from DLLs even without the DLLImport attribute, we shouldn't mark them as DSO local unless we actually know them to be local for sure. Keep marking thread local variables as DSO local. Differential Revision: https://reviews.llvm.org/D51382 llvm-svn: 340941
* [X86] Add kadd intrinsics to match gcc and icc.Craig Topper2018-08-282-0/+44
| | | | | | | | | | | | This adds the following intrinsics: _kadd_mask64 _kadd_mask32 _kadd_mask16 _kadd_mask8 These are missing from the Intel Intrinsics Guide, but are implemented by both gcc and icc. llvm-svn: 340879
* [X86] Add kortest intrinsics for 8, 32, and 64 bit masks. Add new intrinsic ↵Craig Topper2018-08-283-0/+184
| | | | | | | | names for 16 bit masks. This matches gcc and icc despite not being documented in the Intel Intrinsics Guide. llvm-svn: 340798
* [PPC] Remove Darwin support from POWER backend.Kit Barton2018-08-274-51/+7
| | | | | | | | | | | | | | This patch removes uses of the Darwin ABI for PowerPC related test cases. This is the first step in removing Darwin support from the POWER backend. clang/test/CodeGen/darwin-ppc-varargs.c was deleted because it was a darwin/ppc specific test case. All other tests were updated to remove the darwin/ppc specific invocation. Phabricator Review: https://reviews.llvm.org/D50989. llvm-svn: 340770
* [X86] Add intrinsics for kand/kandn/knot/kor/kxnor/kxor with 8, 32, and ↵Craig Topper2018-08-273-0/+260
| | | | | | | | | | 64-bit mask registers. This also adds a second intrinsic name for the 16-bit mask versions. These intrinsics match gcc and icc. They just aren't published in the Intel Intrinsics Guide so I only recently found they existed. llvm-svn: 340719
* Add REQUIRES: x86-registered-target to test.Eli Friedman2018-08-241-0/+1
| | | | | | | (This isn't really x86-specific, but we have to pick some non-Apple triple to exercise the right codepath.) llvm-svn: 340644
* [LTO] Fix -save-temps with LTO and unnamed globals.Eli Friedman2018-08-241-0/+10
| | | | | | | | | If all LLVM passes are disabled, we can't emit a summary because there could be unnamed globals in the IR. Differential Revision: https://reviews.llvm.org/D51198 llvm-svn: 340640
* [AVR] Fix inline asm calls now that the addrspace(0) there is explicit.Chandler Carruth2018-08-241-24/+24
| | | | | | | This updates the test case for r340519 so it should pass again. r340522 only got some of the AVR tests that needed an update. llvm-svn: 340596
* Update avr attributes test for output change in r340519Alexander Richardson2018-08-232-2/+2
| | | | | | | | After this commit there is an addrspace(1) before the attribute #. Since these tests are only checking the value of the attribute add a {{.*}} to make the test resilient to future output changes. llvm-svn: 340522
* Missing quote in previous commitJF Bastien2018-08-231-1/+1
| | | | | | The test was failing because I missed a quote. llvm-svn: 340511
* Improve incompatible triple errorJF Bastien2018-08-231-1/+1
| | | | | | When complaining that the triple is incompatible with all targets, print out the triple not just a generic error about triples not matching. llvm-svn: 340510
* Currently clang does not emit unused static constants. GCC emits theseElizabeth Andrews2018-08-221-0/+6
| | | | | | | | | | | | | | | | constants by default when there is no optimization. GCC's option -fno-keep-static-consts can be used to not emit unused static constants. In Clang, since default behavior does not keep unused static constants, -fkeep-static-consts can be used to emit these if required. This could be useful for producing identification strings like SVN identifiers inside the object file even though the string isn't used by the program. Differential Revision: https://reviews.llvm.org/D40925 llvm-svn: 340439
* Eliminate instances of `EmitScalarExpr(E->getArg(n))` in EmitX86BuiltinExpr().Nico Weber2018-08-212-22/+37
| | | | | | | | | | | | EmitX86BuiltinExpr() emits all args into Ops at the beginning, so don't do that work again. This changes behavior: If e.g. ++a was passed as an arg, we incremented a twice previously. This change fixes that bug. https://reviews.llvm.org/D50979 llvm-svn: 340348
* [CodeGen] Implicitly set stackrealign on the main function, if custom stack ↵Martin Storsjo2018-08-211-0/+19
| | | | | | | | | | | | | | | | | | | | | alignment is used If using a custom stack alignment, one is expected to make sure that all callers provide such alignment, or realign the stack in all entry points (and callbacks). Despite this, the compiler can assume that the main function will need realignment in these cases, since the startup routines calling the main function most probably won't provide the custom alignment. This matches what GCC does in similar cases; if compiling with -mincoming-stack-boundary=X -mpreferred-stack-boundary=X, GCC normally assumes such alignment on entry to a function, but specifically for the main function still does realignment. Differential Revision: https://reviews.llvm.org/D51026 llvm-svn: 340334
* [WebAssembly] Revert type of wake count in atomic.wake to i32Heejin Ahn2018-08-201-3/+3
| | | | | | | | | | | | | | Summary: We decided to revert this from i64 to i32 in Nov 28 CG meeting. Fixes PR38632. Reviewers: dschuff Subscribers: sbc100, jgravelle-google, sunfish, jfb, cfe-commits Differential Revision: https://reviews.llvm.org/D51013 llvm-svn: 340235
* DebugInfo: Add the ability to disable DWARF name tables entirelyDavid Blaikie2018-08-203-2/+12
| | | | | | | | | | | | | | | | | | This changes the current default behavior (from emitting pubnames by default, to not emitting them by default) & moves to matching GCC's behavior* with one significant difference: -gno(-gnu)-pubnames disables pubnames even in the presence of -gsplit-dwarf (though -gsplit-dwarf still by default enables -ggnu-pubnames). This allows users to disable pubnames (& the new DWARF5 accelerated access tables) when they might not be worth the size overhead. * GCC's behavior is that -ggnu-pubnames and -gpubnames override each other, and that -gno-gnu-pubnames and -gno-pubnames act as synonyms and disable either kind of pubnames if they come last. (eg: -gpubnames -gno-gnu-pubnames causes no pubnames (neither gnu or standard) to be emitted) llvm-svn: 340206
* [CodeGen] add test file that should have been included with r340141Sanjay Patel2018-08-191-0/+66
| | | | llvm-svn: 340142
* [NEON] Define fp16 vld and vst intrinsics conditionallyIvan A. Kosarev2018-08-192-4/+4
| | | | | | | | | | This patch fixes definitions of vld and vst NEON intrinsics so that we only define them if half-precision arithmetic is supported on the target platform, as prescribed in ACLE 2.0. Differential Revision: https://reviews.llvm.org/D49075 llvm-svn: 340140
* revert r340137: [CodeGen] add rotate builtinsSanjay Patel2018-08-192-87/+78
| | | | | | At least a couple of bots (gcc host compiler on PPC only?) are showing the compiler dying while trying to compile. llvm-svn: 340138
* [CodeGen] add/fix rotate builtins that map to LLVM funnel shift (retry)Sanjay Patel2018-08-192-78/+87
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a retry of rL340135 (reverted at rL340136 because of gcc host compiler crashing) with 2 changes: 1. Move the code into a helper to reduce code duplication (and hopefully work-around the crash). 2. The original commit had a formatting bug in the docs (missing an underscore). Original commit message: This exposes the LLVM funnel shift intrinsics as more familiar bit rotation functions in clang (when both halves of a funnel shift are the same value, it's a rotate). We're free to name these as we want because we're not copying gcc, but if there's some other existing art (eg, the microsoft ops that are modified in this patch) that we want to replicate, we can change the names. The funnel shift intrinsics were added here: https://reviews.llvm.org/D49242 With improved codegen in: https://reviews.llvm.org/rL337966 https://reviews.llvm.org/rL339359 And basic IR optimization added in: https://reviews.llvm.org/rL338218 https://reviews.llvm.org/rL340022 ...so these are expected to produce asm output that's equal or better to the multi-instruction alternatives using primitive C/IR ops. In the motivating loop example from PR37387: https://bugs.llvm.org/show_bug.cgi?id=37387#c7 ...we get the expected 'rolq' x86 instructions if we substitute the rotate builtin into the source. Differential Revision: https://reviews.llvm.org/D50924 llvm-svn: 340137
* revert r340135: [CodeGen] add rotate builtinsSanjay Patel2018-08-192-87/+78
| | | | | | | | At least a couple of bots (PPC only?) are showing the compiler dying while trying to compile: http://lab.llvm.org:8011/builders/clang-ppc64be-linux-multistage/builds/11065/steps/build%20stage%201/logs/stdio http://lab.llvm.org:8011/builders/clang-ppc64be-linux-lnt/builds/18267/steps/build%20stage%201/logs/stdio llvm-svn: 340136
* [CodeGen] add rotate builtinsSanjay Patel2018-08-192-78/+87
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This exposes the LLVM funnel shift intrinsics as more familiar bit rotation functions in clang (when both halves of a funnel shift are the same value, it's a rotate). We're free to name these as we want because we're not copying gcc, but if there's some other existing art (eg, the microsoft ops that are modified in this patch) that we want to replicate, we can change the names. The funnel shift intrinsics were added here: D49242 With improved codegen in: rL337966 rL339359 And basic IR optimization added in: rL338218 rL340022 ...so these are expected to produce asm output that's equal or better to the multi-instruction alternatives using primitive C/IR ops. In the motivating loop example from PR37387: https://bugs.llvm.org/show_bug.cgi?id=37387#c7 ...we get the expected 'rolq' x86 instructions if we substitute the rotate builtin into the source. Differential Revision: https://reviews.llvm.org/D50924 llvm-svn: 340135
* Make __shiftleft128 / __shiftright128 real compiler built-ins.Nico Weber2018-08-171-1/+31
| | | | | | | | | | | | r337619 added __shiftleft128 / __shiftright128 as functions in intrin.h. Microsoft's STL plans on using these functions, and they're using intrin0.h which just has declarations of built-ins to not pull in the huge intrin.h header in the standard library headers. That requires that these functions are real built-ins. https://reviews.llvm.org/D50907 llvm-svn: 340048
* [AArch64] - return address signingLuke Cheeseman2018-08-171-0/+14
| | | | | | | | | | | | | | - Add a command line options -msign-return-address to enable return address signing - Armv8.3a added instructions to sign the return address to help mitigate against ROP attacks - This patch adds command line options to generate function attributes that signal to the back whether return address signing instructions should be added Differential revision: https://reviews.llvm.org/D49793 llvm-svn: 340019
* [NFC] Some small test updates for Implicit Conversion sanitizer.Roman Lebedev2018-08-173-46/+288
| | | | | | Split off from D50250. llvm-svn: 339995
* Disable pubnames in NVPTX debug info using metadataDavid Blaikie2018-08-161-0/+6
| | | | llvm-svn: 339968
* Relax a CHECK line to allow for dso_localVedant Kumar2018-08-161-1/+1
| | | | | | | Fixes a bot failure: http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win/builds/11806 llvm-svn: 339964
* [InstrProf] Use atomic profile counter updates for TSanVedant Kumar2018-08-161-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | Thread sanitizer instrumentation fails to skip all loads and stores to profile counters. This can happen if profile counter updates are merged: %.sink = phi i64* ... %pgocount5 = load i64, i64* %.sink %27 = add i64 %pgocount5, 1 %28 = bitcast i64* %.sink to i8* call void @__tsan_write8(i8* %28) store i64 %27, i64* %.sink To suppress TSan diagnostics about racy counter updates, make the counter updates atomic when TSan is enabled. If there's general interest in this mode it can be surfaced as a clang/swift driver option. Testing: check-{llvm,clang,profile} rdar://40477803 Differential Revision: https://reviews.llvm.org/D50867 llvm-svn: 339955
* [X86] Remove masking from the 512-bit padds and psubs builtins. Use select ↵Craig Topper2018-08-161-12/+20
| | | | | | builtin instead. llvm-svn: 339843
* Use .cpp extension for certain tests instead of .ccMomchil Velikov2018-08-152-0/+0
| | | | | | | | | | | | The tests `CodeGen/aapcs[64]-align.cc` are not run since files with a `.cc` suffix aren't recognisze as tests. This patch renames the above two files to `.cpp`. Differential Revision: https://reviews.llvm.org/D46013 Comitting as obvious. llvm-svn: 339766
* [InlineAsm] Update the min-legal-vector-width function attribute based on ↵Craig Topper2018-08-141-0/+45
| | | | | | | | | | | | | | | | | | | | | inputs and outputs to inline assembly Summary: Another piece of my ongoing to work for prefer-vector-width. min-legal-vector-width will eventually be used by the X86 backend to know whether it needs to make 512 bits type legal when prefer-vector-width=256. If the user used inline assembly that passed in/out a 512-bit register, we need to make sure 512 bits are considered legal. Otherwise we'll get an assert failure when we try to wire up the inline assembly to the rest of the code. This patch just checks the LLVM IR types to see if they are vectors and then updates the attribute based on their total width. I'm not sure if this is the best way to do this or if there's any subtlety I might have missed. So if anyone has other opinions on how to do this I'm open to suggestions. Reviewers: chandlerc, rsmith, rnk Reviewed By: rnk Subscribers: eraman, cfe-commits Differential Revision: https://reviews.llvm.org/D50678 llvm-svn: 339721
* [X86] Lowering addus/subus intrinsics to native IRTomasz Krupa2018-08-144-51/+167
| | | | | | | | | | | | | | Summary: This is the patch that lowers x86 intrinsics to native IR in order to enable optimizations. Reviewers: craig.topper, spatel, RKSimon Reviewed By: craig.topper Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D46892 llvm-svn: 339651
* [CodeGen] Before returning a copy/dispose helper function, bitcast it toAkira Hatanaka2018-08-141-2/+3
| | | | | | | | a void pointer type. This fixes a bug introduced in r339438. llvm-svn: 339633
* [CodeGen] Merge equivalent block copy/helper functions.Akira Hatanaka2018-08-103-32/+41
| | | | | | | | | | | | | | | | | | | | | | | Clang generates copy and dispose helper functions for each block literal on the stack. Often these functions are equivalent for different blocks. This commit makes changes to merge equivalent copy and dispose helper functions and reduce code size. To enable merging equivalent copy/dispose functions, the captured object infomation is encoded into the helper function name. This allows IRGen to check whether an equivalent helper function has already been emitted and reuse the function instead of generating a new helper function whenever a block is defined. In addition, the helper functions are marked as linkonce_odr to enable merging helper functions that have the same name across translation units and marked as unnamed_addr to enable the linker's deduplication pass to merge functions that have different names but the same content. rdar://problem/42640608 Differential Revision: https://reviews.llvm.org/D50152 llvm-svn: 339438
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