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* [clang][NewPM] Fix broken -O0 test from missing assumptionsLeonard Chan2019-06-132-2/+6
| | | | | | | | | | | Add an AssumptionCache callback to the InlineFuntionInfo used for the AlwaysInlinerPass to match codegen of the AlwaysInlinerLegacyPass to generate llvm.assume. This fixes CodeGen/builtin-movdir.c when new PM is enabled by default. Differential Revision: https://reviews.llvm.org/D63170 llvm-svn: 363287
* [clang][NewPM] Fix split debug testLeonard Chan2019-06-131-2/+8
| | | | | | | | | This contains the part of D62225 which fixes CodeGen/split-debug-single-file.c by not placing .dwo sections when using -enable-split-dwarf=split. Differential Revision: https://reviews.llvm.org/D63168 llvm-svn: 363281
* [clang][NewPM] Fix broken -O0 test from the AlwaysInlinerLeonard Chan2019-06-131-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | This contains the part of D62225 which prevents insertion of lifetime intrinsics when creating the AlwaysInliner. This fixes the following tests when the new PM is enabled by default: Clang :: CodeGen/aarch64-neon-across.c Clang :: CodeGen/aarch64-neon-fcvt-intrinsics.c Clang :: CodeGen/aarch64-neon-fma.c Clang :: CodeGen/aarch64-neon-perm.c Clang :: CodeGen/aarch64-neon-tbl.c Clang :: CodeGen/aarch64-poly128.c Clang :: CodeGen/aarch64-v8.2a-neon-intrinsics.c Clang :: CodeGen/arm-neon-fma.c Clang :: CodeGen/arm-neon-numeric-maxmin.c Clang :: CodeGen/arm-neon-vcvtX.c Clang :: CodeGen/avx-builtins.c Clang :: CodeGen/builtins-ppc-p9vector.c Clang :: CodeGen/builtins-ppc-vsx.c Clang :: CodeGen/lifetime.c Clang :: CodeGen/sse-builtins.c Clang :: CodeGen/sse2-builtins.c Differential Revision: https://reviews.llvm.org/D63153 llvm-svn: 363277
* [PowerPC] [Clang] Port SSE2 intrinsics to PowerPCZi Xuan Wu2019-06-121-0/+3253
| | | | | | | | | | | | | | | | Port emmintrin.h which include Intel SSE2 intrinsics implementation to PowerPC platform (using Altivec). The new headers containing those implemenations are located into a directory named ppc_wrappers which has higher priority when the platform is PowerPC on Linux. They are mainly developed by Steven Munroe, with contributions from Paul Clarke, Bill Schmidt, Jinsong Ji and Zixuan Wu. It's a follow-up patch of D62121. Patched by: Qiu Chaofan <qiucf@cn.ibm.com> Differential Revision: https://reviews.llvm.org/D62569 llvm-svn: 363122
* [X86] [ABI] Fix i386 ABI "__m64" type bugPengfei Wang2019-06-122-2/+31
| | | | | | | | | | | | | | | | According to System V i386 ABI: the __m64 type paramater and return value are passed by MMX registers. But current implementation treats __m64 as i64 which results in parameter passing by stack and returning by EDX and EAX. This patch fixes the bug (https://bugs.llvm.org/show_bug.cgi?id=41029) for Linux and NetBSD. Patch by Wei Xiao (wxiao3) Differential Revision: https://reviews.llvm.org/D59744 llvm-svn: 363116
* [NFC][PowerPC] Header-dependent test requires "native"Hubert Tong2019-06-112-2/+2
| | | | | | | | Two recently added tests mention complications for cross-compile, but they do not actually enforce native compilation. This patch makes them require native compilation to avoid the complications they mention. llvm-svn: 363070
* [RISCV][NFC] Add missing test files for D54091Lewis Revill2019-06-111-0/+28
| | | | llvm-svn: 363056
* [X86] Enable intrinsics that convert float and bf16 data to each otherPengfei Wang2019-06-112-12/+86
| | | | | | | | | | | | | | | | Scalar version : _mm_cvtsbh_ss , _mm_cvtness_sbh Vector version: _mm512_cvtpbh_ps , _mm256_cvtpbh_ps _mm512_maskz_cvtpbh_ps , _mm256_maskz_cvtpbh_ps _mm512_mask_cvtpbh_ps , _mm256_mask_cvtpbh_ps Patch by Shengchen Kan (skan) Differential Revision: https://reviews.llvm.org/D62363 llvm-svn: 363018
* [ARM] Fix bugs introduced by the fp64/d32 rework.Simon Tatham2019-06-071-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change D60691 caused some knock-on failures that weren't caught by the existing tests. Firstly, selecting a CPU that should have had a restricted FPU (e.g. `-mcpu=cortex-m4`, which should have 16 d-regs and no double precision) could give the unrestricted version, because `ARM::getFPUFeatures` returned a list of features including subtracted ones (here `-fp64`,`-d32`), but `ARMTargetInfo::initFeatureMap` threw away all the ones that didn't start with `+`. Secondly, the preprocessor macros didn't reliably match the actual compilation settings: for example, `-mfpu=softvfp` could still set `__ARM_FP` as if hardware FP was available, because the list of features on the cc1 command line would include things like `+vfp4`,`-vfp4d16` and clang didn't realise that one of those cancelled out the other. I've fixed both of these issues by rewriting `ARM::getFPUFeatures` so that it returns a list that enables every FP-related feature compatible with the selected FPU and disables every feature not compatible, which is more verbose but means clang doesn't have to understand the dependency relationships between the backend features. Meanwhile, `ARMTargetInfo::handleTargetFeatures` is testing for all the various forms of the FP feature names, so that it won't miss cases where it should have set `HW_FP` to feed into feature test macros. That in turn caused an ordering problem when handling `-mcpu=foo+bar` together with `-mfpu=something_that_turns_off_bar`. To fix that, I've arranged that the `+bar` suffixes on the end of `-mcpu` and `-march` cause feature names to be put into a separate vector which is concatenated after the output of `getFPUFeatures`. Another side effect of all this is to fix a bug where `clang -target armv8-eabi` by itself would fail to set `__ARM_FEATURE_FMA`, even though `armv8` (aka Arm v8-A) implies FP-Armv8 which has FMA. That was because `HW_FP` was being set to a value including only the `FPARMV8` bit, but that feature test macro was testing only the `VFP4FPU` bit. Now `HW_FP` ends up with all the bits set, so it gives the right answer. Changes to tests included in this patch: * `arm-target-features.c`: I had to change basically all the expected results. (The Cortex-M4 test in there should function as a regression test for the accidental double-precision bug.) * `arm-mfpu.c`, `armv8.1m.main.c`: switched to using `CHECK-DAG` everywhere so that those tests are no longer sensitive to the order of cc1 feature options on the command line. * `arm-acle-6.5.c`: been updated to expect the right answer to that FMA test. * `Preprocessor/arm-target-features.c`: added a regression test for the `mfpu=softvfp` issue. Reviewers: SjoerdMeijer, dmgreen, ostannard, samparker, JamesNagurne Reviewed By: ostannard Subscribers: srhines, javed.absar, kristof.beyls, hiraditya, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D62998 llvm-svn: 362791
* [X86][test] Add test cases using immediates to builtins-x86.cRussell Gallop2019-06-071-0/+24
| | | | | | | | | These builtins should work with immediate or variable shift operand for gcc compatibility. Differential Revision: https://reviews.llvm.org/D62850 llvm-svn: 362786
* [X86] Add ENQCMD instructionsPengfei Wang2019-06-061-0/+20
| | | | | | | | | | | | For more details about these instructions, please refer to the latest ISE document: https://software.intel.com/en-us/download/intel-architecture-instruction-set-extensions-programming-reference. Patch by Tianqing Wang (tianqing) Differential Revision: https://reviews.llvm.org/D62282 llvm-svn: 362685
* LLVM IR: Generate new-style byval-with-Type from ClangTim Northover2019-06-0528-193/+193
| | | | | | | | | | | LLVM IR recently added a Type parameter to the byval Attribute, so that when pointers become opaque and no longer have an element type the information will still be present in IR. For now the Type parameter is optional (which is why Clang didn't need this change at the time), but it will become mandatory soon. llvm-svn: 362652
* [Clang] Disable new PM for tests that use optimization level -O1, -O2 and -O3Petr Hosek2019-06-058-28/+28
| | | | | | | | | | Tests that use -O1, -O2 and -O3 would often produce different results with the new pass manager which makes these tests fail. Disable new PM explicitly for these tests. Differential Revision: https://reviews.llvm.org/D58375 llvm-svn: 362580
* Remove test/CodeGen/builtin-stackaddress.c as it duplicatesEric Christopher2019-06-031-9/+0
| | | | | | | | test/CodeGen/2004-02-13-BuiltinFrameReturnAddress.c. Differential Revision: https://reviews.llvm.org/D62133 llvm-svn: 362462
* Re-check in clang support gun asm goto after fixing tests.Jennifer Yu2019-06-033-5/+37
| | | | llvm-svn: 362410
* [OpenCL] Use long instead of long long in x86 builtinsAndrew Savonichev2019-06-031-11/+47
| | | | | | | | | | | | | | | | | | | | | | Summary: According to C99 standard long long is at least 64 bits in size. However, OpenCL C defines long long as 128 bit signed integer. This prevents one to use x86 builtins when compiling OpenCL C code for x86 targets. The patch changes long long to long for OpenCL only. Patch by: Alexander Batashev <alexander.batashev@intel.com> Reviewers: craig.topper, Ka-Ka, eandrews, erichkeane, Anastasia Reviewed By: Ka-Ka, erichkeane, Anastasia Subscribers: a.elovikov, yaxunl, Anastasia, cfe-commits, ivankara, etyurin, asavonic Tags: #clang Differential Revision: https://reviews.llvm.org/D62580 llvm-svn: 362391
* [ARM] Fix recent breakage of -mfpu=none.Simon Tatham2019-06-031-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The recent change D60691 introduced a bug in clang when handling option combinations such as `-mcpu=cortex-m4 -mfpu=none`. Those options together should select Cortex-M4 but disable all use of hardware FP, but in fact, now hardware FP instructions can still be generated in that mode. The reason is because the handling of FPUVersion::NONE disables all the same feature names it used to, of which the base one is `vfp2`. But now there are further features below that, like `vfp2d16fp` and (following D60694) `fpregs`, which also need to be turned off to disable hardware FP completely. Added a tiny test which double-checks that compiling a simple FP function doesn't access the FP registers. Reviewers: SjoerdMeijer, dmgreen Reviewed By: dmgreen Subscribers: lebedev.ri, javed.absar, kristof.beyls, hiraditya, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D62729 llvm-svn: 362380
* [X86] Add VP2INTERSECT instructionsPengfei Wang2019-05-313-2/+58
| | | | | | | | | | Support intel AVX512 VP2INTERSECT instructions in clang Patch by Xiang Zhang (xiangzhangllvm) Differential Revision: https://reviews.llvm.org/D62367 llvm-svn: 362196
* re-commit r361928: [PowerPC] [Clang] Port SSE intrinsics to PowerPCZi Xuan Wu2019-05-314-4/+2239
| | | | | | | | | | | | | | | Port xmmintrin.h which include Intel SSE intrinsics implementation to PowerPC platform (using Altivec). The new headers containing those implemenations are located into a directory named ppc_wrappers which has higher priority when the platform is PowerPC on Linux. They are mainly developed by Steven Munroe, with contributions from Paul Clarke, Bill Schmidt, Jinsong Ji and Zixuan Wu. Patched by: Qiu Chaofan <qiucf@cn.ibm.com> Reviewed By: Jinsong Ji Differential Revision: https://reviews.llvm.org/D62121 llvm-svn: 362190
* Revert "[X86] Fix i386 struct and union parameter alignment"Pengfei Wang2019-05-312-37/+12
| | | | | | | | | | This reverts commit d61cb749f4ac2c90244906d756e80a5c4a7ffa89 (SVN: 361934). According to James suggestion, revert this change. Please ref: https://reviews.llvm.org/D60748 llvm-svn: 362186
* Reapply: LLVM IR: update Clang tests for byval being a typed attribute.Tim Northover2019-05-301-2/+2
| | | | | | | | | | Since byval is now a typed attribute it gets sorted slightly differently by LLVM when the order of attributes is being canonicalized. This updates the few Clang tests that depend on the old order. Clang patch is unchanged. llvm-svn: 362129
* Revert "clang support gnu asm goto."Erich Keane2019-05-303-36/+5
| | | | | | | | | | | This reverts commit 954ec09aed4f2be04bb5f4e10dbb4ea8bd19ef9a. Reverting due to test failures as requested by Jennifer Yu. Conflicts: clang/test/CodeGen/asm-goto.c llvm-svn: 362106
* Mark CodeGen/asm-goto.c as x86 specific after r362045Fangrui Song2019-05-301-1/+2
| | | | llvm-svn: 362059
* clang support gnu asm goto.Jennifer Yu2019-05-303-5/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Syntax: asm [volatile] goto ( AssemblerTemplate : : InputOperands : Clobbers : GotoLabels) https://gcc.gnu.org/onlinedocs/gcc/Extended-Asm.html New llvm IR is "callbr" for inline asm goto instead "call" for inline asm For: asm goto("testl %0, %0; jne %l1;" :: "r"(cond)::label_true, loop); IR: callbr void asm sideeffect "testl $0, $0; jne ${1:l};", "r,X,X,~{dirflag},~{fpsr},~{flags}"(i32 %0, i8* blockaddress(@foo, %label_true), i8* blockaddress(@foo, %loop)) #1 to label %asm.fallthrough [label %label_true, label %loop], !srcloc !3 asm.fallthrough: Compiler need to generate: 1> a dummy constarint 'X' for each label. 2> an unique fallthrough label for each asm goto stmt " asm.fallthrough%number". Diagnostic 1> duplicate asm operand name are used in output, input and label. 2> goto out of scope. llvm-svn: 362045
* Revert "LLVM IR: update Clang tests for byval being a typed attribute."Tim Northover2019-05-291-2/+2
| | | | | | The underlying LLVM change couldn't cope with llvm-link and broke LTO builds. llvm-svn: 362028
* LLVM IR: update Clang tests for byval being a typed attribute.Tim Northover2019-05-291-2/+2
| | | | | | | | Since byval is now a typed attribute it gets sorted slightly differently by LLVM when the order of attributes is being canonicalized. This updates the few Clang tests that depend on the old order. llvm-svn: 362013
* [mips] Check argument for __builtin_msa_ctcmsa / __builtin_msa_cfcmsaSimon Atanasyan2019-05-291-0/+4
| | | | | | | | | | | | | The `__builtin_msa_ctcmsa` and `__builtin_msa_cfcmsa` builtins are mapped to the `ctcmsa` and `cfcmsa` instructions respectively. While MSA control registers have indexes in 0..7 range, the instructions accept register index in 0..31 range [1]. [1] MIPS Architecture for Programmers Volume IV-j: The MIPS64 SIMD Architecture Module https://www.mips.com/?do-download=the-mips64-simd-architecture-module llvm-svn: 361967
* [X86] Fix i386 struct and union parameter alignmentPengfei Wang2019-05-292-12/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to i386 System V ABI 2.1: Structures and unions assume the alignment of their most strictly aligned component. But current implementation always takes them as 4-byte aligned which will result in incorrect code, e.g: 1 #include <immintrin.h> 2 typedef union { 3 int d[4]; 4 __m128 m; 5 } M128; 6 extern void foo(int, ...); 7 void test(void) 8 { 9 M128 a; 10 foo(1, a); 11 foo(1, a.m); 12 } The first call (line 10) takes the second arg as 4-byte aligned while the second call (line 11) takes the second arg as 16-byte aligned. There is oxymoron for the alignment of the 2 calls because they should be the same. This patch fixes the bug by following i386 System V ABI and apply it to Linux only since other System V OS (e.g Darwin, PS4 and FreeBSD) don't want to spend any effort dealing with the ramifications of ABI breaks at present. Patch by Wei Xiao (wxiao3) Differential Revision: https://reviews.llvm.org/D60748 llvm-svn: 361934
* revert rC361928: [PowerPC] [Clang] Port SSE intrinsics to PowerPCZi Xuan Wu2019-05-293-2162/+0
| | | | | | Because test fails in other targets rather than PowerPC llvm-svn: 361930
* [PowerPC] [Clang] Port SSE intrinsics to PowerPCZi Xuan Wu2019-05-293-0/+2162
| | | | | | | | | | | | | | | Port xmmintrin.h which include Intel SSE intrinsics implementation to PowerPC platform (using Altivec). The new headers containing those implemenations are located into a directory named ppc_wrappers which has higher priority when the platform is PowerPC on Linux. They are mainly developed by Steven Munroe, with contributions from Paul Clarke, Bill Schmidt, Jinsong Ji and Zixuan Wu. Patched by: Qiu Chaofan <qiucf@cn.ibm.com> Reviewed By: Jinsong Ji Differential Revision: https://reviews.llvm.org/D62121 llvm-svn: 361928
* [clang] Handle lrint/llrint builtinsAdhemerval Zanella2019-05-283-12/+21
| | | | | | | | | | | | As for other floating-point rounding builtins that can be optimized when build with -fno-math-errno, this patch adds support for lrint and llrint. It currently only optimize for AArch64 backend. Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D62019 llvm-svn: 361878
* [ARM] Replace fp-only-sp and d16 with fp64 and d32.Simon Tatham2019-05-281-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Those two subtarget features were awkward because their semantics are reversed: each one indicates the _lack_ of support for something in the architecture, rather than the presence. As a consequence, you don't get the behavior you want if you combine two sets of feature bits. Each SubtargetFeature for an FP architecture version now comes in four versions, one for each combination of those options. So you can still say (for example) '+vfp2' in a feature string and it will mean what it's always meant, but there's a new string '+vfp2d16sp' meaning the version without those extra options. A lot of this change is just mechanically replacing positive checks for the old features with negative checks for the new ones. But one more interesting change is that I've rearranged getFPUFeatures() so that the main FPU feature is appended to the output list *before* rather than after the features derived from the Restriction field, so that -fp64 and -d32 can override defaults added by the main feature. Reviewers: dmgreen, samparker, SjoerdMeijer Subscribers: srhines, javed.absar, eraman, kristof.beyls, hiraditya, zzheng, Petar.Avramovic, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D60691 llvm-svn: 361845
* Mark tests as x86.Alina Sbirlea2019-05-242-0/+2
| | | | llvm-svn: 361674
* [NewPassManager] Add tuning option: LoopUnrolling [clang-change]Alina Sbirlea2019-05-241-0/+55
| | | | | | | | | | | | | | | | Summary: Use CodeGenOpts's setting for loop unrolling. [to be coupled with D61618] Reviewers: chandlerc Subscribers: jlebar, dmgreen, cfe-commits, llvm-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D61620 llvm-svn: 361653
* Use clang_cc1 instead of clang in CodeGen test.Alina Sbirlea2019-05-231-4/+4
| | | | llvm-svn: 361562
* Update breaking test.Alina Sbirlea2019-05-231-1/+1
| | | | llvm-svn: 361542
* [NewPassManager] Add tuning option: SLPVectorization [clang-change]Alina Sbirlea2019-05-231-0/+25
| | | | | | | | | | | | | | | | Summary: NewPassManager is not using CodeGenOpts values before this patch. [to be coupled with D61616] Reviewers: chandlerc Subscribers: jlebar, cfe-commits, llvm-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D61617 llvm-svn: 361534
* [ARM][AArch64] Fix incorrect handling of alignment in va_arg code generationJohn Brawn2019-05-222-0/+969
| | | | | | | | | | | | | Overaligned and underaligned types (i.e. types where the alignment has been increased or decreased using the aligned and packed attributes) weren't being correctly handled in all cases, as the unadjusted alignment should be used. This patch also adjusts getTypeUnadjustedAlign to correctly handle typedefs of non-aggregate types, which it appears it never had to handle before. Differential Revision: https://reviews.llvm.org/D62152 llvm-svn: 361372
* [DebugInfo] Don't emit checksums when compiling a preprocessed CPPAlexandre Ganea2019-05-213-0/+31
| | | | | | | | Fixes PR41215 Differential Revision: https://reviews.llvm.org/D60283 llvm-svn: 361296
* [X86] Check the alignment argument for the masked.load/store for the ↵Craig Topper2019-05-201-6/+6
| | | | | | _mm_mask_store_ss/sd and _mm_mask(z)_load_ss/sd intrinsics. llvm-svn: 361187
* [Intrinsics] Merge lround.i32 and lround.i64 into a single intrinsic with ↵Craig Topper2019-05-202-6/+6
| | | | | | | | | | overloaded result type. Make result type for llvm.llround overloaded instead of fixing to i64 We shouldn't really make assumptions about possible sizes for long and long long. And longer term we should probably support vectorizing these intrinsics. By making the result types not fixed we can support vectors as well. Differential Revision: https://reviews.llvm.org/D62026 llvm-svn: 361169
* [ELF] Implement Dependent Libraries FeatureBen Dunbobbin2019-05-173-21/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch implements a limited form of autolinking primarily designed to allow either the --dependent-library compiler option, or "comment lib" pragmas ( https://docs.microsoft.com/en-us/cpp/preprocessor/comment-c-cpp?view=vs-2017) in C/C++ e.g. #pragma comment(lib, "foo"), to cause an ELF linker to automatically add the specified library to the link when processing the input file generated by the compiler. Currently this extension is unique to LLVM and LLD. However, care has been taken to design this feature so that it could be supported by other ELF linkers. The design goals were to provide: - A simple linking model for developers to reason about. - The ability to to override autolinking from the linker command line. - Source code compatibility, where possible, with "comment lib" pragmas in other environments (MSVC in particular). Dependent library support is implemented differently for ELF platforms than on the other platforms. Primarily this difference is that on ELF we pass the dependent library specifiers directly to the linker without manipulating them. This is in contrast to other platforms where they are mapped to a specific linker option by the compiler. This difference is a result of the greater variety of ELF linkers and the fact that ELF linkers tend to handle libraries in a more complicated fashion than on other platforms. This forces us to defer handling the specifiers to the linker. In order to achieve a level of source code compatibility with other platforms we have restricted this feature to work with libraries that meet the following "reasonable" requirements: 1. There are no competing defined symbols in a given set of libraries, or if they exist, the program owner doesn't care which is linked to their program. 2. There may be circular dependencies between libraries. The binary representation is a mergeable string section (SHF_MERGE, SHF_STRINGS), called .deplibs, with custom type SHT_LLVM_DEPENDENT_LIBRARIES (0x6fff4c04). The compiler forms this section by concatenating the arguments of the "comment lib" pragmas and --dependent-library options in the order they are encountered. Partial (-r, -Ur) links are handled by concatenating .deplibs sections with the normal mergeable string section rules. As an example, #pragma comment(lib, "foo") would result in: .section ".deplibs","MS",@llvm_dependent_libraries,1 .asciz "foo" For LTO, equivalent information to the contents of a the .deplibs section can be retrieved by the LLD for bitcode input files. LLD processes the dependent library specifiers in the following way: 1. Dependent libraries which are found from the specifiers in .deplibs sections of relocatable object files are added when the linker decides to include that file (which could itself be in a library) in the link. Dependent libraries behave as if they were appended to the command line after all other options. As a consequence the set of dependent libraries are searched last to resolve symbols. 2. It is an error if a file cannot be found for a given specifier. 3. Any command line options in effect at the end of the command line parsing apply to the dependent libraries, e.g. --whole-archive. 4. The linker tries to add a library or relocatable object file from each of the strings in a .deplibs section by; first, handling the string as if it was specified on the command line; second, by looking for the string in each of the library search paths in turn; third, by looking for a lib<string>.a or lib<string>.so (depending on the current mode of the linker) in each of the library search paths. 5. A new command line option --no-dependent-libraries tells LLD to ignore the dependent libraries. Rationale for the above points: 1. Adding the dependent libraries last makes the process simple to understand from a developers perspective. All linkers are able to implement this scheme. 2. Error-ing for libraries that are not found seems like better behavior than failing the link during symbol resolution. 3. It seems useful for the user to be able to apply command line options which will affect all of the dependent libraries. There is a potential problem of surprise for developers, who might not realize that these options would apply to these "invisible" input files; however, despite the potential for surprise, this is easy for developers to reason about and gives developers the control that they may require. 4. This algorithm takes into account all of the different ways that ELF linkers find input files. The different search methods are tried by the linker in most obvious to least obvious order. 5. I considered adding finer grained control over which dependent libraries were ignored (e.g. MSVC has /nodefaultlib:<library>); however, I concluded that this is not necessary: if finer control is required developers can fall back to using the command line directly. RFC thread: http://lists.llvm.org/pipermail/llvm-dev/2019-March/131004.html. Differential Revision: https://reviews.llvm.org/D60274 llvm-svn: 360984
* [clang] Handle lround/llround builtinsAdhemerval Zanella2019-05-163-12/+22
| | | | | | | | | | | | As for other floating-point rounding builtins that can be optimized when build with -fno-math-errno, this patch adds support for lround and llround. It currently only optimize for AArch64 backend. Reviewed By: efriedma Differential Revision: https://reviews.llvm.org/D61392 llvm-svn: 360896
* [builtin] Fixed definitions of builtins that rely on the int/long long type ↵Karl-Johan Karlsson2019-05-162-0/+154
| | | | | | | | | | | | | | | | | | | | | | is 32/64 bits Summary: The definition of the builtins __builtin_bswap32, __builtin_bitreverse32, __builtin_rotateleft32 and __builtin_rotateright32 rely on that the int type is 32 bits wide on the target. The defintions of the builtins __builtin_bswap64, __builtin_bitreverse64, __builtin_rotateleft64, and __builtin_rotateright64 rely on that the long long type is 64 bits wide. On targets where this is not the case (e.g. AVR) clang will generate faulty code (wrong llvm assembler intrinsics). This patch add support for using 'Z' (the int32_t type) in Bultins.def. The builtins above are changed to be based on the int32_t type instead of the int type, and the int64_t type instead of the long long type. The AVR backend (experimental) have a native int type that is only 16 bits wide. The supplied testcase will therefore fail if running the testcase on trunk as clang will convert e.g. __builtin_bitreverse32 into llvm.bitreverse.i16 on AVR. Reviewers: dylanmckay, spatel, rsmith, efriedma Reviewed By: efriedma Differential Revision: https://reviews.llvm.org/D61845 llvm-svn: 360863
* Fix bots by adding target triple to test.Leonard Chan2019-05-141-12/+12
| | | | llvm-svn: 360720
* [NewPM] Port HWASan and Kernel HWASanLeonard Chan2019-05-141-0/+34
| | | | | | | | | | | | | | | Port hardware assisted address sanitizer to new PM following the same guidelines as msan and tsan. Changes: - Separate HWAddressSanitizer into a pass class and a sanitizer class. - Create new PM wrapper pass for the sanitizer class. - Use the getOrINsert pattern for some module level initialization declarations. - Also enable kernel-kwasan in new PM - Update llvm tests and add clang test. Differential Revision: https://reviews.llvm.org/D61709 llvm-svn: 360707
* Revert r360637 "PR41817: Fix regression in r359260 that caused the MS ↵Hans Wennborg2019-05-141-11/+0
| | | | | | | | | | | | compatibility" > extension allowing a "static" declaration to follow an "extern" > declaration to stop working. It introduced asserts for some "static-following-extern" cases, breaking the Chromium build. See the cfe-commits thread for reproducer. llvm-svn: 360657
* PR41817: Fix regression in r359260 that caused the MS compatibilityRichard Smith2019-05-141-0/+11
| | | | | | | extension allowing a "static" declaration to follow an "extern" declaration to stop working. llvm-svn: 360637
* [ThinLTO] Clang test changes for new CanAutoHide flagTeresa Johnson2019-05-102-2/+2
| | | | llvm-svn: 360468
* [COFF] Use COFF stubs for extern_weak functionsReid Kleckner2019-05-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | Summary: A COFF stub indirects the reference to a symbol through memory. A .refptr.$sym global variable pointer is created to refer to $sym. Typically mingw uses these for external global variable declarations, but we can use them for weak function declarations as well. Updates the dso_local classification to add a special case for extern_weak symbols on COFF in both clang and LLVM. Fixes PR37598 Reviewers: smeenai, mstorsjo Subscribers: hiraditya, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D61615 llvm-svn: 360207
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