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* Finish "Adapt -fsanitize=function to SANITIZER_NON_UNIQUE_TYPEINFO"Stephan Bergmann2019-07-161-0/+22
| | | | | | | | | | | | | | | | | | | | | i.e., recent 5745eccef54ddd3caca278d1d292a88b2281528b: * Bump the function_type_mismatch handler version, as its signature has changed. * The function_type_mismatch handler can return successfully now, so SanitizerKind::Function must be AlwaysRecoverable (like for SanitizerKind::Vptr). * But the minimal runtime would still unconditionally treat a call to the function_type_mismatch handler as failure, so disallow -fsanitize=function in combination with -fsanitize-minimal-runtime (like it was already done for -fsanitize=vptr). * Add tests. Differential Revision: https://reviews.llvm.org/D61479 llvm-svn: 366186
* Temporarily Revert "fix unnamed fiefield issue and add tests for ↵Eric Christopher2019-07-151-177/+0
| | | | | | | | | | __builtin_preserve_access_index intrinsic" The commit had tests that would only work with names in the IR. This reverts commit r366076. llvm-svn: 366155
* Revert "[NewPM] Port Sancov"Leonard Chan2019-07-151-41/+0
| | | | | | This reverts commit 5652f35817f07b16f8b3856d594cc42f4d7ee29c. llvm-svn: 366153
* ARM MTE stack sanitizer.Evgeniy Stepanov2019-07-151-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | Add "memtag" sanitizer that detects and mitigates stack memory issues using armv8.5 Memory Tagging Extension. It is similar in principle to HWASan, which is a software implementation of the same idea, but there are enough differencies to warrant a new sanitizer type IMHO. It is also expected to have very different performance properties. The new sanitizer does not have a runtime library (it may grow one later, along with a "debugging" mode). Similar to SafeStack and StackProtector, the instrumentation pass (in a follow up change) will be inserted in all cases, but will only affect functions marked with the new sanitize_memtag attribute. Reviewers: pcc, hctim, vitalybuka, ostannard Subscribers: srhines, mehdi_amini, javed.absar, kristof.beyls, hiraditya, cryptoad, steven_wu, dexonsmith, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D64169 llvm-svn: 366123
* fix unnamed fiefield issue and add tests for __builtin_preserve_access_index ↵Yonghong Song2019-07-151-0/+177
| | | | | | | | | | | | | | | | | | | | intrinsic This is a followup patch for https://reviews.llvm.org/D61809. Handle unnamed bitfield properly and add more test cases. Fixed the unnamed bitfield issue. The unnamed bitfield is ignored by debug info, so we need to ignore such a struct/union member when we try to get the member index in the debug info. D61809 contains two test cases but not enough as it does not checking generated IRs in the fine grain level, and also it does not have semantics checking tests. This patch added unit tests for both code gen and semantics checking for the new intrinsic. Signed-off-by: Yonghong Song <yhs@fb.com> llvm-svn: 366076
* [PowerPC] Support -mabi=ieeelongdouble and -mabi=ibmlongdoubleFangrui Song2019-07-151-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gcc PowerPC supports 3 representations of long double: * -mlong-double-64 long double has the same representation of double but is mangled as `e`. In clang, this is the default on AIX, FreeBSD and Linux musl. * -mlong-double-128 2 possible 128-bit floating point representations: + -mabi=ibmlongdouble IBM extended double format. Mangled as `g` In clang, this is the default on Linux glibc. + -mabi=ieeelongdouble IEEE 754 quadruple-precision format. Mangled as `u9__ieee128` (`U10__float128` before gcc 8.2) This is currently unavailable. This patch adds -mabi=ibmlongdouble and -mabi=ieeelongdouble, and thus makes the IEEE 754 quadruple-precision long double available for languages supported by clang. Reviewed By: hfinkel Differential Revision: https://reviews.llvm.org/D64283 llvm-svn: 366044
* [clang][Driver][ARM] Favor -mfpu over default CPU featuresAlexandros Lamprineas2019-07-141-1/+1
| | | | | | | | | | | | | | | | When processing the command line options march, mcpu and mfpu, we store the implied target features on a vector. The change D62998 introduced a temporary vector, where the processed features get accumulated. When calling DecodeARMFeaturesFromCPU, which sets the default features for the specified CPU, we certainly don't want to override the features that have been explicitly specified on the command line. Therefore, the default features should appear first in the final vector. This problem became evident once I added the missing (unhandled) target features in ARM::getExtensionFeatures. Differential Revision: https://reviews.llvm.org/D63936 llvm-svn: 366027
* [SystemZ] Add support for new cpu architecture - arch13Ulrich Weigand2019-07-129-0/+749
| | | | | | | | | | | | | | | | | This patch series adds support for the next-generation arch13 CPU architecture to the SystemZ backend. This includes: - Basic support for the new processor and its features. - Support for low-level builtins mapped to new LLVM intrinsics. - New high-level intrinsics in vecintrin.h. - Indicate support by defining __VEC__ == 10303. Note: No currently available Z system supports the arch13 architecture. Once new systems become available, the official system name will be added as supported -march name. llvm-svn: 365933
* [X86][PowerPC] Support -mlong-double-128Fangrui Song2019-07-122-0/+16
| | | | | | | | | | | | | | | This patch makes the driver option -mlong-double-128 available for X86 and PowerPC. The CC1 option -mlong-double-128 is available on all targets for users to test on unsupported targets. On PowerPC, -mlong-double-128 uses the IBM extended double format because we don't support -mabi=ieeelongdouble yet (D64283). Reviewed By: rnk Differential Revision: https://reviews.llvm.org/D64277 llvm-svn: 365866
* [NewPM] Port SancovLeonard Chan2019-07-111-0/+41
| | | | | | | | | | | | | | | | | This patch contains a port of SanitizerCoverage to the new pass manager. This one's a bit hefty. Changes: - Split SanitizerCoverageModule into 2 SanitizerCoverage for passing over functions and ModuleSanitizerCoverage for passing over modules. - ModuleSanitizerCoverage exists for adding 2 module level calls to initialization functions but only if there's a function that was instrumented by sancov. - Added legacy and new PM wrapper classes that own instances of the 2 new classes. - Update llvm tests and add clang tests. Differential Revision: https://reviews.llvm.org/D62888 llvm-svn: 365838
* [CodeGen] NVPTX: Switch from atomic.load.add.f32 to atomicrmw faddBenjamin Kramer2019-07-112-2/+2
| | | | llvm-svn: 365798
* [CGDebugInfo] Fix -femit-debug-entry-values crash on os_log_helpersVedant Kumar2019-07-111-2/+11
| | | | | | | | | | | | An os_log_helper FunctionDecl may not have a body. Ignore these for the purposes of debug entry value emission. Fixes an assertion failure seen in a stage2 build of clang: Assertion failed: (FD->hasBody() && "Functions must have body here"), function analyzeParametersModification llvm-svn: 365716
* GodeGen, NFC: Add test to track emitStoresForConstant behaviorVitaly Buka2019-07-101-0/+66
| | | | | | | | | | | | | | Reviewers: eugenis, pcc Reviewed By: eugenis Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D64385 llvm-svn: 365706
* [X86] Change the IR sequence for _mm_storeh_pi and _mm_storel_pi to perform ↵Craig Topper2019-07-102-8/+4
| | | | | | | | the store as a <2 x float> instead of i64. This is similar to what we do for loadl_pi and loadh_pi. llvm-svn: 365669
* [X86] Add guards to some of the x86 intrinsic tests to skip 64-bit mode only ↵Craig Topper2019-07-1010-0/+58
| | | | | | | | | | intrinsics when compiled for 32-bit mode. All the command lines are for 64-bit mode, but sometimes I compile the tests in 32-bit mode to see what assembly we get and we need to skip these to do that. llvm-svn: 365668
* [AArch64] Fix vector vuqadd intrinsics operandsDiogo N. Sampaio2019-07-101-0/+51
| | | | | | | | | | | | | | | | | | Summary: Change the vuqadd vector instrinsics to have the second argument as unsigned values, not signed, accordingly to https://developer.arm.com/architectures/instruction-sets/simd-isas/neon/intrinsics Reviewers: LukeCheeseman, ostannard Reviewed By: ostannard Subscribers: javed.absar, kristof.beyls, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D64211 llvm-svn: 365609
* [NFC][AArch64] Fix vector vqtb[lx][1-4]_s8 operandDiogo N. Sampaio2019-07-101-9/+9
| | | | | | | | | | | | | | | | | | Summary: Change the vqtb[lx][1-4]_s8 instrinsics to have the last argument as vector of unsigned valuse, not signed, accordingly to https://developer.arm.com/architectures/instruction-sets/simd-isas/neon/intrinsics Reviewers: LukeCheeseman, DavidSpickett Reviewed By: DavidSpickett Subscribers: DavidSpickett, javed.absar, kristof.beyls, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D64243 llvm-svn: 365598
* [MS] Treat ignored explicit calling conventions as an explicit __cdeclReid Kleckner2019-07-091-0/+45
| | | | | | | | | | | | | | | The CCCR_Ignore action is only used for Microsoft calling conventions, mainly because MSVC does not warn when a calling convention would be ignored by the current target. This behavior is actually somewhat important, since windows.h uses WINAPI (which expands to __stdcall) widely. This distinction didn't matter much before the introduction of __vectorcall to x64 and the ability to make that the default calling convention with /Gv. Now, we can't just ignore __stdcall for x64, we have to treat it as an explicit __cdecl annotation. Fixes PR42531 llvm-svn: 365579
* Ignore trailing NullStmts in StmtExprs for GCC compatibility.Aaron Ballman2019-07-091-0/+10
| | | | | | | | Ignore trailing NullStmts in compound expressions when determining the result type and value. This is to match the GCC behavior which ignores semicolons at the end of compound expressions. Patch by Dominic Ferreira. llvm-svn: 365498
* [BPF] Preserve debuginfo array/union/struct type/access indexYonghong Song2019-07-092-0/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For background of BPF CO-RE project, please refer to http://vger.kernel.org/bpfconf2019.html In summary, BPF CO-RE intends to compile bpf programs adjustable on struct/union layout change so the same program can run on multiple kernels with adjustment before loading based on native kernel structures. In order to do this, we need keep track of GEP(getelementptr) instruction base and result debuginfo types, so we can adjust on the host based on kernel BTF info. Capturing such information as an IR optimization is hard as various optimization may have tweaked GEP and also union is replaced by structure it is impossible to track fieldindex for union member accesses. Three intrinsic functions, preserve_{array,union,struct}_access_index, are introducted. addr = preserve_array_access_index(base, index, dimension) addr = preserve_union_access_index(base, di_index) addr = preserve_struct_access_index(base, gep_index, di_index) here, base: the base pointer for the array/union/struct access. index: the last access index for array, the same for IR/DebugInfo layout. dimension: the array dimension. gep_index: the access index based on IR layout. di_index: the access index based on user/debuginfo types. If using these intrinsics blindly, i.e., transforming all GEPs to these intrinsics and later on reducing them to GEPs, we have seen up to 7% more instructions generated. To avoid such an overhead, a clang builtin is proposed: base = __builtin_preserve_access_index(base) such that user wraps to-be-relocated GEPs in this builtin and preserve_*_access_index intrinsics only apply to those GEPs. Such a buyin will prevent performance degradation if people do not use CO-RE, even for programs which use bpf_probe_read(). For example, for the following example, $ cat test.c struct sk_buff { int i; int b1:1; int b2:2; union { struct { int o1; int o2; } o; struct { char flags; char dev_id; } dev; int netid; } u[10]; }; static int (*bpf_probe_read)(void *dst, int size, const void *unsafe_ptr) = (void *) 4; #define _(x) (__builtin_preserve_access_index(x)) int bpf_prog(struct sk_buff *ctx) { char dev_id; bpf_probe_read(&dev_id, sizeof(char), _(&ctx->u[5].dev.dev_id)); return dev_id; } $ clang -target bpf -O2 -g -emit-llvm -S -mllvm -print-before-all \ test.c >& log The generated IR looks like below: ... define dso_local i32 @bpf_prog(%struct.sk_buff*) #0 !dbg !15 { %2 = alloca %struct.sk_buff*, align 8 %3 = alloca i8, align 1 store %struct.sk_buff* %0, %struct.sk_buff** %2, align 8, !tbaa !45 call void @llvm.dbg.declare(metadata %struct.sk_buff** %2, metadata !43, metadata !DIExpression()), !dbg !49 call void @llvm.lifetime.start.p0i8(i64 1, i8* %3) #4, !dbg !50 call void @llvm.dbg.declare(metadata i8* %3, metadata !44, metadata !DIExpression()), !dbg !51 %4 = load i32 (i8*, i32, i8*)*, i32 (i8*, i32, i8*)** @bpf_probe_read, align 8, !dbg !52, !tbaa !45 %5 = load %struct.sk_buff*, %struct.sk_buff** %2, align 8, !dbg !53, !tbaa !45 %6 = call [10 x %union.anon]* @llvm.preserve.struct.access.index.p0a10s_union.anons.p0s_struct.sk_buffs( %struct.sk_buff* %5, i32 2, i32 3), !dbg !53, !llvm.preserve.access.index !19 %7 = call %union.anon* @llvm.preserve.array.access.index.p0s_union.anons.p0a10s_union.anons( [10 x %union.anon]* %6, i32 1, i32 5), !dbg !53 %8 = call %union.anon* @llvm.preserve.union.access.index.p0s_union.anons.p0s_union.anons( %union.anon* %7, i32 1), !dbg !53, !llvm.preserve.access.index !26 %9 = bitcast %union.anon* %8 to %struct.anon.0*, !dbg !53 %10 = call i8* @llvm.preserve.struct.access.index.p0i8.p0s_struct.anon.0s( %struct.anon.0* %9, i32 1, i32 1), !dbg !53, !llvm.preserve.access.index !34 %11 = call i32 %4(i8* %3, i32 1, i8* %10), !dbg !52 %12 = load i8, i8* %3, align 1, !dbg !54, !tbaa !55 %13 = sext i8 %12 to i32, !dbg !54 call void @llvm.lifetime.end.p0i8(i64 1, i8* %3) #4, !dbg !56 ret i32 %13, !dbg !57 } !19 = distinct !DICompositeType(tag: DW_TAG_structure_type, name: "sk_buff", file: !3, line: 1, size: 704, elements: !20) !26 = distinct !DICompositeType(tag: DW_TAG_union_type, scope: !19, file: !3, line: 5, size: 64, elements: !27) !34 = distinct !DICompositeType(tag: DW_TAG_structure_type, scope: !26, file: !3, line: 10, size: 16, elements: !35) Note that @llvm.preserve.{struct,union}.access.index calls have metadata llvm.preserve.access.index attached to instructions to provide struct/union debuginfo type information. For &ctx->u[5].dev.dev_id, . The "%6 = ..." represents struct member "u" with index 2 for IR layout and index 3 for DI layout. . The "%7 = ..." represents array subscript "5". . The "%8 = ..." represents union member "dev" with index 1 for DI layout. . The "%10 = ..." represents struct member "dev_id" with index 1 for both IR and DI layout. Basically, traversing the use-def chain recursively for the 3rd argument of bpf_probe_read() and examining all preserve_*_access_index calls, the debuginfo struct/union/array access index can be achieved. The intrinsics also contain enough information to regenerate codes for IR layout. For array and structure intrinsics, the proper GEP can be constructed. For union intrinsics, replacing all uses of "addr" with "base" should be enough. Signed-off-by: Yonghong Song <yhs@fb.com> Differential Revision: https://reviews.llvm.org/D61809 llvm-svn: 365438
* Revert "[BPF] Preserve debuginfo array/union/struct type/access index"Yonghong Song2019-07-092-44/+0
| | | | | | | | | This reverts commit r365435. Forgot adding the Differential Revision link. Will add to the commit message and resubmit. llvm-svn: 365436
* [BPF] Preserve debuginfo array/union/struct type/access indexYonghong Song2019-07-092-0/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For background of BPF CO-RE project, please refer to http://vger.kernel.org/bpfconf2019.html In summary, BPF CO-RE intends to compile bpf programs adjustable on struct/union layout change so the same program can run on multiple kernels with adjustment before loading based on native kernel structures. In order to do this, we need keep track of GEP(getelementptr) instruction base and result debuginfo types, so we can adjust on the host based on kernel BTF info. Capturing such information as an IR optimization is hard as various optimization may have tweaked GEP and also union is replaced by structure it is impossible to track fieldindex for union member accesses. Three intrinsic functions, preserve_{array,union,struct}_access_index, are introducted. addr = preserve_array_access_index(base, index, dimension) addr = preserve_union_access_index(base, di_index) addr = preserve_struct_access_index(base, gep_index, di_index) here, base: the base pointer for the array/union/struct access. index: the last access index for array, the same for IR/DebugInfo layout. dimension: the array dimension. gep_index: the access index based on IR layout. di_index: the access index based on user/debuginfo types. If using these intrinsics blindly, i.e., transforming all GEPs to these intrinsics and later on reducing them to GEPs, we have seen up to 7% more instructions generated. To avoid such an overhead, a clang builtin is proposed: base = __builtin_preserve_access_index(base) such that user wraps to-be-relocated GEPs in this builtin and preserve_*_access_index intrinsics only apply to those GEPs. Such a buyin will prevent performance degradation if people do not use CO-RE, even for programs which use bpf_probe_read(). For example, for the following example, $ cat test.c struct sk_buff { int i; int b1:1; int b2:2; union { struct { int o1; int o2; } o; struct { char flags; char dev_id; } dev; int netid; } u[10]; }; static int (*bpf_probe_read)(void *dst, int size, const void *unsafe_ptr) = (void *) 4; #define _(x) (__builtin_preserve_access_index(x)) int bpf_prog(struct sk_buff *ctx) { char dev_id; bpf_probe_read(&dev_id, sizeof(char), _(&ctx->u[5].dev.dev_id)); return dev_id; } $ clang -target bpf -O2 -g -emit-llvm -S -mllvm -print-before-all \ test.c >& log The generated IR looks like below: ... define dso_local i32 @bpf_prog(%struct.sk_buff*) #0 !dbg !15 { %2 = alloca %struct.sk_buff*, align 8 %3 = alloca i8, align 1 store %struct.sk_buff* %0, %struct.sk_buff** %2, align 8, !tbaa !45 call void @llvm.dbg.declare(metadata %struct.sk_buff** %2, metadata !43, metadata !DIExpression()), !dbg !49 call void @llvm.lifetime.start.p0i8(i64 1, i8* %3) #4, !dbg !50 call void @llvm.dbg.declare(metadata i8* %3, metadata !44, metadata !DIExpression()), !dbg !51 %4 = load i32 (i8*, i32, i8*)*, i32 (i8*, i32, i8*)** @bpf_probe_read, align 8, !dbg !52, !tbaa !45 %5 = load %struct.sk_buff*, %struct.sk_buff** %2, align 8, !dbg !53, !tbaa !45 %6 = call [10 x %union.anon]* @llvm.preserve.struct.access.index.p0a10s_union.anons.p0s_struct.sk_buffs( %struct.sk_buff* %5, i32 2, i32 3), !dbg !53, !llvm.preserve.access.index !19 %7 = call %union.anon* @llvm.preserve.array.access.index.p0s_union.anons.p0a10s_union.anons( [10 x %union.anon]* %6, i32 1, i32 5), !dbg !53 %8 = call %union.anon* @llvm.preserve.union.access.index.p0s_union.anons.p0s_union.anons( %union.anon* %7, i32 1), !dbg !53, !llvm.preserve.access.index !26 %9 = bitcast %union.anon* %8 to %struct.anon.0*, !dbg !53 %10 = call i8* @llvm.preserve.struct.access.index.p0i8.p0s_struct.anon.0s( %struct.anon.0* %9, i32 1, i32 1), !dbg !53, !llvm.preserve.access.index !34 %11 = call i32 %4(i8* %3, i32 1, i8* %10), !dbg !52 %12 = load i8, i8* %3, align 1, !dbg !54, !tbaa !55 %13 = sext i8 %12 to i32, !dbg !54 call void @llvm.lifetime.end.p0i8(i64 1, i8* %3) #4, !dbg !56 ret i32 %13, !dbg !57 } !19 = distinct !DICompositeType(tag: DW_TAG_structure_type, name: "sk_buff", file: !3, line: 1, size: 704, elements: !20) !26 = distinct !DICompositeType(tag: DW_TAG_union_type, scope: !19, file: !3, line: 5, size: 64, elements: !27) !34 = distinct !DICompositeType(tag: DW_TAG_structure_type, scope: !26, file: !3, line: 10, size: 16, elements: !35) Note that @llvm.preserve.{struct,union}.access.index calls have metadata llvm.preserve.access.index attached to instructions to provide struct/union debuginfo type information. For &ctx->u[5].dev.dev_id, . The "%6 = ..." represents struct member "u" with index 2 for IR layout and index 3 for DI layout. . The "%7 = ..." represents array subscript "5". . The "%8 = ..." represents union member "dev" with index 1 for DI layout. . The "%10 = ..." represents struct member "dev_id" with index 1 for both IR and DI layout. Basically, traversing the use-def chain recursively for the 3rd argument of bpf_probe_read() and examining all preserve_*_access_index calls, the debuginfo struct/union/array access index can be achieved. The intrinsics also contain enough information to regenerate codes for IR layout. For array and structure intrinsics, the proper GEP can be constructed. For union intrinsics, replacing all uses of "addr" with "base" should be enough. Signed-off-by: Yonghong Song <yhs@fb.com> llvm-svn: 365435
* [X86][PPC] Support -mlong-double-64Fangrui Song2019-07-094-20/+62
| | | | | | | | | | | | | | | | | | | | | | | | -mlong-double-64 is supported on some ports of gcc (i386, x86_64, and ppc{32,64}). On many other targets, there will be an error: error: unrecognized command line option '-mlong-double-64' This patch makes the driver option -mlong-double-64 available for x86 and ppc. The CC1 option -mlong-double-64 is available on all targets for users to test on unsupported targets. LongDoubleSize is added as a VALUE_LANGOPT so that the option can be shared with -mlong-double-128 when we support it in clang. Also, make powerpc*-linux-musl default to use 64-bit long double. It is currently the only supported ABI on musl and is also how people configure powerpc*-linux-musl-gcc. Reviewed By: rnk Differential Revision: https://reviews.llvm.org/D64067 llvm-svn: 365412
* [RISCV] Specify registers used for exception handlingAlex Bradbury2019-07-081-0/+10
| | | | | | | | | Implements the handling of __builtin_eh_return_regno(). Differential Revision: https://reviews.llvm.org/D63417 Patch by Edward Jones. llvm-svn: 365305
* [AArch64] Fix scalar vuqadd intrinsics operandsDiogo N. Sampaio2019-07-082-4/+30
| | | | | | | | | | | | | | | | | | | | Summary: Change the vuqadd scalar instrinsics to have the second argument as unsigned values, not signed, accordingly to https://developer.arm.com/architectures/instruction-sets/simd-isas/neon/intrinsics So now the compiler correctly warns that a undefined negative float conversion is being done. Reviewers: LukeCheeseman, john.brawn Reviewed By: john.brawn Subscribers: john.brawn, javed.absar, kristof.beyls, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D64242 llvm-svn: 365300
* [AArch64] Fix vsqadd scalar intrinsics operandsDiogo N. Sampaio2019-07-082-4/+53
| | | | | | | | | | | | | | | | | | | | | Summary: Change the vsqadd scalar instrinsics to have the second argument as signed values, not unsigned, accordingly to https://developer.arm.com/architectures/instruction-sets/simd-isas/neon/intrinsics The existing unsigned argument can cause faulty code as negative float to unsigned conversion is undefined, which llvm/clang optimizes away. Reviewers: LukeCheeseman, john.brawn Reviewed By: john.brawn Subscribers: john.brawn, javed.absar, kristof.beyls, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D64239 llvm-svn: 365298
* Treat the range of representable values of floating-point types as [-inf, ↵Richard Smith2019-07-061-34/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | +inf] not as [-max, +max]. Summary: Prior to r329065, we used [-max, max] as the range of representable values because LLVM's `fptrunc` did not guarantee defined behavior when truncating from a larger floating-point type to a smaller one. Now that has been fixed, we can make clang follow normal IEEE 754 semantics in this regard and take the larger range [-inf, +inf] as the range of representable values. In practice, this affects two parts of the frontend: * the constant evaluator no longer treats floating-point evaluations that result in +-inf as being undefined (because they no longer leave the range of representable values of the type) * UBSan no longer treats conversions to floating-point type that are outside the [-max, +max] range as being undefined In passing, also remove the float-divide-by-zero sanitizer from -fsanitize=undefined, on the basis that while it's undefined per C++ rules (and we disallow it in constant expressions for that reason), it is defined by Clang / LLVM / IEEE 754. Reviewers: rnk, BillyONeal Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D63793 llvm-svn: 365272
* [PowerPC] Support constraint code "ww"Fangrui Song2019-07-041-0/+13
| | | | | | | | | | | | | Summary: "ww" and "ws" are both constraint codes for VSX vector registers that hold scalar double data. "ww" is preferred for float while "ws" is preferred for double. Reviewed By: jsji Differential Revision: https://reviews.llvm.org/D64119 llvm-svn: 365106
* [clang] Add DISuprogram and DIE for a func declDjordje Todorovic2019-06-271-0/+15
| | | | | | | | | | | | | | | Attach a unique DISubprogram to a function declaration that will be used for call site debug info. ([7/13] Introduce the debug entry values.) Co-authored-by: Ananth Sowda <asowda@cisco.com> Co-authored-by: Nikola Prica <nikola.prica@rt-rk.com> Co-authored-by: Ivan Baev <ibaev@cisco.com> Differential Revision: https://reviews.llvm.org/D60714 llvm-svn: 364502
* [Clang] Remove unused -split-dwarf and obsolete -enable-split-dwarfAaron Puchert2019-06-263-13/+9
| | | | | | | | | | | | | | | | | | | | | | Summary: The changes in D59673 made the choice redundant, since we can achieve single-file split DWARF just by not setting an output file name. Like llc we can also derive whether to enable Split DWARF from whether -split-dwarf-file is set, so we don't need the flag at all anymore. The test CodeGen/split-debug-filename.c distinguished between having set or not set -enable-split-dwarf with -split-dwarf-file, but we can probably just always emit the metadata into the IR. The flag -split-dwarf wasn't used at all anymore. Reviewers: dblaikie, echristo Reviewed By: dblaikie Differential Revision: https://reviews.llvm.org/D63167 llvm-svn: 364479
* [clang/DIVar] Emit the flag for params that have unmodified valueDjordje Todorovic2019-06-261-0/+12
| | | | | | | | | | | | | | | Emit the debug info flag that indicates that a parameter has unchanged value throughout a function. ([5/13] Introduce the debug entry values.) Co-authored-by: Ananth Sowda <asowda@cisco.com> Co-authored-by: Nikola Prica <nikola.prica@rt-rk.com> Co-authored-by: Ivan Baev <ibaev@cisco.com> Differential Revision: https://reviews.llvm.org/D58035 llvm-svn: 364424
* [ARM] Support inline assembler constraints for MVE.Simon Tatham2019-06-251-0/+18
| | | | | | | | | | | | | | | | | | | | | "To" selects an odd-numbered GPR, and "Te" an even one. There are some 8.1-M instructions that have one too few bits in their register fields and require registers of particular parity, without necessarily using a consecutive even/odd pair. Also, the constraint letter "t" should select an MVE q-register, when MVE is present. This didn't need any source changes, but some extra tests have been added. Reviewers: dmgreen, samparker, SjoerdMeijer Subscribers: javed.absar, eraman, kristof.beyls, hiraditya, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D60709 llvm-svn: 364331
* [clang][NewPM] Remove exception handling before loading pgo sample profile dataLeonard Chan2019-06-241-3/+10
| | | | | | | | | This patch ensures that SimplifyCFGPass comes before SampleProfileLoaderPass on PGO runs in the new PM and fixes clang/test/CodeGen/pgo-sample.c. Differential Revision: https://reviews.llvm.org/D63626 llvm-svn: 364201
* Fix TBAA representation for zero-sized fields and unnamed bit-fields.Richard Smith2019-06-222-8/+8
| | | | | | | | | | | | | | | Unnamed bit-fields should not be represented in the TBAA metadata because they do not represent storage fields (they only affect layout). Zero-sized fields should not be represented in the TBAA metadata because by definition they have no associated storage (so we will never emit a load or store through them), and they might not appear in declaration order within the struct layout. Fixes a verifier failure when emitting a TBAA-enabled load through a class type containing a zero-sized field. llvm-svn: 364140
* [X86] Don't use _MM_FROUND_CUR_DIRECTION in the intrinsics tests.Craig Topper2019-06-224-390/+390
| | | | | | | | | | _MM_FROUND_CUR_DIRECTION is the behavior of the intrinsics that don't take a rounding mode argument. So a better test is using _MM_FROUND_NO_EXC with the SAE only intrinsics and an explicit rounding mode with the intrinsics that support embedded rounding mode. llvm-svn: 364127
* [clang][NewPM] Add -fno-experimental-new-pass-manager to testsLeonard Chan2019-06-217-70/+77
| | | | | | | | | | | | | | | | As per the discussion on D58375, we disable test that have optimizations under the new PM. This patch adds -fno-experimental-new-pass-manager to RUNS that: - Already run with optimizations (-O1 or higher) that were missed in D58375. - Explicitly test new PM behavior along side some new PM RUNS, but are missing this flag if new PM is enabled by default. - Specify -O without the number. Based on getOptimizationLevel(), it seems the default is 2, and the IR appears to be the same when changed to -O2, so update the test to explicitly say -O2 and provide -fno-experimental-new-pass-manager`. Differential Revision: https://reviews.llvm.org/D63156 llvm-svn: 364066
* Fix passing structs and AVX vectors through sysv_abiReid Kleckner2019-06-201-0/+49
| | | | | | | | Do this the same way we did it for ms_abi in r324594. Fixes PR36806. llvm-svn: 363973
* [clang][NewPM] Do not eliminate available_externally durng `-O2 -flto` runsLeonard Chan2019-06-201-3/+6
| | | | | | | | | | | | This fixes CodeGen/available-externally-suppress.c when the new pass manager is turned on by default. available_externally was not emitted during -O2 -flto runs when it should still be retained for link time inlining purposes. This can be fixed by checking that we aren't LTOPrelinking when adding the EliminateAvailableExternallyPass. Differential Revision: https://reviews.llvm.org/D63580 llvm-svn: 363971
* [clang][NewPM] Move EntryExitInstrumenterPass to the start of the pipelineLeonard Chan2019-06-201-2/+5
| | | | | | | | | | This fixes CodeGen/x86_64-instrument-functions.c when running under the new pass manager. The pass should go before any other pass to prevent `__cyg_profile_func_enter/exit()` from not being emitted by inlined functions. Differential Revision: https://reviews.llvm.org/D63577 llvm-svn: 363969
* [X86] Make _mm_mask_cvtps_ph, _mm_maskz_cvtps_ph, _mm256_mask_cvtps_ph, and ↵Craig Topper2019-06-201-4/+4
| | | | | | | | | | | | | | _mm256_maskz_cvtps_ph aliases for their corresponding cvt_roundps_ph intrinsic. These intrinsics should always take an immediate for the rounding mode. The base instruction comes from before EVEX embdedded rounding. The user should always provide the immediate rather than us assuming CUR_DIRECTION. Make the 512-bit versions also explicit aliases instead of copy pasting the code. llvm-svn: 363961
* Store a pointer to the return value in a static alloca and let the debugger ↵Amy Huang2019-06-201-2/+2
| | | | | | | | | | | | | | use that as the variable address for NRVO variables. Subscribers: hiraditya, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D63361 llvm-svn: 363952
* [clang][NewPM] Fixing remaining -O0 tests that are broken under new PMLeonard Chan2019-06-191-0/+6
| | | | | | | | | | | | | | - CodeGen/flatten.c will fail under new PM becausec the new PM AlwaysInliner seems to intentionally inline functions but not call sites marked with alwaysinline (D23299) - Tests that check remarks happen to check them for the inliner which is not turned on at O0. These tests just check that remarks work, but we can make separate tests for the new PM with -O1 so we can turn on the inliner and check the remarks with minimal changes. Differential Revision: https://reviews.llvm.org/D62225 llvm-svn: 363846
* Revert r363116 "[X86] [ABI] Fix i386 ABI "__m64" type bug"Hans Wennborg2019-06-192-31/+2
| | | | | | | | | | | | | | | | | | | | | This introduced MMX instructions in code that wasn't previously using them, breaking programs using 64-bit vectors and x87 floating-point in the same application. See discussion on the code review for more details. > According to System V i386 ABI: the __m64 type paramater and return > value are passed by MMX registers. But current implementation treats > __m64 as i64 which results in parameter passing by stack and returning > by EDX and EAX. > > This patch fixes the bug (https://bugs.llvm.org/show_bug.cgi?id=41029) > for Linux and NetBSD. > > Patch by Wei Xiao (wxiao3) > > Differential Revision: https://reviews.llvm.org/D59744 llvm-svn: 363790
* [RISCV] Mark TLS as supportedLewis Revill2019-06-191-0/+2
| | | | | | | | Inform Clang that TLS is implemented by LLVM for RISC-V Differential Revision: https://reviews.llvm.org/D57055 llvm-svn: 363776
* [CodeGen][ARM] Fix FP16 vector coercionMikhail Maltsev2019-06-181-0/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: When a function argument or return type is a homogeneous aggregate which contains an FP16 vector but the target does not support FP16 operations natively, the type must be converted into an array of integer vectors by then front end (otherwise LLVM will handle FP16 vectors incorrectly by scalarizing them and promoting FP16 to float, see https://reviews.llvm.org/D50507). Currently the logic for checking whether or not a given homogeneous aggregate contains FP16 vectors is incorrect: it only looks at the type of the first vector. This patch fixes the issue by adding a new method ARMABIInfo::containsAnyFP16Vectors and using it. The traversal logic of this method is largely the same as in ABIInfo::isHomogeneousAggregate. Reviewers: eli.friedman, olista01, ostannard Reviewed By: ostannard Subscribers: ostannard, john.brawn, javed.absar, kristof.beyls, pbarrio, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D63437 llvm-svn: 363687
* [Remarks] Extend -fsave-optimization-record to specify the formatFrancis Visoiu Mistrih2019-06-172-0/+7
| | | | | | | | | Use -fsave-optimization-record=<format> to specify a different format than the default, which is YAML. For now, only YAML is supported. llvm-svn: 363573
* [Clang] Harmonize Split DWARF options with llcAaron Puchert2019-06-154-12/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: With Split DWARF the resulting object file (then called skeleton CU) contains the file name of another ("DWO") file with the debug info. This can be a problem for remote compilation, as it will contain the name of the file on the compilation server, not on the client. To use Split DWARF with remote compilation, one needs to either * make sure only relative paths are used, and mirror the build directory structure of the client on the server, * inject the desired file name on the client directly. Since llc already supports the latter solution, we're just copying that over. We allow setting the actual output filename separately from the value of the DW_AT_[GNU_]dwo_name attribute in the skeleton CU. Fixes PR40276. Reviewers: dblaikie, echristo, tejohnson Reviewed By: dblaikie Differential Revision: https://reviews.llvm.org/D59673 llvm-svn: 363496
* [Clang] Rename -split-dwarf-file to -split-dwarf-outputAaron Puchert2019-06-153-8/+8
| | | | | | | | | | | | | | | | | | Summary: This is the first in a series of changes trying to align clang -cc1 flags for Split DWARF with those of llc. The unfortunate side effect of having -split-dwarf-output for single file Split DWARF will disappear again in a subsequent change. The change is the result of a discussion in D59673. Reviewers: dblaikie, echristo Reviewed By: dblaikie Differential Revision: https://reviews.llvm.org/D63130 llvm-svn: 363494
* [Remarks][NFC] Improve testing and documentation of -foptimization-record-passesFrancis Visoiu Mistrih2019-06-141-0/+3
| | | | | | | | | | | This adds: * documentation to the user manual * nicer error message * test for the error case * test for the gold plugin llvm-svn: 363463
* [Targets] Move soft-float-abi filtering to `initFeatureMap`George Burgess IV2019-06-141-0/+9
| | | | | | | | | | | | | | | | | | ARM has a special target feature called soft-float-abi. This feature is special, since we get it passed to us explicitly in the frontend, but filter it out before it can land in any target feature strings in LLVM IR. __attribute__((target(""))) doesn't quite filter these features out properly, so today, we get warnings about soft-float-abi being an unknown feature from the backend. This CL has us filter soft-float-abi out at a slightly different point, so we don't end up passing these invalid features to the backend. Differential Revision: https://reviews.llvm.org/D61750 llvm-svn: 363346
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