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* [TargetInfo] Sort target features before passing them to the backendEli Friedman2018-04-251-0/+4
| | | | | | | | | | | | | | | Passing the features in random order will lead to unpredictable results when some of the features are related (like the architecture-version features on ARM). It might be possible to fix this particular case in the ARM target code, to avoid adding overlapping target features. But we should probably be sorting in any case: the behavior shouldn't depend on StringMap's hashing algorithm. Differential Revision: https://reviews.llvm.org/D46030 llvm-svn: 330861
* add check for long double for __builtin_dump_structPaul Semel2018-04-251-0/+24
| | | | llvm-svn: 330808
* [X86] Remove '#ifdef __x86_64__' around mask_set1_epi64 intrinsics.Craig Topper2018-04-242-4/+0
| | | | | | The unmasked versions already didn't have this restrction. I don't think gcc or icc limit these to 64-bit mode so we shouldn't either. llvm-svn: 330681
* [CodeGen] Reland r330442: Add an option to suppress output of llvm.identMikhail Maltsev2018-04-231-0/+19
| | | | | | | The test case in the original patch was overly contrained and failed on PPC targets. llvm-svn: 330575
* [Atomics] warn about atomic accesses using libcallsTim Northover2018-04-231-0/+27
| | | | | | | | | | | | If an atomic variable is misaligned (and that suspicion is why Clang emits libcalls at all) the runtime support library will have to use a lock to safely access it, with potentially very bad performance consequences. There's a very good chance this is unintentional so it makes sense to issue a warning. Also give it a named group so people can promote it to an error, or disable it if they really don't care. llvm-svn: 330566
* [X86] WaitPKG intrinsicsGabor Buella2018-04-201-0/+25
| | | | | | | | | | Reviewers: craig.topper, zvi Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D45254 llvm-svn: 330463
* Revert r330442, CodeGen/no-ident-version.c is failing on PPCMikhail Maltsev2018-04-201-19/+0
| | | | llvm-svn: 330451
* [CodeGen] Add an option to suppress output of llvm.identMikhail Maltsev2018-04-201-0/+19
| | | | | | | | | | | | | | | | | | | | | | Summary: By default Clang outputs its version (including git commit hash, in case of trunk builds) into object and assembly files. It might be useful to have an option to disable this, especially for debugging purposes. This patch implements new command line flags -Qn and -Qy (the names are chosen for compatibility with GCC). -Qn disables output of the 'llvm.ident' metadata string and the 'producer' debug info. -Qy (enabled by default) does the opposite. Reviewers: faisalv, echristo, aprantl Reviewed By: aprantl Subscribers: aprantl, cfe-commits, JDevlieghere, rogfer01 Differential Revision: https://reviews.llvm.org/D45255 llvm-svn: 330442
* Fix some tests that were failing on WindowsHans Wennborg2018-04-201-6/+6
| | | | llvm-svn: 330441
* Implement proper support for `-falign-functions`Saleem Abdulrasool2018-04-191-0/+16
| | | | | | | | | | | | | | | | This implements support for the previously ignored flag `-falign-functions`. This allows the frontend to request alignment on function definitions in the translation unit where they are not explicitly requested in code. This is compatible with the GCC behaviour and the ICC behaviour. The scalar value passed to `-falign-functions` aligns functions to a power-of-two boundary. If flag is used, the functions are aligned to 16-byte boundaries. If the scalar is specified, it must be an integer less than or equal to 4096. If the value is not a power-of-two, the driver will round it up to the nearest power of two. llvm-svn: 330378
* [NEON] Define vfma_n_f32() and vfmaq_n_f32() intrinsics in AArch32 modeIvan A. Kosarev2018-04-191-0/+24
| | | | | | Differential Revision: https://reviews.llvm.org/D45670 llvm-svn: 330336
* Fix __attribute__((force_align_arg_pointer)) misalignment bugErich Keane2018-04-191-2/+2
| | | | | | | | | | | | | | | | The force_align_arg_pointer attribute was using a hardcoded 16-byte alignment value which in combination with -mstack-alignment=32 (or larger) would produce a misaligned stack which could result in crashes when accessing stack buffers using aligned AVX load/store instructions. Fix the issue by using the "stackrealign" function attribute instead of using a hardcoded 16-byte alignment. Patch By: Gramner Differential Revision: https://reviews.llvm.org/D45812 llvm-svn: 330331
* Lowering x86 adds/addus/subs/subus intrinsics (clang)Alexander Ivchenko2018-04-194-89/+558
| | | | | | | | | | | This is the patch that lowers x86 intrinsics to native IR in order to enable optimizations. Patch by tkrupa Differential Revision: https://reviews.llvm.org/D44786 llvm-svn: 330323
* [NVPTX, CUDA] Added support for m8n32k16 and m32n8k16 variants of wmma ↵Artem Belevich2018-04-181-94/+395
| | | | | | | | | | instructions. The new instructions were added added for sm_70+ GPUs in CUDA-9.1. Differential Revision: https://reviews.llvm.org/D45068 llvm-svn: 330296
* Revert r330195 "[NEON] Define vget_high_f16() and vget_low_f16() intrinsics ↵Ivan A. Kosarev2018-04-181-0/+14
| | | | | | | | in AArch64 mode only". Differential Revision: https://reviews.llvm.org/D45668 llvm-svn: 330248
* [XRay] Add clang builtin for xray typed events.Keith Wyss2018-04-173-8/+71
| | | | | | | | | | | | | | | | | | | Summary: A clang builtin for xray typed events. Differs from __xray_customevent(...) by the presence of a type tag that is vended by compiler-rt in typical usage. This allows xray handlers to expand logged events with their type description and plugins to process traced events based on type. This change depends on D45633 for the intrinsic definition. Reviewers: dberris, pelikan, rnk, eizan Subscribers: cfe-commits, llvm-commits Differential Revision: https://reviews.llvm.org/D45716 llvm-svn: 330220
* Require shell for testTeresa Johnson2018-04-171-1/+2
| | | | | | | | Attempt to fix windows bot which doesn't like the "(cd .." invocation added in r330194: http://lab.llvm.org:8011/builders/clang-with-thin-lto-windows/builds/8704/steps/stage%202%20check/logs/stdio llvm-svn: 330212
* Add a command line option 'fregister_global_dtors_with_atexit' toAkira Hatanaka2018-04-171-5/+51
| | | | | | | | | | | | | | | | | | | | | register destructor functions annotated with __attribute__((destructor)) using __cxa_atexit or atexit. Register destructor functions annotated with __attribute__((destructor)) calling __cxa_atexit in a synthesized constructor function instead of emitting references to the functions in a special section. The primary reason for adding this option is that we are planning to deprecate the __mod_term_funcs section on Darwin in the future. This feature is enabled by default only on Darwin. Users who do not want this can use command line option 'fno_register_global_dtors_with_atexit' to disable it. rdar://problem/33887655 Differential Revision: https://reviews.llvm.org/D45578 llvm-svn: 330199
* [NEON] Define vget_high_f16() and vget_low_f16() intrinsics in AArch64 mode onlyIvan A. Kosarev2018-04-171-14/+0
| | | | | | Differential Revision: https://reviews.llvm.org/D45668 llvm-svn: 330195
* [ThinLTO] Pass -save-temps to LTO backend for distributed ThinLTO buildsTeresa Johnson2018-04-171-2/+10
| | | | | | | | | | | | | | | | | | | | | | | Summary: The clang driver option -save-temps was not passed to the LTO config, so when invoking the ThinLTO backends via clang during distributed builds there was no way to get LTO to save temp files. Getting this to work with ThinLTO distributed builds also required changing the driver to avoid a separate compile step to emit unoptimized bitcode when the input was already bitcode under -save-temps. Not only is this unnecessary in general, it is problematic for ThinLTO backends since the temporary bitcode file to the backend would not match the module path in the combined index, leading to incorrect ThinLTO backend index-based optimizations. Reviewers: pcc Subscribers: mehdi_amini, inglorion, eraman, cfe-commits Differential Revision: https://reviews.llvm.org/D45217 llvm-svn: 330194
* Add modifiers for unsigned char and signed char field printing for ↵Aaron Ballman2018-04-171-0/+49
| | | | | | | | __builtin_dump_struct. Patch by Paul Semel. llvm-svn: 330188
* Add checks for format specifiers used by __builtin_dump_struct and added a ↵Aaron Ballman2018-04-171-62/+153
| | | | | | | | new specifier for null-terminated constant strings. Patch by Paul Semel. llvm-svn: 330185
* [ARM] Compute a target feature which corresponds to the ARM version.Eli Friedman2018-04-164-22/+67
| | | | | | | | | | | | | | | | Currently, the interaction between the triple, the CPU, and the supported features is a mess: the driver edits the triple to indicate the supported architecture version, and the LLVM backend uses this to figure out what instructions are legal. This makes it difficult to understand what's happening, and makes it impossible to LTO together two modules with different computed architectures. Instead of relying on triple rewriting to get the correct target features, we should add the right target features explicitly. Differential Revision: https://reviews.llvm.org/D45240 llvm-svn: 330169
* hwasan: add -fsanitize=kernel-hwaddress flagAndrey Konovalov2018-04-131-0/+20
| | | | | | | | | This patch adds -fsanitize=kernel-hwaddress flag, that essentially enables -hwasan-kernel=1 -hwasan-recover=1 -hwasan-match-all-tag=0xff. Differential Revision: https://reviews.llvm.org/D45046 llvm-svn: 330044
* [NEON] Support vrndns_f32 intrinsicIvan A. Kosarev2018-04-131-1/+10
| | | | | | Differential Revision: https://reviews.llvm.org/D45515 llvm-svn: 330012
* [X86] Introduce cldemote intrinsicGabor Buella2018-04-132-2/+13
| | | | | | | | | | Reviewers: craig.topper, zvi Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D45257 llvm-svn: 329993
* [XRay][clang] Add flag to choose instrumentation bundlesDean Michael Berris2018-04-131-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This change addresses http://llvm.org/PR36926 by allowing users to pick which instrumentation bundles to use, when instrumenting with XRay. In particular, the flag `-fxray-instrumentation-bundle=` has four valid values: - `all`: the default, emits all instrumentation kinds - `none`: equivalent to -fnoxray-instrument - `function`: emits the entry/exit instrumentation - `custom`: emits the custom event instrumentation These can be combined either as comma-separated values, or as repeated flag values. Reviewers: echristo, kpw, eizan, pelikan Reviewed By: pelikan Subscribers: mgorny, cfe-commits Differential Revision: https://reviews.llvm.org/D44970 llvm-svn: 329985
* Remove -cc1 option "-backend-option".Eli Friedman2018-04-121-3/+3
| | | | | | | | | It means the same thing as -mllvm; there isn't any reason to have two options which do the same thing. Differential Revision: https://reviews.llvm.org/D45109 llvm-svn: 329965
* [X86] Introduce wbinvd intrinsicGabor Buella2018-04-121-0/+10
| | | | | | | | | | | | A previously missing intrinsic for an old instruction. Reviewers: craig.topper, echristo Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D45311 llvm-svn: 329937
* [x86] wbnoinvd intrinsicGabor Buella2018-04-112-2/+12
| | | | | | | | | | | | | | The WBNOINVD instruction writes back all modified cache lines in the processor’s internal cache to main memory but does not invalidate (flush) the internal caches. Reviewers: craig.topper, zvi, ashlykov Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D43817 llvm-svn: 329848
* [CodeGen] Handle __func__ inside __finallyShoaib Meenai2018-04-111-0/+12
| | | | | | | | | | | When we enter a __finally block, the CGF's CurCodeDecl will be null (because CodeGenFunction::StartFunction is given an empty GlobalDecl for a __finally block), and so the dyn_cast here will result in an assertion failure. Change it to dyn_cast_or_null to handle this case. Differential Revision: https://reviews.llvm.org/D45523 llvm-svn: 329836
* [NVPTX, CUDA] Improved feature constraints on NVPTX target builtins.Artem Belevich2018-04-112-69/+72
| | | | | | | | | | When NVPTX TARGET_BUILTIN specifies sm_XX or ptxYY as required feature, consider those features available if we're compiling for GPU >= sm_XX or have enabled PTX version >= ptxYY. Differential Revision: https://reviews.llvm.org/D45061 llvm-svn: 329829
* [NEON] Support vfma_n and vfms_n intrinsicsIvan A. Kosarev2018-04-111-0/+23
| | | | | | Differential Revision: https://reviews.llvm.org/D45483 llvm-svn: 329814
* [X86] Replace 512-bit masked pmaddubsw and pmaddwd intrinsic with unmasked ↵Craig Topper2018-04-111-6/+10
| | | | | | | | | | intrinsic and a select. This makes it consistent with the 128/256-bit functions. Someday maybe we'll have all the masking moved to selects. llvm-svn: 329775
* Introduce a new builtin, __builtin_dump_struct, that is useful for dumping ↵Aaron Ballman2018-04-101-0/+391
| | | | | | | | structure contents at runtime in circumstances where debuggers may not be easily available (such as in kernel work). Patch by Paul Semel. llvm-svn: 329762
* [X86] Add test case for llvm change r329734Craig Topper2018-04-101-0/+7
| | | | | | This test ensures the popfd instruction in MS inline assembly can properly find a clobber name for the dirflag register. Previously the register was named 'DF', but it needs to be named 'dirflag' to match the name in the GCC register name list. llvm-svn: 329738
* CodeGen tests - typo fixes NFCGabor Buella2018-04-102-15/+15
| | | | llvm-svn: 329689
* asan: kernel: make no_sanitize("address") attribute work with ↵Vitaly Buka2018-04-093-91/+55
| | | | | | | | | | | | | | | | | -fsanitize=kernel-address Summary: Right now to disable -fsanitize=kernel-address instrumentation, one needs to use no_sanitize("kernel-address"). Make either no_sanitize("address") or no_sanitize("kernel-address") disable both ASan and KASan instrumentation. Also remove redundant test. Patch by Andrey Konovalov Reviewers: eugenis, kcc, glider, dvyukov, vitalybuka Reviewed By: eugenis, vitalybuka Differential Revision: https://reviews.llvm.org/D44981 llvm-svn: 329612
* [X86] Emit native IR for pmuldq/pmuludq builtins.Craig Topper2018-04-095-18/+72
| | | | | | | | I believe all the pieces are now in place in the backend to make this work correctly. We can either mask the input to 32 bits for pmuludg or shl/ashr for pmuldq and use a regular mul instruction. The backend should combine this to PMULUDQ/PMULDQ and then SimplifyDemandedBits will remove the and/shifts. Differential Revision: https://reviews.llvm.org/D45421 llvm-svn: 329605
* [XRay][llvm+clang] Consolidate attribute list filesDean Michael Berris2018-04-094-2/+60
| | | | | | | | | | | | | | | | | | | | | | | | Summary: This change consolidates the always/never lists that may be provided to clang to externally control which functions should be XRay instrumented by imbuing attributes. The files follow the same format as defined in https://clang.llvm.org/docs/SanitizerSpecialCaseList.html for the sanitizer blacklist. We also deprecate the existing `-fxray-instrument-always=` and `-fxray-instrument-never=` flags, in favour of `-fxray-attr-list=`. This fixes http://llvm.org/PR34721. Reviewers: echristo, vlad.tsyrklevich, eugenis Reviewed By: vlad.tsyrklevich Subscribers: llvm-commits, cfe-commits Differential Revision: https://reviews.llvm.org/D45357 llvm-svn: 329543
* Fix typos in clangAlexander Kornienko2018-04-063-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Found via codespell -q 3 -I ../clang-whitelist.txt Where whitelist consists of: archtype cas classs checkk compres definit frome iff inteval ith lod methode nd optin ot pres statics te thru Patch by luzpaz! (This is a subset of D44188 that applies cleanly with a few files that have dubious fixes reverted.) Differential revision: https://reviews.llvm.org/D44188 llvm-svn: 329399
* Disable -fmerge-all-constants as default.Manoj Gupta2018-04-052-5/+8
| | | | | | | | | | | | | | | | | | | Summary: "-fmerge-all-constants" is a non-conforming optimization and should not be the default. It is also causing miscompiles when building Linux Kernel (https://lkml.org/lkml/2018/3/20/872). Fixes PR18538. Reviewers: rjmccall, rsmith, chandlerc Reviewed By: rsmith, chandlerc Subscribers: srhines, cfe-commits Differential Revision: https://reviews.llvm.org/D45289 llvm-svn: 329300
* Add the -fsanitize=shadow-call-stack flagVlad Tsyrklevich2018-04-031-0/+16
| | | | | | | | | | | | | | | | | Summary: Add support for the -fsanitize=shadow-call-stack flag which causes clang to add ShadowCallStack attribute to functions compiled with that flag enabled. Reviewers: pcc, kcc Reviewed By: pcc, kcc Subscribers: cryptoad, cfe-commits, kcc Differential Revision: https://reviews.llvm.org/D44801 llvm-svn: 329122
* Set dso_local on cfi_slowpath.Rafael Espindola2018-03-291-0/+5
| | | | llvm-svn: 328836
* [AArch64]: Add support for parsing rN registers.Manoj Gupta2018-03-291-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Allow rN registers to be simply parsed as correspoing xN registers. The "register ... asm("rN")" is an command to the compiler's register allocator, not an operand to any individual assembly instruction. GCC documents this syntax as "...the name of the register that should be used." This is needed to support the changes in Linux kernel (see https://lkml.org/lkml/2018/3/1/268 ) Note: This will add support only for the limited use case of register ... asm("rN"). Any other uses that make rN leak into assembly are not supported. Reviewers: kristof.beyls, rengolin, peter.smith, t.p.northover Reviewed By: peter.smith Subscribers: javed.absar, eraman, cfe-commits, srhines Differential Revision: https://reviews.llvm.org/D44815 llvm-svn: 328829
* Mark __cfi_check as dso_local.Rafael Espindola2018-03-291-0/+3
| | | | llvm-svn: 328825
* Generalize NRVO to cover C structs.Akira Hatanaka2018-03-2910-805/+299
| | | | | | | | | | | This commit generalizes NRVO to cover C structs (both trivial and non-trivial structs). rdar://problem/33599681 Differential Revision: https://reviews.llvm.org/D44968 llvm-svn: 328809
* Add a dllimport test.Rafael Espindola2018-03-291-0/+7
| | | | | | Thanks to rnk for the suggestion. llvm-svn: 328800
* [Hexagon] Aid bit-reverse load intrinsics lowering with bitcodeKrzysztof Parzyszek2018-03-293-12/+112
| | | | | | | | | | | The conversion of operatios to bitcode helps to eliminate an additional store in certain cases. We used to lower these load intrinsics in DAG to DAG conversion by which time, the "Dead Store Elimination" pass is already run. There is an associated LLVM patch. Patch by Sumanth Gundapaneni. llvm-svn: 328776
* [Hexagon] Add support for "new" circular buffer intrinsicsKrzysztof Parzyszek2018-03-281-0/+156
| | | | | | | | | | | | | These instructions have been around for a long time, but we haven't supported intrinsics for them. The "new" vesrions use the CSx register for the start of the buffer instead of the K field in the Mx register. There is a related llvm patch. Patch by Brendon Cahoon. llvm-svn: 328725
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