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* Expand aggregate arguments more often on 32-bit WindowsReid Kleckner2016-05-023-8/+8
| | | | | | | | | | | | | | | | | | | | Before this change, we would pass all non-HFA record arguments on Windows with byval. Byval often blocks optimizations and results in bad code generation. Windows now uses the existing workaround that other x86_32 platforms use. I also expanded the workaround to handle C++ records with constructors on Windows. On non-Windows platforms, we have to keep generating the same LLVM IR prototypes if we want our bitcode to be ABI compatible. Otherwise we will encounter mismatch issues like PR21573. Essentially fixes PR27522 in Clang instead of LLVM. Reviewers: hans Differential Revision: http://reviews.llvm.org/D19756 llvm-svn: 268261
* [WebAssembly] Rename memory_size intrinsic to current_memoryDerek Schuff2016-05-021-3/+3
| | | | | | This follows the recent change in the wasm spec. llvm-svn: 268256
* [CLANG][AVX512][BUILTIN]movap{d|s}{128|256|512}Michael Zuckerman2016-05-022-0/+71
| | | | | | Differential Revision: http://reviews.llvm.org/D17818 llvm-svn: 268230
* [Clang][AVX512][BuiltIn] Adding intrinsics for cvtps2pd instruction setMichael Zuckerman2016-05-021-0/+35
| | | | | | Differential Revision: http://reviews.llvm.org/D19774 llvm-svn: 268217
* [Clang][avx512][builtin] Adding intrinsics for vexpand{d|q|ps|pd} instrctuon setMichael Zuckerman2016-05-021-0/+82
| | | | | | Differential Revision: http://reviews.llvm.org/D19467 llvm-svn: 268214
* [Clang][BuiltIn][avx512] Adding intrinsics for vpshufd instruction setMichael Zuckerman2016-05-022-0/+44
| | | | | | Differential Revision: http://reviews.llvm.org/D19580 llvm-svn: 268213
* [clang][Builtin][AVX512] Adding intrinsics for vmovshdup and vmovsldup ↵Michael Zuckerman2016-05-012-0/+84
| | | | | | | | instruction set Differential Revision: http://reviews.llvm.org/D19595 llvm-svn: 268196
* [clang][BuiltIn][AVX512]Adding intrinsics for cmp{ss|sd} instruction set.Michael Zuckerman2016-04-291-0/+48
| | | | | | Differential Revision: http://reviews.llvm.org/D19601 llvm-svn: 268028
* [Clang][AVX512][Builtin] Adding intrinsics for compress instruction setMichael Zuckerman2016-04-291-0/+47
| | | | | | Differential Revision: http://reviews.llvm.org/D19599 llvm-svn: 268013
* [clang][AVX512][Builtin] Adding intrinsics for the SAD instruction set.Michael Zuckerman2016-04-282-0/+58
| | | | | | Differential Revision: http://reviews.llvm.org/D19591 llvm-svn: 267942
* Debug info: Apply an artificial debug location to __cyg_profile_func.* calls.Adrian Prantl2016-04-281-3/+3
| | | | | | | | | The LLVM Verifier expects all inlinable calls in debuggable functions to have a location. rdar://problem/25818489 llvm-svn: 267904
* Reland r267691 fixing PR27535.Vassil Vassilev2016-04-281-0/+4
| | | | llvm-svn: 267882
* [Clang][BuiltIn][AVX512] Adding intrinsics fot align{d|q} and palignr ↵Michael Zuckerman2016-04-284-0/+144
| | | | | | | | instruction set Differential Revision: http://reviews.llvm.org/D19588 llvm-svn: 267876
* PR27216: Only define __ARM_FEATURE_FMA when the target has VFPv4Silviu Baranga2016-04-281-1/+1
| | | | | | | | | | | | | | | | | | | | | Summary: According to the ACLE spec, "__ARM_FEATURE_FMA is defined to 1 if the hardware floating-point architecture supports fused floating-point multiply-accumulate". This changes clang's behaviour from emitting this macro for v7-A and v7-R cores to only emitting it when the target has VFPv4 (and therefore support for the floating point multiply-accumulate instruction). Fixes PR27216 Reviewers: t.p.northover, rengolin Subscribers: aemerson, rengolin, cfe-commits Differential Revision: http://reviews.llvm.org/D18963 llvm-svn: 267869
* [Clang][Builtin][AVX512] Adding intrisnics for the vpconflict{q|d} ↵Michael Zuckerman2016-04-271-0/+72
| | | | | | | | instruction set Differential Revision: http://reviews.llvm.org/D19525 llvm-svn: 267728
* [Clang][BuiltIn][AVX512] Adding intrinsics without mask for VBROADCAST and ↵Michael Zuckerman2016-04-273-0/+174
| | | | | | | | VPBROADCAST instruction set . Differential Revision: http://reviews.llvm.org/D19196 llvm-svn: 267696
* [Clang][BuiltIn][AVX512]Adding intrinsics for vmovntdqa vmovntpd vmovntps ↵Michael Zuckerman2016-04-271-0/+25
| | | | | | | | instruction set Differential Revision: http://reviews.llvm.org/D19529 llvm-svn: 267690
* [lanai] Update handling of structs in arguments to be passed in registers.Jacques Pienaar2016-04-261-5/+5
| | | | | | Previously aggregate types were passed byval, change the ABI to pass these in registers instead. llvm-svn: 267496
* [Clang][Builtin][AVX512]Adding k-register logic intrinsics KAND, KANDN, KOR, ↵Michael Zuckerman2016-04-251-0/+48
| | | | | | | | KORTEST, KXNOR, KXOR, KUNPACK instruction set. Differential Revision: http://reviews.llvm.org/D19466 llvm-svn: 267425
* [Clang][Builtin][AVX512]Adding intrinsics for vfpclass{sd|ss} ↵Michael Zuckerman2016-04-252-0/+96
| | | | | | | | vfpclass{pd|ps} instruction set Differential Revision: http://reviews.llvm.org/D19476 llvm-svn: 267414
* [Clang][AVX512][BUILTIN] Adding intrinsics for ↵Michael Zuckerman2016-04-252-0/+144
| | | | | | | | VSCATTERPF{1|0}{DPS|QPS|DPD|QPD} instruction set Differential Revision: http://reviews.llvm.org/D19313 llvm-svn: 267398
* [Clang][AVX512][BuiltIn] Adding support to intrinsics of VPERMD and VPERMW ↵Michael Zuckerman2016-04-256-1/+316
| | | | | | | | instruction set Differential Revision: http://reviews.llvm.org/D19195 llvm-svn: 267380
* DebugInfo: Adapt to loss of DITypeRef in LLVM r267296Duncan P. N. Exon Smith2016-04-231-1/+2
| | | | | | | | | | | | | LLVM stopped using MDString-based type references, and DIBuilder no longer fills 'retainedTypes:' with every DICompositeType that has an 'identifier:' field. There are just minor changes to keep the same behaviour in CFE. Leaving 'retainedTypes:' unfilled has a dramatic impact on the output order of the IR though. There are a huge number of testcase changes, which were unfortunately not really scriptable. llvm-svn: 267297
* [Hexagon] Add definitions for circular and bit-reverse loads/storesKrzysztof Parzyszek2016-04-221-0/+46
| | | | llvm-svn: 267159
* [clang][AVX512][Builtin] adding intrinsics for vf{n}madd{ss|sd} and ↵Michael Zuckerman2016-04-221-0/+287
| | | | | | | | vf{n}sub{ss|sd} instruction set Differential Revision: http://reviews.llvm.org/D19320 llvm-svn: 267135
* [Clang][AVX512][BUILTIN] Adding scalar intrinsics for rsqrt14 ,rcp14, getexp ↵Michael Zuckerman2016-04-221-2/+144
| | | | | | | | and getmant instruction set Differential Revision: http://reviews.llvm.org/D19326 llvm-svn: 267129
* [x86] Force mixes asm syntax test to check for x86Renato Golin2016-04-211-0/+1
| | | | llvm-svn: 266993
* [Clang][AVX512][BuiltIn] Adding intrinsics of VGATHER{DPS|DPD} , ↵Michael Zuckerman2016-04-213-0/+223
| | | | | | | | VPGATHER{QD|QQ|DD|DQ} and VGATHERPF{0|1}{DPS|QPS|DPD|QPD} instruction set . Differential Revision: http://reviews.llvm.org/D19224 llvm-svn: 266983
* Correctly parse GCC-style asm line following MS-style asm line.Denis Zobnin2016-04-211-0/+28
| | | | | | | | | | | | | | Quit parsing MS-style inline assembly if the following statement has GCC style. Enables compilation of code like void f() { __asm mov ebx, ecx __asm__("movl %ecx, %edx"); } Differential Revision: http://reviews.llvm.org/D18652 llvm-svn: 266976
* [Clang] Remove unwanted --check-prefix=CHECK from unit tests. NFC.Mandeep Singh Grang2016-04-203-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Removed unwanted --check-prefix=CHECK from the following unit tests: test/CXX/special/class.copy/implicit-move-def.cpp test/CodeGen/cleanup-destslot-simple.c test/CodeGen/inline-asm-immediate-ubsan.c test/CodeGen/mips-interrupt-attr.c test/CodeGenCXX/cfi-stats.cpp test/CodeGenCXX/copy-constructor-elim.cpp test/CodeGenCXX/microsoft-templ-uuidof.cpp test/CodeGenCXX/vtable-linkage.cpp test/CodeGenObjC/messages-2.m test/Driver/noinline.c test/Index/remap-load.c test/Index/retain-comments-from-system-headers.c test/OpenMP/task_if_codegen.cpp test/Preprocessor/comment_save_macro.c Patch by: Mandeep Singh Grang (mgrang) Reviewers: rafael, ABataev, rengolin Projects: #clang-c Differential Revision: http://reviews.llvm.org/D19232 llvm-svn: 266843
* [AArch64] Fix D19098 fallout.Marcin Koscielnicki2016-04-191-1/+1
| | | | | | | | | | The intrinsic is now called llvm.thread.pointer, not llvm.aarch64.thread.pointer. Also, the code handling it in CGBuiltin.cpp is dead - it's already covered by GCCBuiltin. Remove it. Differential Revision: http://reviews.llvm.org/D19099 llvm-svn: 266817
* [ARM NEON] Define vfms_f32 on ARM, and all vfms using vfma.Ahmed Bougacha2016-04-195-100/+128
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | r259537 added vfma/vfms to armv7, but the builtin was only lowered on the AArch64 side. Instead of supporting it on ARM, get rid of it. The vfms builtin lowered to: %nb = fsub float -0.0, %b %r = @llvm.fma.f32(%a, %nb, %c) Instead, define the operation in terms of vfma, and swap the multiplicands. It now lowers to: %na = fsub float -0.0, %a %r = @llvm.fma.f32(%na, %b, %c) This matches the instruction more closely, and lets current LLVM generate the "natural" operand ordering: fmls.2s v0, v1, v2 instead of the crooked (but equivalent): fmls.2s v0, v2, v1 Except for theses changes, assembly is identical. LLVM accepts both commutations, and the LLVM tests in: test/CodeGen/AArch64/arm64-fmadd.ll test/CodeGen/AArch64/fp-dp3.ll test/CodeGen/AArch64/neon-fma.ll test/CodeGen/ARM/fusedMAC.ll already check either the new one only, or both. Also verified against the test-suite unittests. llvm-svn: 266807
* [builtin_expect] tighten checks, add test, add commentsSanjay Patel2016-04-191-25/+50
| | | | llvm-svn: 266788
* [CodeGen] Widen non-power-of-2 vector HFA base types.Ahmed Bougacha2016-04-193-29/+80
| | | | | | | | | | | | | | | | | | | | | | | Currently, for the ppc64--gnu and aarch64 ABIs, we recognize: typedef __attribute__((__ext_vector_type__(3))) float v3f32; typedef __attribute__((__ext_vector_type__(16))) char v16i8; struct HFA { v3f32 a; v16i8 b; }; as an HFA. Since the first type encountered is used as the base type, we pass the HFA as: [2 x <3 x float>] Which leads to incorrect IR (relying on padding values) when the second field is used. Instead, explicitly widen the vector (after size rounding) in isHomogeneousAggregate. Differential Revision: http://reviews.llvm.org/D18998 llvm-svn: 266784
* [Clang][Builtin][AVX512] Adding intrinsics for VGETMANT{PD|PS} and ↵Michael Zuckerman2016-04-192-0/+216
| | | | | | | | VGETEXP{PD|PS} instruction set Differential Revision: http://reviews.llvm.org/D19197 llvm-svn: 266763
* [Clang][AVX512][BUILTIN] Adding intrinsics support to VEXTRACT{I|F} and ↵Michael Zuckerman2016-04-194-1/+342
| | | | | | | | VINSERT{I|F} instruction set Differential Revision: http://reviews.llvm.org/D19097 llvm-svn: 266745
* [Hexagon] V60/HVX builtin definitions for clangKrzysztof Parzyszek2016-04-181-0/+2917
| | | | | | | | The builtins already exist in LLVM, but are not exposed to the C/C++ programmers. This patch adds all the information about the builtins needed for clang, as well as a test for all available intrinsics. llvm-svn: 266671
* Update testcase to new debug info metadata format.Adrian Prantl2016-04-151-4/+3
| | | | llvm-svn: 266447
* Update to match LLVM changes for PR27284.Adrian Prantl2016-04-152-5/+5
| | | | | | | | | (Reverse the ownership between DICompileUnit and DISubprogram.) http://reviews.llvm.org/D19034 <rdar://problem/25256815> llvm-svn: 266445
* In vector comparisons, handle scalar LHS just as we handle scalar RHSReid Kleckner2016-04-141-1/+21
| | | | | | | | | | | | Summary: Fixes PR27258 Reviewers: rsmith Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D19123 llvm-svn: 266366
* [Clang][AVX512][BUILTIN] Adding support for intrinsics of ↵Michael Zuckerman2016-04-142-0/+360
| | | | | | | | vpmov{d|q}{b|w|d}{128|256|512} instruction set Differential Revision: http://reviews.llvm.org/D19055 llvm-svn: 266280
* [Clang][AVX512][Builtin] Adding intrinsics of ↵Michael Zuckerman2016-04-142-0/+360
| | | | | | | | vpmovus{d|q}{b|w|d}{128|256|512} instruction set Differential Revision: http://reviews.llvm.org/D19050 llvm-svn: 266278
* [Clang][AVX512][Builtin] Adding support to intrinsics of ↵Michael Zuckerman2016-04-132-0/+358
| | | | | | | | pmovs{d|q}{b|w|d}{128|256|512} instruction set Differential Revision: http://reviews.llvm.org/D19023 llvm-svn: 266202
* [Clang][AVX512][Builtin] Adding support for VBROADCAST and ↵Michael Zuckerman2016-04-135-0/+435
| | | | | | | | | VPBROADCASTB/W/D/Q instruction set Differential Revision: http://reviews.llvm.org/D19012 llvm-svn: 266195
* [Clang][AVX512][Builtin] Adding supporting to intrinsics of ↵Michael Zuckerman2016-04-134-0/+130
| | | | | | | | cvt{b|d|q}2mask{128|256|512} and cvtmask2{b|d|q}{128|256|512} instruction set. Differential Revision: http://reviews.llvm.org/D19009 llvm-svn: 266188
* [PPC64][VSX] Add a couple of new data types for vec_vsx_ld and vec_vsx_st ↵Chuang-Yu Cheng2016-04-131-40/+91
| | | | | | | | | | | | | | | | | | | | | | | | | | intrinsics and fix incorrect testcases with minor refactoring New added data types: vector double vec_vsx_ld (int, const double *); vector float vec_vsx_ld (int, const float *); vector bool short vec_vsx_ld (int, const vector bool short *); vector bool int vec_vsx_ld (int, const vector bool int *); vector signed int vec_vsx_ld (int, const signed int *); vector unsigned int vec_vsx_ld (int, const unsigned int *); void vec_vsx_st (vector double, int, double *); void vec_vsx_st (vector float, int, float *); void vec_vsx_st (vector bool short, int, vector bool short *); void vec_vsx_st (vector bool short, int, signed short *); void vec_vsx_st (vector bool short, int, unsigned short *); void vec_vsx_st (vector bool int, int, vector bool int *); void vec_vsx_st (vector bool int, int, signed int *); void vec_vsx_st (vector bool int, int, unsigned int *); Also fix testcases which use non-vector argument version of vec_vsx_ld or vec_vsx_st, but pass incorrect parameter. llvm-svn: 266166
* Add a couple of missing vsx load and store intrinsics.Eric Christopher2016-04-121-0/+10
| | | | | | Patch by Jing Yu! llvm-svn: 266122
* Stricter checks in the stack-protector codegen test.Evgeniy Stepanov2016-04-121-2/+2
| | | | llvm-svn: 266095
* [Clang][BuiltIn][avx512] Adding avx512 (shuf,sqrt{ss|sd},rsqrt ) builtin to ↵Michael Zuckerman2016-04-122-0/+353
| | | | | | clang llvm-svn: 266048
* Allow simultaneous safestack and stackprotector attributes.Evgeniy Stepanov2016-04-111-17/+20
| | | | | | | | | This is the clang part of http://reviews.llvm.org/D18846. SafeStack instrumentation pass adds stack protector canaries if both attributes are present on a function. StackProtector pass will step back if the function has a safestack attribute. llvm-svn: 266005
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