summaryrefslogtreecommitdiffstats
path: root/clang/test/CodeGen
Commit message (Collapse)AuthorAgeFilesLines
...
* tweak test to pass on windowsChris Lattner2010-06-281-1/+1
| | | | llvm-svn: 107040
* Fix UnitTests/2004-02-02-NegativeZero.c, which regressed whenChris Lattner2010-06-281-0/+7
| | | | | | I broke negate of FP values. llvm-svn: 107019
* If coercing something from int or pointer type to int or pointer typeChris Lattner2010-06-271-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | (potentially after unwrapping it from a struct) do it without going through memory. We now compile: struct DeclGroup { unsigned NumDecls; }; int foo(DeclGroup D) { return D.NumDecls; } into: %struct.DeclGroup = type { i32 } define i32 @_Z3foo9DeclGroup(i64) nounwind ssp noredzone { entry: %D = alloca %struct.DeclGroup, align 4 ; <%struct.DeclGroup*> [#uses=2] %coerce.dive = getelementptr %struct.DeclGroup* %D, i32 0, i32 0 ; <i32*> [#uses=1] %coerce.val.ii = trunc i64 %0 to i32 ; <i32> [#uses=1] store i32 %coerce.val.ii, i32* %coerce.dive %tmp = getelementptr inbounds %struct.DeclGroup* %D, i32 0, i32 0 ; <i32*> [#uses=1] %tmp1 = load i32* %tmp ; <i32> [#uses=1] ret i32 %tmp1 } instead of: %struct.DeclGroup = type { i32 } define i32 @_Z3foo9DeclGroup(i64) nounwind ssp noredzone { entry: %D = alloca %struct.DeclGroup, align 4 ; <%struct.DeclGroup*> [#uses=2] %tmp = alloca i64 ; <i64*> [#uses=2] %coerce.dive = getelementptr %struct.DeclGroup* %D, i32 0, i32 0 ; <i32*> [#uses=1] store i64 %0, i64* %tmp %1 = bitcast i64* %tmp to i32* ; <i32*> [#uses=1] %2 = load i32* %1, align 1 ; <i32> [#uses=1] store i32 %2, i32* %coerce.dive %tmp1 = getelementptr inbounds %struct.DeclGroup* %D, i32 0, i32 0 ; <i32*> [#uses=1] %tmp2 = load i32* %tmp1 ; <i32> [#uses=1] ret i32 %tmp2 } ... which is quite a bit less terrifying. llvm-svn: 106975
* Same patch as the previous on the store side. Before we compiled this:Chris Lattner2010-06-271-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | struct DeclGroup { unsigned NumDecls; }; int foo(DeclGroup D) { return D.NumDecls; } to: %struct.DeclGroup = type { i32 } define i32 @_Z3foo9DeclGroup(i64) nounwind ssp noredzone { entry: %D = alloca %struct.DeclGroup, align 4 ; <%struct.DeclGroup*> [#uses=2] %tmp = alloca i64 ; <i64*> [#uses=2] store i64 %0, i64* %tmp %1 = bitcast i64* %tmp to %struct.DeclGroup* ; <%struct.DeclGroup*> [#uses=1] %2 = load %struct.DeclGroup* %1, align 1 ; <%struct.DeclGroup> [#uses=1] store %struct.DeclGroup %2, %struct.DeclGroup* %D %tmp1 = getelementptr inbounds %struct.DeclGroup* %D, i32 0, i32 0 ; <i32*> [#uses=1] %tmp2 = load i32* %tmp1 ; <i32> [#uses=1] ret i32 %tmp2 } which caused fast isel bailouts due to the FCA load/store of %2. Now we generate this just blissful code: %struct.DeclGroup = type { i32 } define i32 @_Z3foo9DeclGroup(i64) nounwind ssp noredzone { entry: %D = alloca %struct.DeclGroup, align 4 ; <%struct.DeclGroup*> [#uses=2] %tmp = alloca i64 ; <i64*> [#uses=2] %coerce.dive = getelementptr %struct.DeclGroup* %D, i32 0, i32 0 ; <i32*> [#uses=1] store i64 %0, i64* %tmp %1 = bitcast i64* %tmp to i32* ; <i32*> [#uses=1] %2 = load i32* %1, align 1 ; <i32> [#uses=1] store i32 %2, i32* %coerce.dive %tmp1 = getelementptr inbounds %struct.DeclGroup* %D, i32 0, i32 0 ; <i32*> [#uses=1] %tmp2 = load i32* %tmp1 ; <i32> [#uses=1] ret i32 %tmp2 } This avoids fastisel bailing out and is groundwork for future patch. This reduces bailouts on CGStmt.ll to 911 from 935. llvm-svn: 106974
* merge two tests.Chris Lattner2010-06-272-4/+6
| | | | llvm-svn: 106971
* Change IR generation for return (in the simple case) to avoid doing sillyChris Lattner2010-06-274-79/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | load/store nonsense in the epilog. For example, for: int foo(int X) { int A[100]; return A[X]; } we used to generate: %arrayidx = getelementptr inbounds [100 x i32]* %A, i32 0, i64 %idxprom ; <i32*> [#uses=1] %tmp1 = load i32* %arrayidx ; <i32> [#uses=1] store i32 %tmp1, i32* %retval %0 = load i32* %retval ; <i32> [#uses=1] ret i32 %0 } which codegen'd to this code: _foo: ## @foo ## BB#0: ## %entry subq $408, %rsp ## imm = 0x198 movl %edi, 400(%rsp) movl 400(%rsp), %edi movslq %edi, %rax movl (%rsp,%rax,4), %edi movl %edi, 404(%rsp) movl 404(%rsp), %eax addq $408, %rsp ## imm = 0x198 ret Now we generate: %arrayidx = getelementptr inbounds [100 x i32]* %A, i32 0, i64 %idxprom ; <i32*> [#uses=1] %tmp1 = load i32* %arrayidx ; <i32> [#uses=1] ret i32 %tmp1 } and: _foo: ## @foo ## BB#0: ## %entry subq $408, %rsp ## imm = 0x198 movl %edi, 404(%rsp) movl 404(%rsp), %edi movslq %edi, %rax movl (%rsp,%rax,4), %eax addq $408, %rsp ## imm = 0x198 ret This actually does matter, cutting out 2000 lines of IR from CGStmt.ll for example. Another interesting effect is that altivec.h functions which are dead now get dce'd by the inliner. Hence all the changes to builtins-ppc-altivec.c to ensure the calls aren't dead. llvm-svn: 106970
* Implement rdar://7530813 - collapse multiple GEP instructions in IRgenChris Lattner2010-06-264-15/+13
| | | | | | | | | | | | | | | | | | | | This avoids generating two gep's for common array operations. Before we would generate something like: %tmp = load i32* %X.addr ; <i32> [#uses=1] %arraydecay = getelementptr inbounds [100 x i32]* %A, i32 0, i32 0 ; <i32*> [#uses=1] %arrayidx = getelementptr inbounds i32* %arraydecay, i32 %tmp ; <i32*> [#uses=1] %tmp1 = load i32* %arrayidx ; <i32> [#uses=1] Now we generate: %tmp = load i32* %X.addr ; <i32> [#uses=1] %arrayidx = getelementptr inbounds [100 x i32]* %A, i32 0, i32 %tmp ; <i32*> [#uses=1] %tmp1 = load i32* %arrayidx ; <i32> [#uses=1] Less IR is better at -O0. llvm-svn: 106966
* fix inc/dec to honor -fwrapv and -ftrapv, implementing PR7426.Chris Lattner2010-06-261-5/+17
| | | | llvm-svn: 106962
* Fix unary minus to trap on overflow with -ftrapv, refactoring binopChris Lattner2010-06-261-1/+1
| | | | | | code so we can use it from VisitUnaryMinus. llvm-svn: 106957
* Implement support for -fwrapv, rdar://7221421Chris Lattner2010-06-264-18/+38
| | | | | | | | | | | | As part of this, pull together trapv handling into the same enum. This also add support for NSW multiplies. This also makes PCH disagreement on overflow behavior silent, since it really doesn't matter except for warnings and codegen (no macros get defined etc). llvm-svn: 106956
* implement rdar://7432000 - signed negate should codegen as NSW.Chris Lattner2010-06-262-4/+17
| | | | | | While I'm in there, adjust pointer to member adjustments as well. llvm-svn: 106955
* A bug I've introduced in STDIN handling surfaced a few broken tests, fix them.Benjamin Kramer2010-06-252-3/+3
| | | | | | Lexer/hexfloat.cpp is now XFAIL'd, I'd appreciate if someone could look into it. llvm-svn: 106840
* implement support for -finstrument-functions, patch by NelsonChris Lattner2010-06-221-0/+18
| | | | | | Elhage! llvm-svn: 106507
* More AltiVec support.Anton Korobeynikov2010-06-191-113/+1014
| | | | | | Patch by Anton Yartsev! llvm-svn: 106387
* Merge the "regparm" attribute from a previous declaration of aDouglas Gregor2010-06-181-0/+5
| | | | | | function to redeclarations of that function. Fixes PR7025. llvm-svn: 106317
* Change the test for which ABI/CC to use on ARM to be base on the environmentRafael Espindola2010-06-161-1/+1
| | | | | | (the last argument of the triple). llvm-svn: 106131
* A a new test for my previous patch.Rafael Espindola2010-06-161-0/+18
| | | | llvm-svn: 106120
* Fix tests that I missed from my previous commit.Rafael Espindola2010-06-162-34/+34
| | | | llvm-svn: 106118
* Enable basic testing of __builtin_fpclassify.Benjamin Kramer2010-06-141-2/+3
| | | | llvm-svn: 105937
* Fix the constant evaluator for AltiVec-style vector literals so that theJohn McCall2010-06-111-0/+4
| | | | | | | vector is filled with the given constant; we were just initializing the first element. llvm-svn: 105824
* Add a test to the previous commit.Rafael Espindola2010-06-081-1/+7
| | | | llvm-svn: 105596
* Correctly align large arrays in x86-64. This fixes PR5599.Rafael Espindola2010-06-041-2/+2
| | | | llvm-svn: 105500
* Preserve more information from a block's original function declarator, if oneJohn McCall2010-06-041-0/+6
| | | | | | | was given. Remove some unnecessary accounting from BlockScopeInfo. Handle typedef'ed function types until such time as we decide not. llvm-svn: 105478
* Empty enum in c is now error to match gcc's behavior.Fariborz Jahanian2010-05-281-1/+1
| | | | | | (radar 8040068). llvm-svn: 105011
* Fix a miscompile of wchar pascal strings.Fariborz Jahanian2010-05-281-0/+31
| | | | | | (radar 8020384) llvm-svn: 104996
* Enable the implementation of __builtin_setjmp and __builtin_longjmp. Not allJohn McCall2010-05-271-0/+7
| | | | | | LLVM backends support these yet. llvm-svn: 104867
* Fix testsuite for blocks mangling changeDouglas Gregor2010-05-251-1/+1
| | | | llvm-svn: 104618
* Implement codegen for __builtin_isnormal.Benjamin Kramer2010-05-191-0/+8
| | | | llvm-svn: 104118
* Add missing test case, provided by Steven Watanabe.Douglas Gregor2010-05-181-0/+50
| | | | llvm-svn: 104037
* Add support for Microsoft's __thiscall, from Steven Watanabe!Douglas Gregor2010-05-181-13/+24
| | | | llvm-svn: 104026
* PR7117: Make sure we don't lose the calling convention for K&R-styleEli Friedman2010-05-171-0/+6
| | | | | | | definitions. llvm-svn: 103932
* The FP constant evaluator was missing a few cases of unary operators that ↵John McCall2010-05-071-0/+4
| | | | | | | | | | | return floats but whose operand isn't a float: specifically, __real__ and __imag__. Instead of filtering these out, just implement them. Fixes <rdar://problem/7958272>. llvm-svn: 103307
* implement codegen support for __builtin_isfinite, part of PR6083Chris Lattner2010-05-061-2/+8
| | | | llvm-svn: 103168
* optimize builtin_isnan/isinf to not do an extraneous extension fromChris Lattner2010-05-061-0/+18
| | | | | | | float -> double (which happens because they are modelled as int(...) functions), and add a testcase for isinf. llvm-svn: 103167
* Emit the globals, metadata, etc. associated with static variables even whenJohn McCall2010-05-041-0/+10
| | | | | | | | they're unreachable. This matters because (if they're POD, or if this is C) the scope containing the variable might be reachable even if the variable isn't. Fixes PR7044. llvm-svn: 103052
* Use clang::VarDecl name instead of llvm::GlobalVariable name.Devang Patel2010-04-291-2/+6
| | | | | | llvm::GLobalVariable name may not match user visibile name for function static variables. llvm-svn: 102644
* A not equal for an unordered relation should return true as specified in ↵Mon P Wang2010-04-291-0/+7
| | | | | | | | IEEE-754, e.g., NAN != NAN ? 1 : 0 should return 1. Also fix the case for complex. llvm-svn: 102598
* Properly pass the address of a lazily-generated function declaration withJohn McCall2010-04-281-0/+12
| | | | | | incomplete type. Fixes PR6911. llvm-svn: 102473
* Implement PR6845. We allow matching constraints to have differentChris Lattner2010-04-231-0/+21
| | | | | | | | input and output types when the smaller value isn't mentioned in the asm string. Extend this support from integers to also allowing fp values to be mismatched (if not mentioned in the asm string). llvm-svn: 102188
* rename testChris Lattner2010-04-231-0/+0
| | | | llvm-svn: 102182
* david conrad points out that {|} in inline assembly on arm are not asmChris Lattner2010-04-231-1/+12
| | | | | | variants. This fixes neon inline asm which my patch for PR6780 broke. llvm-svn: 102181
* ARM/APCS: Don't respect bit-field types when laying out structures.Daniel Dunbar2010-04-221-1/+1
| | | | | | | | | | | - This fixes the last known ABI issues with ARM/APCS. - I've run the first 1k ABITests with '--no-unsigned --no-vector --no-complex' on {armv6, armv7} x {-mno-thumb, -mthumb}, and the first 10k tests for armv7 -mthumb, for both function return types and single argument calls. These all pass now (they failed horribly before without --no-bitfield). llvm-svn: 102070
* IRgen: Fix another case where we generated an invalid access component when weDaniel Dunbar2010-04-221-0/+21
| | | | | | | immediately narrowed the access size. Fix this (and previous case) by just choosing a better access size up-front. llvm-svn: 102068
* IRgen: Fix case where we might generate an access component with width == 0, ifDaniel Dunbar2010-04-221-0/+35
| | | | | | | we have to narrow the access side immediately (can happen with packed, -fno-bitfield-type-align). llvm-svn: 102067
* IRgen: Set alignment correctly on bit-field accesses.Daniel Dunbar2010-04-221-6/+36
| | | | llvm-svn: 102046
* IRgen: Rewrite bit-field access policy to not access data beyond the bounds ↵Daniel Dunbar2010-04-221-3/+49
| | | | | | | | | | | | of the structure, which we also now verify as part of the post-layout consistency checks. - This fixes some pedantic bugs with packed structures, as well as major problems with -fno-bitfield-type-align. - Fixes PR5591, PR5567, and all known -fno-bitfield-type-align issues. - Review appreciated. llvm-svn: 102045
* ABI/x86-32 & x86-64: Alignment on 'byval' must be set when when the alignmentDaniel Dunbar2010-04-212-1/+27
| | | | | | exceeds the minimum ABI alignment. llvm-svn: 102019
* Convert test to FileCheck.Daniel Dunbar2010-04-211-57/+57
| | | | llvm-svn: 102018
* Convert test to FileCheck.Daniel Dunbar2010-04-211-32/+35
| | | | llvm-svn: 102016
* IRgen: Always use i8 arrays to access union bit-fields. This is ugly, butDaniel Dunbar2010-04-201-10/+23
| | | | | | | matches how we currently handle structs, and this correctly handles -fno-bitfield-type-align. llvm-svn: 101918
OpenPOWER on IntegriCloud