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* Revert r275678, "Revert "Revert r275027 - Let FuncAttrs infer the 'returned' ↵NAKAMURA Takumi2016-07-181-1/+1
| | | | | | | | | | argument attribute"" This reverts also r275029, "Update Clang tests after adding inference for the returned argument attribute" It broke LTO build. Seems miscompilation. llvm-svn: 275756
* Revert "Revert r275029 - Update Clang tests after adding inference for the ↵Hal Finkel2016-07-161-1/+1
| | | | | | | | returned argument attribute" This reverts commit r275043 after reapplying the underlying LLVM commit. llvm-svn: 275679
* Add XRay flags to Clang. We implement two flags to control the XRay behaviour:Aaron Ballman2016-07-131-0/+13
| | | | | | | | | | | -fxray-instrument: enables XRay annotation of IR -fxray-instruction-threshold: configures the threshold for function size (looking at IR instructions), and allow LLVM to decide whether to add the nop sleds later on in the process. Also implements the related xray_always_instrument and xray_never_instrument function attributes. Patch by Dean Michael Berris. llvm-svn: 275330
* Correcting the previous fix for test submitted with r275115.Wolfgang Pieb2016-07-111-2/+2
| | | | llvm-svn: 275128
* Fix test submitted with r275115 (failed on ppc64 buildbots).Wolfgang Pieb2016-07-111-2/+2
| | | | llvm-svn: 275127
* Prevent the creation of empty (forwarding) blocks resulting from nested ifs.Wolfgang Pieb2016-07-111-0/+36
| | | | | | | | | | | | | | | | | Summary: Nested if statements can generate empty BBs whose terminator branches unconditionally to its successor. These branches are not eliminated to help generate better line number information in some cases, but there is no reason to keep the empty blocks that result from nested ifs. Reviewers: mehdi_amini, dblaikie, echristo Subscribers: mehdi_amini, cfe-commits Differential review: http://reviews.llvm.org/D11360 llvm-svn: 275115
* [AVX512] Replace masked AND/OR/XOR intrinsics with native code and remove ↵Craig Topper2016-07-112-51/+105
| | | | | | the builtins. llvm-svn: 275049
* Revert r275029 - Update Clang tests after adding inference for the returned ↵Hal Finkel2016-07-111-1/+1
| | | | | | | | argument attribute The associated backend change is causing miscompiles from the AArch64 backend. llvm-svn: 275043
* Update Clang tests after adding inference for the returned argument attributeHal Finkel2016-07-101-1/+1
| | | | | | Adjusting tests after r275027. llvm-svn: 275029
* [X86] Use __butilin_shufflevector for 512-bit shufps intrinsics.Craig Topper2016-07-101-3/+5
| | | | llvm-svn: 275012
* [X86] Use __builtin_ia32_vec_ext_v4hi and __builtin_ia32_vec_set_v4hi to ↵Craig Topper2016-07-091-0/+12
| | | | | | | | implement pextrw/pinsertw MMX intrinsics instead of trying to use native IR. Without this we end up generating code that doesn't use mmx registers and probably doesn't work well with other mmx intrinsics. llvm-svn: 274968
* [X86] Uncomment the _mm_extract_ps test and add checks.Craig Topper2016-07-091-4/+5
| | | | llvm-svn: 274965
* CodeGen: tweak CFString section for COFF, ELFSaleem Abdulrasool2016-07-091-6/+6
| | | | | | | | | Place the structure data into `cfstring`. This both isolates the structures to permit coalescing in the future (by the linker) as well as ensures that it doesnt get marked as read-only data. The structures themselves are not read-only, only the string contents. llvm-svn: 274956
* [X86] Remove dead builtins that don't exist in the backend intrinsic file ↵Craig Topper2016-07-081-1/+0
| | | | | | and don't have custom handling in CGBuiltins.cpp either. llvm-svn: 274825
* [AArch64] Change the preferred alignment for char and short.Chad Rosier2016-07-072-5/+3
| | | | | | | | This reinstates commits r273280 and r273289. Original Review: http://reviews.llvm.org/D21414. llvm-svn: 274791
* [CUDA] Rename the __nvvm_bar0 builtin back to __syncthreads.Justin Lebar2016-07-071-1/+1
| | | | | | | | | The builtin was renamed in r274770. But __syncthreads is part of our user-facing API, so we need to keep the name as-is. Patch by Justin Bogner. llvm-svn: 274780
* NVPTX: Use the nvvm builtins to read SRegs rather than the legacy ptx onesJustin Bogner2016-07-071-68/+68
| | | | | | The ptx spellings were removed from LLVM in r274769. llvm-svn: 274770
* Revert "[aarch64] Update datalayout for aarch64 tests"Chad Rosier2016-07-072-3/+5
| | | | | | | This reverts commit r273289, which was a follow to r273280, which was reverted because the change was not properly approved. llvm-svn: 274767
* Add negative test for TBAARoger Ferrer Ibanez2016-07-061-0/+4
| | | | | | | | | Revision r178818 added tests for TBAA but was missing negative tests to ensure that TBAA markers are not emitted when TBAA is off. Differential Revision: http://reviews.llvm.org/D21295 llvm-svn: 274610
* [X86] Use native IR for immediate values 0-7 of packed fp cmp builtins. This ↵Craig Topper2016-07-061-3/+9
| | | | | | makes them the same as what is done when using the SSE builtins for these same encodings. llvm-svn: 274608
* [AVX512] Use the generic ctlz intrinsic to implement the vplzcntd/q builtins.Craig Topper2016-07-062-18/+30
| | | | llvm-svn: 274603
* [Clang][Feature] Adding CLFLUSHOPT feature and intrinsic to clangMichael Zuckerman2016-07-051-0/+9
| | | | | | Differential Revision: http://reviews.llvm.org/D21792 llvm-svn: 274559
* [X86][AVX512] Converted the VBROADCAST intrinsics to generic IRSimon Pilgrim2016-07-054-93/+122
| | | | llvm-svn: 274544
* [X86][AVX512F] add float/double abs intrinsicsAsaf Badouh2016-07-051-4/+41
| | | | | | | | | add abs intrinsics that use native LLVM-IR. change _mm512_mask[z]_and_epi{32|64} to use select intrinsic Differential Revision: http://reviews.llvm.org/D21973 llvm-svn: 274542
* [Clang][BuiltIn][AVX512] adding ↵Michael Zuckerman2016-07-052-0/+62
| | | | | | | | _mm{|256|512}_mask_cvt{s|us|}epi16_storeu_epi8 intrinsics Differential Revision: http://reviews.llvm.org/D21729 llvm-svn: 274532
* [X86] Use undefined instead of setzero in shufflevector based intrinsics ↵Craig Topper2016-07-044-30/+30
| | | | | | when the second source is unused. Rewrite immediate extractions in shuffle intrinsics to be in ((c >> x) & y) form instead of ((c & z) >> x). This way only x varies between each use instead of having to vary x and z. llvm-svn: 274525
* [X86][AVX512] Converted the VSHUFPD intrinsics to generic IRSimon Pilgrim2016-07-042-11/+21
| | | | llvm-svn: 274523
* [X86][AVX512] Converted the VPERMPD/VPERMQ intrinsics to generic IRSimon Pilgrim2016-07-042-85/+92
| | | | llvm-svn: 274502
* [X86][AVX512] Converted the VPERMILPD/VPERMILPS intrinsics to generic IRSimon Pilgrim2016-07-041-12/+16
| | | | llvm-svn: 274492
* [AVX512] Modify what indices we emit for the zero vector we use for zero ↵Craig Topper2016-07-041-1/+2
| | | | | | extension of the result of a v2i1 or v4i1 masked compare. This way we emit something that the backend easily interprets as a concatenation rather than a true shuffle. This delivers slightly better codegen with the current backend capabilities. llvm-svn: 274484
* [X86][AVX512] Converted the MOVDDUP/MOVSLDUP/MOVSHDUP masked intrinsics to ↵Simon Pilgrim2016-07-022-32/+50
| | | | | | | | generic IR llvm companion patch imminent llvm-svn: 274442
* [X86] Replace 128-bit and 256 masked vpermilps/vpermilpd builtins with ↵Craig Topper2016-07-021-16/+24
| | | | | | native IR. llvm-svn: 274425
* Add TargetInfo for 32-bit and 64-bit RenderScriptPirama Arumuga Nainar2016-07-021-0/+25
| | | | | | | | | | | | | | | | | | | Summary: The TargetInfo for 'renderscript32' and 'renderscript64' ArchTypes are subclasses of ARMleTargetInfo and AArch64leTargetInfo respectively. RenderScript32TargetInfo modifies the ARM ABI to set LongWidth and LongAlign to be 64-bits. Other than this modification, the underlying TargetInfo base classes is initialized as if they have "armv7" and "aarch64" architecture type respectively. Reviewers: rsmith, echristo Subscribers: aemerson, tberghammer, cfe-commits, danalbert, mehdi_amini, srhines Differential Revision: http://reviews.llvm.org/D21334 llvm-svn: 274409
* Removes CHECKs for symbolic label names (as Debug Clang will generate).Tim Shen2016-07-011-5/+10
| | | | | | Differential Revision: http://reviews.llvm.org/D20499 llvm-svn: 274396
* Remove unncessary CHECKs from r274385Tim Shen2016-07-011-2/+0
| | | | llvm-svn: 274387
* [Temporary, Lifetime] Add lifetime marks for temporariesTim Shen2016-07-012-0/+189
| | | | | | | | | With all MaterializeTemporaryExprs coming with a ExprWithCleanups, it's easy to add correct lifetime.end marks into the right RunCleanupsScope. Differential Revision: http://reviews.llvm.org/D20499 llvm-svn: 274385
* Emit more intrinsics for builtin functionsMatt Arsenault2016-07-011-0/+92
| | | | | | | | | | | | This is important for building libclc. Since r273039 tests are failing due to now emitting calls to these functions instead of emitting the DAG node. The libm function names are implemented for OpenCL, and should call the locally defined versions, so -fno-builtin is used. The IR Some functions use the __builtins and expect the intrinsics to be emitted. Without this we end up with nobuiltin calls to intrinsics or to unsupported library calls. llvm-svn: 274370
* [Clang][Intrinsics][AVX512][BuiltIn] adding intrinsics for vrangesd ↵Michael Zuckerman2016-06-301-0/+36
| | | | | | | | instruction set Differential Revision: http://reviews.llvm.org/D21734 llvm-svn: 274218
* [CodeView] Implement support for bitfields in ClangDavid Majnemer2016-06-301-4/+4
| | | | | | | | | | | Emit the underlying storage offset in addition to the starting bit position of the field. This fixes PR28162. Differential Revision: http://reviews.llvm.org/D21783 llvm-svn: 274201
* [X86][SSE2] Updated tests to match ↵Simon Pilgrim2016-06-291-9/+8
| | | | | | llvm\test\CodeGen\X86\sse2-intrinsics-fast-isel-x86_64.ll llvm-svn: 274126
* [AVX512] Zero extend cmp intrinsic return value.Igor Breger2016-06-291-0/+1
| | | | | | Differential Revision: http://reviews.llvm.org/D21746 llvm-svn: 274110
* Update the expected masked load/store intrinsics names in testsArtur Pilipenko2016-06-284-84/+84
| | | | | | The mangling of their names was changed in order to support arbitrary addrspace pointers as arguments in rL274043. llvm-svn: 274044
* [SPARC] Allows inlining of atomics for Sparc32 with appropriate store barrier.Chris Dewhurst2016-06-281-0/+13
| | | | | | The final change is required to extend the back-end's AtomicExpandPass that was implemented for Sparc (64 bit) and later extended for Sparc (32 bit). llvm-svn: 274012
* [X86] add _mm_loadu_si64Asaf Badouh2016-06-261-0/+9
| | | | | | Differential Revision: http://reviews.llvm.org/D21504 llvm-svn: 273812
* [X86] Fix pslldq/psrldq intrinsics to not fail compilation with immediates ↵Craig Topper2016-06-251-0/+12
| | | | | | larger than 16. This was accidentally broken in r272246. llvm-svn: 273775
* Add support for musl-libc on ARM Linux.Rafael Espindola2016-06-242-0/+10
| | | | | | Patch by Lei Zhang! llvm-svn: 273735
* CodeGen: Update Clang to use the new type metadata.Peter Collingbourne2016-06-244-41/+45
| | | | | | Differential Revision: http://reviews.llvm.org/D21054 llvm-svn: 273730
* Fix make-check issuesStrahinja Petrovic2016-06-241-4/+5
| | | | | | Fixing build issue for test test/CodeGen/struct-union-BE.c. llvm-svn: 273675
* This patch fixes problem with passing structures and unionsStrahinja Petrovic2016-06-241-0/+48
| | | | | | | | smaller than register as argument in variadic functions on big endian architectures. Differential Revision: http://reviews.llvm.org/D21611 llvm-svn: 273665
* Invoke simplifycfg and sroa before instcombine.Dehao Chen2016-06-232-0/+19
| | | | | | | | | | | | Summary: InstCombine needs to be performed after simplifycfg and sroa, otherwise it may make bad optimization decisions. Reviewers: davidxl, wmi, dnovillo Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D21568 llvm-svn: 273606
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